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Replace copyRegToReg with copyPhysReg for Alpha. 

llvm-svn: 108065
This commit is contained in:
Jakob Stoklund Olesen 2010-07-11 01:08:23 +00:00
parent e501ff7cc6
commit 7198d32fc6
2 changed files with 15 additions and 28 deletions
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33
llvm/lib/Target/Alpha/AlphaInstrInfo.cpp
View File

@ -141,36 +141,25 @@ unsigned AlphaInstrInfo::InsertBranch(MachineBasicBlock &MBB,
return 2; return 2;
} }
bool AlphaInstrInfo::copyRegToReg(MachineBasicBlock &MBB, void AlphaInstrInfo::copyPhysReg(MachineBasicBlock &MBB,
MachineBasicBlock::iterator MI, MachineBasicBlock::iterator MI, DebugLoc DL,
unsigned DestReg, unsigned SrcReg, unsigned DestReg, unsigned SrcReg,
const TargetRegisterClass *DestRC, bool KillSrc) const {
const TargetRegisterClass *SrcRC, if (Alpha::GPRCRegClass.contains(DestReg, SrcReg)) {
DebugLoc DL) const {
//cerr << "copyRegToReg " << DestReg << " <- " << SrcReg << "\n";
if (DestRC != SrcRC) {
// Not yet supported!
return false;
}
if (DestRC == Alpha::GPRCRegisterClass) {
BuildMI(MBB, MI, DL, get(Alpha::BISr), DestReg) BuildMI(MBB, MI, DL, get(Alpha::BISr), DestReg)
.addReg(SrcReg) .addReg(SrcReg)
.addReg(SrcReg); .addReg(SrcReg, getKillRegState(KillSrc));
} else if (DestRC == Alpha::F4RCRegisterClass) { } else if (Alpha::F4RCRegClass.contains(DestReg, SrcReg)) {
BuildMI(MBB, MI, DL, get(Alpha::CPYSS), DestReg) BuildMI(MBB, MI, DL, get(Alpha::CPYSS), DestReg)
.addReg(SrcReg) .addReg(SrcReg)
.addReg(SrcReg); .addReg(SrcReg, getKillRegState(KillSrc));
} else if (DestRC == Alpha::F8RCRegisterClass) { } else if (Alpha::F8RCRegClass.contains(DestReg, SrcReg)) {
BuildMI(MBB, MI, DL, get(Alpha::CPYST), DestReg) BuildMI(MBB, MI, DL, get(Alpha::CPYST), DestReg)
.addReg(SrcReg) .addReg(SrcReg)
.addReg(SrcReg); .addReg(SrcReg, getKillRegState(KillSrc));
} else { } else {
// Attempt to copy register that is not GPR or FPR llvm_unreachable("Attempt to copy register that is not GPR or FPR");
return false;
} }
return true;
} }
void void

10
llvm/lib/Target/Alpha/AlphaInstrInfo.h
View File

@ -45,12 +45,10 @@ public:
MachineBasicBlock *FBB, MachineBasicBlock *FBB,
const SmallVectorImpl<MachineOperand> &Cond, const SmallVectorImpl<MachineOperand> &Cond,
DebugLoc DL) const; DebugLoc DL) const;
virtual bool copyRegToReg(MachineBasicBlock &MBB, virtual void copyPhysReg(MachineBasicBlock &MBB,
MachineBasicBlock::iterator MI, MachineBasicBlock::iterator MI, DebugLoc DL,
unsigned DestReg, unsigned SrcReg, unsigned DestReg, unsigned SrcReg,
const TargetRegisterClass *DestRC, bool KillSrc) const;
const TargetRegisterClass *SrcRC,
DebugLoc DL) const;
virtual void storeRegToStackSlot(MachineBasicBlock &MBB, virtual void storeRegToStackSlot(MachineBasicBlock &MBB,
MachineBasicBlock::iterator MBBI, MachineBasicBlock::iterator MBBI,
unsigned SrcReg, bool isKill, int FrameIndex, unsigned SrcReg, bool isKill, int FrameIndex,