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[RISCV] Add test case for missed opportunity use bgez for the canonical form X > -1. NFC

This commit is contained in:
Craig Topper 2021-02-23 00:26:56 -08:00
parent edf2e96742
commit 7195aaa5a8
1 changed files with 23 additions and 12 deletions
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35
llvm/test/CodeGen/RISCV/branch.ll
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@ -6,41 +6,45 @@ define void @foo(i32 %a, i32 *%b, i1 %c) nounwind {
; RV32I-LABEL: foo:
; RV32I: # %bb.0:
; RV32I-NEXT: lw a3, 0(a1)
; RV32I-NEXT: beq a3, a0, .LBB0_12
; RV32I-NEXT: beq a3, a0, .LBB0_13
; RV32I-NEXT: # %bb.1: # %test2
; RV32I-NEXT: lw a3, 0(a1)
; RV32I-NEXT: bne a3, a0, .LBB0_12
; RV32I-NEXT: bne a3, a0, .LBB0_13
; RV32I-NEXT: # %bb.2: # %test3
; RV32I-NEXT: lw a3, 0(a1)
; RV32I-NEXT: blt a3, a0, .LBB0_12
; RV32I-NEXT: blt a3, a0, .LBB0_13
; RV32I-NEXT: # %bb.3: # %test4
; RV32I-NEXT: lw a3, 0(a1)
; RV32I-NEXT: bge a3, a0, .LBB0_12
; RV32I-NEXT: bge a3, a0, .LBB0_13
; RV32I-NEXT: # %bb.4: # %test5
; RV32I-NEXT: lw a3, 0(a1)
; RV32I-NEXT: bltu a3, a0, .LBB0_12
; RV32I-NEXT: bltu a3, a0, .LBB0_13
; RV32I-NEXT: # %bb.5: # %test6
; RV32I-NEXT: lw a3, 0(a1)
; RV32I-NEXT: bgeu a3, a0, .LBB0_12
; RV32I-NEXT: bgeu a3, a0, .LBB0_13
; RV32I-NEXT: # %bb.6: # %test7
; RV32I-NEXT: lw a3, 0(a1)
; RV32I-NEXT: blt a0, a3, .LBB0_12
; RV32I-NEXT: blt a0, a3, .LBB0_13
; RV32I-NEXT: # %bb.7: # %test8
; RV32I-NEXT: lw a3, 0(a1)
; RV32I-NEXT: bge a0, a3, .LBB0_12
; RV32I-NEXT: bge a0, a3, .LBB0_13
; RV32I-NEXT: # %bb.8: # %test9
; RV32I-NEXT: lw a3, 0(a1)
; RV32I-NEXT: bltu a0, a3, .LBB0_12
; RV32I-NEXT: bltu a0, a3, .LBB0_13
; RV32I-NEXT: # %bb.9: # %test10
; RV32I-NEXT: lw a3, 0(a1)
; RV32I-NEXT: bgeu a0, a3, .LBB0_12
; RV32I-NEXT: bgeu a0, a3, .LBB0_13
; RV32I-NEXT: # %bb.10: # %test11
; RV32I-NEXT: lw a0, 0(a1)
; RV32I-NEXT: andi a0, a2, 1
; RV32I-NEXT: bnez a0, .LBB0_12
; RV32I-NEXT: bnez a0, .LBB0_13
; RV32I-NEXT: # %bb.11: # %test12
; RV32I-NEXT: lw a0, 0(a1)
; RV32I-NEXT: .LBB0_12: # %end
; RV32I-NEXT: addi a2, zero, -1
; RV32I-NEXT: blt a2, a0, .LBB0_13
; RV32I-NEXT: # %bb.12: # %test13
; RV32I-NEXT: lw a0, 0(a1)
; RV32I-NEXT: .LBB0_13: # %end
; RV32I-NEXT: ret
%val1 = load volatile i32, i32* %b
%tst1 = icmp eq i32 %val1, %a
@ -100,8 +104,15 @@ test11:
%val11 = load volatile i32, i32* %b
br i1 %c, label %end, label %test12
; Check that we use bgez for X > -1 which is the canonical form.
test12:
%val12 = load volatile i32, i32* %b
%tst12 = icmp sgt i32 %val12, -1
br i1 %tst12, label %end, label %test13
test13:
%val13 = load volatile i32, i32* %b
br label %end
end: