forked from OSchip/llvm-project
[InsCombine] Fix a few remaining vec transforms to use poison instead of undef
This is a patch that replaces shufflevector and insertelement's placeholder value with poison. Underlying motivation is to fix the semantics of shufflevector with undef mask to return poison instead (D93818) The consensus has been made in the late 2020 via mailing list as well as the thread in https://bugs.llvm.org/show_bug.cgi?id=44185 . This patch is a simple syntactic change to the existing code, hence directly pushed as a commit.
This commit is contained in:
Juneyoung Lee
parent
222aeb4d51
commit
7161bb87c9
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@ -1935,8 +1935,7 @@ Instruction *InstCombinerImpl::visitCallInst(CallInst &CI) {
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for (unsigned i = 0; i != DstNumElts; ++i)
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for (unsigned i = 0; i != DstNumElts; ++i)
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Mask.push_back(IdxN + i);
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Mask.push_back(IdxN + i);
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Value *Shuffle =
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Value *Shuffle = Builder.CreateShuffleVector(Vec, Mask);
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Builder.CreateShuffleVector(Vec, UndefValue::get(VecTy), Mask);
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replaceInstUsesWith(CI, Shuffle);
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replaceInstUsesWith(CI, Shuffle);
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return eraseInstFromFunction(CI);
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return eraseInstFromFunction(CI);
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}
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}
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@ -2653,7 +2653,7 @@ Instruction *InstCombinerImpl::visitBitCast(BitCastInst &CI) {
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// Beware: messing with this target-specific oddity may cause trouble.
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// Beware: messing with this target-specific oddity may cause trouble.
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if (DestVTy->getNumElements() == 1 && SrcTy->isX86_MMXTy()) {
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if (DestVTy->getNumElements() == 1 && SrcTy->isX86_MMXTy()) {
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Value *Elem = Builder.CreateBitCast(Src, DestVTy->getElementType());
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Value *Elem = Builder.CreateBitCast(Src, DestVTy->getElementType());
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return InsertElementInst::Create(UndefValue::get(DestTy), Elem,
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return InsertElementInst::Create(PoisonValue::get(DestTy), Elem,
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Constant::getNullValue(Type::getInt32Ty(CI.getContext())));
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Constant::getNullValue(Type::getInt32Ty(CI.getContext())));
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}
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}
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@ -1262,7 +1262,7 @@ Value *InstCombinerImpl::SimplifyDemandedVectorElts(Value *V,
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if (all_of(Shuffle->getShuffleMask(), [](int Elt) { return Elt == 0; }) &&
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if (all_of(Shuffle->getShuffleMask(), [](int Elt) { return Elt == 0; }) &&
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DemandedElts.isAllOnesValue()) {
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DemandedElts.isAllOnesValue()) {
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if (!match(I->getOperand(1), m_Undef())) {
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if (!match(I->getOperand(1), m_Undef())) {
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I->setOperand(1, UndefValue::get(I->getOperand(1)->getType()));
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I->setOperand(1, PoisonValue::get(I->getOperand(1)->getType()));
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MadeChange = true;
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MadeChange = true;
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}
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}
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APInt LeftDemanded(OpWidth, 1);
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APInt LeftDemanded(OpWidth, 1);
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@ -595,9 +595,9 @@ static void replaceExtractElements(InsertElementInst *InsElt,
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NumExtElts >= NumInsElts)
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NumExtElts >= NumInsElts)
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return;
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return;
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// Create a shuffle mask to widen the extended-from vector using undefined
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// Create a shuffle mask to widen the extended-from vector using poison
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// values. The mask selects all of the values of the original vector followed
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// values. The mask selects all of the values of the original vector followed
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// by as many undefined values as needed to create a vector of the same length
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// by as many poison values as needed to create a vector of the same length
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// as the inserted-to vector.
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// as the inserted-to vector.
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SmallVector<int, 16> ExtendMask;
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SmallVector<int, 16> ExtendMask;
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for (unsigned i = 0; i < NumExtElts; ++i)
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for (unsigned i = 0; i < NumExtElts; ++i)
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@ -632,7 +632,7 @@ static void replaceExtractElements(InsertElementInst *InsElt,
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return;
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return;
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auto *WideVec =
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auto *WideVec =
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new ShuffleVectorInst(ExtVecOp, UndefValue::get(ExtVecType), ExtendMask);
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new ShuffleVectorInst(ExtVecOp, PoisonValue::get(ExtVecType), ExtendMask);
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// Insert the new shuffle after the vector operand of the extract is defined
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// Insert the new shuffle after the vector operand of the extract is defined
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// (as long as it's not a PHI) or at the start of the basic block of the
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// (as long as it's not a PHI) or at the start of the basic block of the
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@ -1091,7 +1091,7 @@ static bool isShuffleEquivalentToSelect(ShuffleVectorInst &Shuf) {
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/// Turn a chain of inserts that splats a value into an insert + shuffle:
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/// Turn a chain of inserts that splats a value into an insert + shuffle:
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/// insertelt(insertelt(insertelt(insertelt X, %k, 0), %k, 1), %k, 2) ... ->
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/// insertelt(insertelt(insertelt(insertelt X, %k, 0), %k, 1), %k, 2) ... ->
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/// shufflevector(insertelt(X, %k, 0), undef, zero)
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/// shufflevector(insertelt(X, %k, 0), poison, zero)
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static Instruction *foldInsSequenceIntoSplat(InsertElementInst &InsElt) {
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static Instruction *foldInsSequenceIntoSplat(InsertElementInst &InsElt) {
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// We are interested in the last insert in a chain. So if this insert has a
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// We are interested in the last insert in a chain. So if this insert has a
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// single user and that user is an insert, bail.
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// single user and that user is an insert, bail.
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@ -1149,10 +1149,10 @@ static Instruction *foldInsSequenceIntoSplat(InsertElementInst &InsElt) {
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// Create the insert + shuffle.
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// Create the insert + shuffle.
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Type *Int32Ty = Type::getInt32Ty(InsElt.getContext());
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Type *Int32Ty = Type::getInt32Ty(InsElt.getContext());
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UndefValue *UndefVec = UndefValue::get(VecTy);
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PoisonValue *PoisonVec = PoisonValue::get(VecTy);
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Constant *Zero = ConstantInt::get(Int32Ty, 0);
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Constant *Zero = ConstantInt::get(Int32Ty, 0);
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if (!cast<ConstantInt>(FirstIE->getOperand(2))->isZero())
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if (!cast<ConstantInt>(FirstIE->getOperand(2))->isZero())
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FirstIE = InsertElementInst::Create(UndefVec, SplatVal, Zero, "", &InsElt);
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FirstIE = InsertElementInst::Create(PoisonVec, SplatVal, Zero, "", &InsElt);
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// Splat from element 0, but replace absent elements with undef in the mask.
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// Splat from element 0, but replace absent elements with undef in the mask.
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SmallVector<int, 16> Mask(NumElements, 0);
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SmallVector<int, 16> Mask(NumElements, 0);
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@ -1160,7 +1160,7 @@ static Instruction *foldInsSequenceIntoSplat(InsertElementInst &InsElt) {
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if (!ElementPresent[i])
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if (!ElementPresent[i])
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Mask[i] = -1;
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Mask[i] = -1;
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return new ShuffleVectorInst(FirstIE, UndefVec, Mask);
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return new ShuffleVectorInst(FirstIE, PoisonVec, Mask);
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}
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}
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/// Try to fold an insert element into an existing splat shuffle by changing
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/// Try to fold an insert element into an existing splat shuffle by changing
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@ -1681,7 +1681,7 @@ static Value *evaluateInDifferentElementOrder(Value *V, ArrayRef<int> Mask) {
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return ConstantAggregateZero::get(FixedVectorType::get(EltTy, Mask.size()));
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return ConstantAggregateZero::get(FixedVectorType::get(EltTy, Mask.size()));
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if (Constant *C = dyn_cast<Constant>(V))
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if (Constant *C = dyn_cast<Constant>(V))
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return ConstantExpr::getShuffleVector(C, UndefValue::get(C->getType()),
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return ConstantExpr::getShuffleVector(C, PoisonValue::get(C->getType()),
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Mask);
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Mask);
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Instruction *I = cast<Instruction>(V);
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Instruction *I = cast<Instruction>(V);
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@ -58,7 +58,7 @@ define <64 x i8> @fold_to_zero_vector_avx512(<64 x i8> %InVec) {
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define <16 x i8> @splat_test(<16 x i8> %InVec) {
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define <16 x i8> @splat_test(<16 x i8> %InVec) {
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; CHECK-LABEL: @splat_test(
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; CHECK-LABEL: @splat_test(
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; CHECK-NEXT: [[TMP1:%.*]] = shufflevector <16 x i8> [[INVEC:%.*]], <16 x i8> undef, <16 x i32> zeroinitializer
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; CHECK-NEXT: [[TMP1:%.*]] = shufflevector <16 x i8> [[INVEC:%.*]], <16 x i8> poison, <16 x i32> zeroinitializer
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; CHECK-NEXT: ret <16 x i8> [[TMP1]]
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; CHECK-NEXT: ret <16 x i8> [[TMP1]]
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;
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;
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%1 = tail call <16 x i8> @llvm.x86.ssse3.pshuf.b.128(<16 x i8> %InVec, <16 x i8> zeroinitializer)
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%1 = tail call <16 x i8> @llvm.x86.ssse3.pshuf.b.128(<16 x i8> %InVec, <16 x i8> zeroinitializer)
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@ -58,7 +58,7 @@ define <64 x i8> @fold_to_zero_vector_avx512(<64 x i8> %InVec) {
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define <16 x i8> @splat_test(<16 x i8> %InVec) {
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define <16 x i8> @splat_test(<16 x i8> %InVec) {
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; CHECK-LABEL: @splat_test(
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; CHECK-LABEL: @splat_test(
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; CHECK-NEXT: [[TMP1:%.*]] = shufflevector <16 x i8> [[INVEC:%.*]], <16 x i8> undef, <16 x i32> zeroinitializer
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; CHECK-NEXT: [[TMP1:%.*]] = shufflevector <16 x i8> [[INVEC:%.*]], <16 x i8> poison, <16 x i32> zeroinitializer
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; CHECK-NEXT: ret <16 x i8> [[TMP1]]
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; CHECK-NEXT: ret <16 x i8> [[TMP1]]
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;
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;
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%1 = tail call <16 x i8> @llvm.x86.ssse3.pshuf.b.128(<16 x i8> %InVec, <16 x i8> zeroinitializer)
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%1 = tail call <16 x i8> @llvm.x86.ssse3.pshuf.b.128(<16 x i8> %InVec, <16 x i8> zeroinitializer)
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@ -51,7 +51,7 @@ define x86_mmx @e(<1 x i64> %y) {
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define <1 x i64> @f(x86_mmx %y) {
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define <1 x i64> @f(x86_mmx %y) {
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; CHECK-LABEL: @f(
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; CHECK-LABEL: @f(
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; CHECK-NEXT: [[TMP1:%.*]] = bitcast x86_mmx [[Y:%.*]] to i64
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; CHECK-NEXT: [[TMP1:%.*]] = bitcast x86_mmx [[Y:%.*]] to i64
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; CHECK-NEXT: [[C:%.*]] = insertelement <1 x i64> undef, i64 [[TMP1]], i32 0
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; CHECK-NEXT: [[C:%.*]] = insertelement <1 x i64> poison, i64 [[TMP1]], i32 0
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; CHECK-NEXT: ret <1 x i64> [[C]]
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; CHECK-NEXT: ret <1 x i64> [[C]]
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;
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;
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%c = bitcast x86_mmx %y to <1 x i64>
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%c = bitcast x86_mmx %y to <1 x i64>
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@ -51,7 +51,7 @@ define x86_mmx @e(<1 x i64> %y) {
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define <1 x i64> @f(x86_mmx %y) {
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define <1 x i64> @f(x86_mmx %y) {
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; CHECK-LABEL: @f(
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; CHECK-LABEL: @f(
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; CHECK-NEXT: [[TMP1:%.*]] = bitcast x86_mmx [[Y:%.*]] to i64
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; CHECK-NEXT: [[TMP1:%.*]] = bitcast x86_mmx [[Y:%.*]] to i64
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; CHECK-NEXT: [[C:%.*]] = insertelement <1 x i64> undef, i64 [[TMP1]], i32 0
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; CHECK-NEXT: [[C:%.*]] = insertelement <1 x i64> poison, i64 [[TMP1]], i32 0
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; CHECK-NEXT: ret <1 x i64> [[C]]
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; CHECK-NEXT: ret <1 x i64> [[C]]
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;
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;
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%c = bitcast x86_mmx %y to <1 x i64>
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%c = bitcast x86_mmx %y to <1 x i64>
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@ -4,7 +4,7 @@
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define <4 x float> @good1(float %arg) {
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define <4 x float> @good1(float %arg) {
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; CHECK-LABEL: @good1(
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; CHECK-LABEL: @good1(
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; CHECK-NEXT: [[T:%.*]] = insertelement <4 x float> poison, float [[ARG:%.*]], i32 0
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; CHECK-NEXT: [[T:%.*]] = insertelement <4 x float> poison, float [[ARG:%.*]], i32 0
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; CHECK-NEXT: [[T6:%.*]] = shufflevector <4 x float> [[T]], <4 x float> undef, <4 x i32> zeroinitializer
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; CHECK-NEXT: [[T6:%.*]] = shufflevector <4 x float> [[T]], <4 x float> poison, <4 x i32> zeroinitializer
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; CHECK-NEXT: ret <4 x float> [[T6]]
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; CHECK-NEXT: ret <4 x float> [[T6]]
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;
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;
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%t = insertelement <4 x float> poison, float %arg, i32 0
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%t = insertelement <4 x float> poison, float %arg, i32 0
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@ -16,8 +16,8 @@ define <4 x float> @good1(float %arg) {
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define <4 x float> @good2(float %arg) {
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define <4 x float> @good2(float %arg) {
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; CHECK-LABEL: @good2(
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; CHECK-LABEL: @good2(
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; CHECK-NEXT: [[TMP1:%.*]] = insertelement <4 x float> undef, float [[ARG:%.*]], i32 0
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; CHECK-NEXT: [[TMP1:%.*]] = insertelement <4 x float> poison, float [[ARG:%.*]], i32 0
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; CHECK-NEXT: [[T6:%.*]] = shufflevector <4 x float> [[TMP1]], <4 x float> undef, <4 x i32> zeroinitializer
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; CHECK-NEXT: [[T6:%.*]] = shufflevector <4 x float> [[TMP1]], <4 x float> poison, <4 x i32> zeroinitializer
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; CHECK-NEXT: ret <4 x float> [[T6]]
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; CHECK-NEXT: ret <4 x float> [[T6]]
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;
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;
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%t = insertelement <4 x float> poison, float %arg, i32 1
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%t = insertelement <4 x float> poison, float %arg, i32 1
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@ -30,7 +30,7 @@ define <4 x float> @good2(float %arg) {
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define <4 x float> @good3(float %arg) {
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define <4 x float> @good3(float %arg) {
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; CHECK-LABEL: @good3(
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; CHECK-LABEL: @good3(
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; CHECK-NEXT: [[T:%.*]] = insertelement <4 x float> poison, float [[ARG:%.*]], i32 0
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; CHECK-NEXT: [[T:%.*]] = insertelement <4 x float> poison, float [[ARG:%.*]], i32 0
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; CHECK-NEXT: [[T6:%.*]] = shufflevector <4 x float> [[T]], <4 x float> undef, <4 x i32> zeroinitializer
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; CHECK-NEXT: [[T6:%.*]] = shufflevector <4 x float> [[T]], <4 x float> poison, <4 x i32> zeroinitializer
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; CHECK-NEXT: ret <4 x float> [[T6]]
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; CHECK-NEXT: ret <4 x float> [[T6]]
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;
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;
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%t = insertelement <4 x float> zeroinitializer, float %arg, i32 0
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%t = insertelement <4 x float> zeroinitializer, float %arg, i32 0
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@ -59,7 +59,7 @@ define <4 x float> @good5(float %v) {
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; CHECK-LABEL: @good5(
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; CHECK-LABEL: @good5(
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; CHECK-NEXT: [[INS1:%.*]] = insertelement <4 x float> poison, float [[V:%.*]], i32 0
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; CHECK-NEXT: [[INS1:%.*]] = insertelement <4 x float> poison, float [[V:%.*]], i32 0
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; CHECK-NEXT: [[A1:%.*]] = fadd <4 x float> [[INS1]], [[INS1]]
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; CHECK-NEXT: [[A1:%.*]] = fadd <4 x float> [[INS1]], [[INS1]]
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; CHECK-NEXT: [[INS4:%.*]] = shufflevector <4 x float> [[INS1]], <4 x float> undef, <4 x i32> zeroinitializer
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; CHECK-NEXT: [[INS4:%.*]] = shufflevector <4 x float> [[INS1]], <4 x float> poison, <4 x i32> zeroinitializer
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; CHECK-NEXT: [[RES:%.*]] = fadd <4 x float> [[A1]], [[INS4]]
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; CHECK-NEXT: [[RES:%.*]] = fadd <4 x float> [[A1]], [[INS4]]
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; CHECK-NEXT: ret <4 x float> [[RES]]
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; CHECK-NEXT: ret <4 x float> [[RES]]
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;
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;
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@ -76,8 +76,8 @@ define <4 x float> @good5(float %v) {
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define <4 x float> @splat_undef1(float %arg) {
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define <4 x float> @splat_undef1(float %arg) {
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; CHECK-LABEL: @splat_undef1(
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; CHECK-LABEL: @splat_undef1(
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; CHECK-NEXT: [[TMP1:%.*]] = insertelement <4 x float> undef, float [[ARG:%.*]], i32 0
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; CHECK-NEXT: [[TMP1:%.*]] = insertelement <4 x float> poison, float [[ARG:%.*]], i32 0
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; CHECK-NEXT: [[T6:%.*]] = shufflevector <4 x float> [[TMP1]], <4 x float> undef, <4 x i32> <i32 undef, i32 0, i32 0, i32 0>
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; CHECK-NEXT: [[T6:%.*]] = shufflevector <4 x float> [[TMP1]], <4 x float> poison, <4 x i32> <i32 undef, i32 0, i32 0, i32 0>
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; CHECK-NEXT: ret <4 x float> [[T6]]
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; CHECK-NEXT: ret <4 x float> [[T6]]
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;
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;
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%t = insertelement <4 x float> poison, float %arg, i32 1
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%t = insertelement <4 x float> poison, float %arg, i32 1
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@ -92,7 +92,7 @@ define <4 x float> @splat_undef1(float %arg) {
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define <4 x float> @splat_undef2(float %arg) {
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define <4 x float> @splat_undef2(float %arg) {
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; CHECK-LABEL: @splat_undef2(
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; CHECK-LABEL: @splat_undef2(
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; CHECK-NEXT: [[T:%.*]] = insertelement <4 x float> poison, float [[ARG:%.*]], i32 0
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; CHECK-NEXT: [[T:%.*]] = insertelement <4 x float> poison, float [[ARG:%.*]], i32 0
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; CHECK-NEXT: [[T6:%.*]] = shufflevector <4 x float> [[T]], <4 x float> undef, <4 x i32> <i32 0, i32 undef, i32 0, i32 0>
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; CHECK-NEXT: [[T6:%.*]] = shufflevector <4 x float> [[T]], <4 x float> poison, <4 x i32> <i32 0, i32 undef, i32 0, i32 0>
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; CHECK-NEXT: ret <4 x float> [[T6]]
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; CHECK-NEXT: ret <4 x float> [[T6]]
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;
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;
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%t = insertelement <4 x float> poison, float %arg, i32 0
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%t = insertelement <4 x float> poison, float %arg, i32 0
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@ -131,7 +131,7 @@ define <1 x float> @bad4(float %arg) {
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define <4 x float> @splat_undef3(float %arg) {
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define <4 x float> @splat_undef3(float %arg) {
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; CHECK-LABEL: @splat_undef3(
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; CHECK-LABEL: @splat_undef3(
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; CHECK-NEXT: [[T:%.*]] = insertelement <4 x float> poison, float [[ARG:%.*]], i32 0
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; CHECK-NEXT: [[T:%.*]] = insertelement <4 x float> poison, float [[ARG:%.*]], i32 0
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; CHECK-NEXT: [[T4:%.*]] = shufflevector <4 x float> [[T]], <4 x float> undef, <4 x i32> <i32 0, i32 0, i32 undef, i32 undef>
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; CHECK-NEXT: [[T4:%.*]] = shufflevector <4 x float> [[T]], <4 x float> poison, <4 x i32> <i32 0, i32 0, i32 undef, i32 undef>
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; CHECK-NEXT: [[T6:%.*]] = shufflevector <4 x float> [[T]], <4 x float> undef, <4 x i32> zeroinitializer
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; CHECK-NEXT: [[T6:%.*]] = shufflevector <4 x float> [[T]], <4 x float> undef, <4 x i32> zeroinitializer
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; CHECK-NEXT: [[T7:%.*]] = fadd <4 x float> [[T6]], [[T4]]
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; CHECK-NEXT: [[T7:%.*]] = fadd <4 x float> [[T6]], [[T4]]
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; CHECK-NEXT: ret <4 x float> [[T7]]
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; CHECK-NEXT: ret <4 x float> [[T7]]
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@ -4,7 +4,7 @@
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define <4 x float> @good1(float %arg) {
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define <4 x float> @good1(float %arg) {
|
||||||
; CHECK-LABEL: @good1(
|
; CHECK-LABEL: @good1(
|
||||||
; CHECK-NEXT: [[T:%.*]] = insertelement <4 x float> undef, float [[ARG:%.*]], i32 0
|
; CHECK-NEXT: [[T:%.*]] = insertelement <4 x float> undef, float [[ARG:%.*]], i32 0
|
||||||
; CHECK-NEXT: [[T6:%.*]] = shufflevector <4 x float> [[T]], <4 x float> undef, <4 x i32> zeroinitializer
|
; CHECK-NEXT: [[T6:%.*]] = shufflevector <4 x float> [[T]], <4 x float> poison, <4 x i32> zeroinitializer
|
||||||
; CHECK-NEXT: ret <4 x float> [[T6]]
|
; CHECK-NEXT: ret <4 x float> [[T6]]
|
||||||
;
|
;
|
||||||
%t = insertelement <4 x float> undef, float %arg, i32 0
|
%t = insertelement <4 x float> undef, float %arg, i32 0
|
||||||
|
|
@ -16,8 +16,8 @@ define <4 x float> @good1(float %arg) {
|
||||||
|
|
||||||
define <4 x float> @good2(float %arg) {
|
define <4 x float> @good2(float %arg) {
|
||||||
; CHECK-LABEL: @good2(
|
; CHECK-LABEL: @good2(
|
||||||
; CHECK-NEXT: [[TMP1:%.*]] = insertelement <4 x float> undef, float [[ARG:%.*]], i32 0
|
; CHECK-NEXT: [[TMP1:%.*]] = insertelement <4 x float> poison, float [[ARG:%.*]], i32 0
|
||||||
; CHECK-NEXT: [[T6:%.*]] = shufflevector <4 x float> [[TMP1]], <4 x float> undef, <4 x i32> zeroinitializer
|
; CHECK-NEXT: [[T6:%.*]] = shufflevector <4 x float> [[TMP1]], <4 x float> poison, <4 x i32> zeroinitializer
|
||||||
; CHECK-NEXT: ret <4 x float> [[T6]]
|
; CHECK-NEXT: ret <4 x float> [[T6]]
|
||||||
;
|
;
|
||||||
%t = insertelement <4 x float> undef, float %arg, i32 1
|
%t = insertelement <4 x float> undef, float %arg, i32 1
|
||||||
|
|
@ -30,7 +30,7 @@ define <4 x float> @good2(float %arg) {
|
||||||
define <4 x float> @good3(float %arg) {
|
define <4 x float> @good3(float %arg) {
|
||||||
; CHECK-LABEL: @good3(
|
; CHECK-LABEL: @good3(
|
||||||
; CHECK-NEXT: [[T:%.*]] = insertelement <4 x float> poison, float [[ARG:%.*]], i32 0
|
; CHECK-NEXT: [[T:%.*]] = insertelement <4 x float> poison, float [[ARG:%.*]], i32 0
|
||||||
; CHECK-NEXT: [[T6:%.*]] = shufflevector <4 x float> [[T]], <4 x float> undef, <4 x i32> zeroinitializer
|
; CHECK-NEXT: [[T6:%.*]] = shufflevector <4 x float> [[T]], <4 x float> poison, <4 x i32> zeroinitializer
|
||||||
; CHECK-NEXT: ret <4 x float> [[T6]]
|
; CHECK-NEXT: ret <4 x float> [[T6]]
|
||||||
;
|
;
|
||||||
%t = insertelement <4 x float> zeroinitializer, float %arg, i32 0
|
%t = insertelement <4 x float> zeroinitializer, float %arg, i32 0
|
||||||
|
|
@ -59,7 +59,7 @@ define <4 x float> @good5(float %v) {
|
||||||
; CHECK-LABEL: @good5(
|
; CHECK-LABEL: @good5(
|
||||||
; CHECK-NEXT: [[INS1:%.*]] = insertelement <4 x float> undef, float [[V:%.*]], i32 0
|
; CHECK-NEXT: [[INS1:%.*]] = insertelement <4 x float> undef, float [[V:%.*]], i32 0
|
||||||
; CHECK-NEXT: [[A1:%.*]] = fadd <4 x float> [[INS1]], [[INS1]]
|
; CHECK-NEXT: [[A1:%.*]] = fadd <4 x float> [[INS1]], [[INS1]]
|
||||||
; CHECK-NEXT: [[INS4:%.*]] = shufflevector <4 x float> [[INS1]], <4 x float> undef, <4 x i32> zeroinitializer
|
; CHECK-NEXT: [[INS4:%.*]] = shufflevector <4 x float> [[INS1]], <4 x float> poison, <4 x i32> zeroinitializer
|
||||||
; CHECK-NEXT: [[RES:%.*]] = fadd <4 x float> [[A1]], [[INS4]]
|
; CHECK-NEXT: [[RES:%.*]] = fadd <4 x float> [[A1]], [[INS4]]
|
||||||
; CHECK-NEXT: ret <4 x float> [[RES]]
|
; CHECK-NEXT: ret <4 x float> [[RES]]
|
||||||
;
|
;
|
||||||
|
|
@ -76,8 +76,8 @@ define <4 x float> @good5(float %v) {
|
||||||
|
|
||||||
define <4 x float> @splat_undef1(float %arg) {
|
define <4 x float> @splat_undef1(float %arg) {
|
||||||
; CHECK-LABEL: @splat_undef1(
|
; CHECK-LABEL: @splat_undef1(
|
||||||
; CHECK-NEXT: [[TMP1:%.*]] = insertelement <4 x float> undef, float [[ARG:%.*]], i32 0
|
; CHECK-NEXT: [[TMP1:%.*]] = insertelement <4 x float> poison, float [[ARG:%.*]], i32 0
|
||||||
; CHECK-NEXT: [[T6:%.*]] = shufflevector <4 x float> [[TMP1]], <4 x float> undef, <4 x i32> <i32 undef, i32 0, i32 0, i32 0>
|
; CHECK-NEXT: [[T6:%.*]] = shufflevector <4 x float> [[TMP1]], <4 x float> poison, <4 x i32> <i32 undef, i32 0, i32 0, i32 0>
|
||||||
; CHECK-NEXT: ret <4 x float> [[T6]]
|
; CHECK-NEXT: ret <4 x float> [[T6]]
|
||||||
;
|
;
|
||||||
%t = insertelement <4 x float> undef, float %arg, i32 1
|
%t = insertelement <4 x float> undef, float %arg, i32 1
|
||||||
|
|
@ -92,7 +92,7 @@ define <4 x float> @splat_undef1(float %arg) {
|
||||||
define <4 x float> @splat_undef2(float %arg) {
|
define <4 x float> @splat_undef2(float %arg) {
|
||||||
; CHECK-LABEL: @splat_undef2(
|
; CHECK-LABEL: @splat_undef2(
|
||||||
; CHECK-NEXT: [[T:%.*]] = insertelement <4 x float> undef, float [[ARG:%.*]], i32 0
|
; CHECK-NEXT: [[T:%.*]] = insertelement <4 x float> undef, float [[ARG:%.*]], i32 0
|
||||||
; CHECK-NEXT: [[T6:%.*]] = shufflevector <4 x float> [[T]], <4 x float> undef, <4 x i32> <i32 0, i32 undef, i32 0, i32 0>
|
; CHECK-NEXT: [[T6:%.*]] = shufflevector <4 x float> [[T]], <4 x float> poison, <4 x i32> <i32 0, i32 undef, i32 0, i32 0>
|
||||||
; CHECK-NEXT: ret <4 x float> [[T6]]
|
; CHECK-NEXT: ret <4 x float> [[T6]]
|
||||||
;
|
;
|
||||||
%t = insertelement <4 x float> undef, float %arg, i32 0
|
%t = insertelement <4 x float> undef, float %arg, i32 0
|
||||||
|
|
@ -131,7 +131,7 @@ define <1 x float> @bad4(float %arg) {
|
||||||
define <4 x float> @splat_undef3(float %arg) {
|
define <4 x float> @splat_undef3(float %arg) {
|
||||||
; CHECK-LABEL: @splat_undef3(
|
; CHECK-LABEL: @splat_undef3(
|
||||||
; CHECK-NEXT: [[T:%.*]] = insertelement <4 x float> undef, float [[ARG:%.*]], i32 0
|
; CHECK-NEXT: [[T:%.*]] = insertelement <4 x float> undef, float [[ARG:%.*]], i32 0
|
||||||
; CHECK-NEXT: [[T4:%.*]] = shufflevector <4 x float> [[T]], <4 x float> undef, <4 x i32> <i32 0, i32 0, i32 undef, i32 undef>
|
; CHECK-NEXT: [[T4:%.*]] = shufflevector <4 x float> [[T]], <4 x float> poison, <4 x i32> <i32 0, i32 0, i32 undef, i32 undef>
|
||||||
; CHECK-NEXT: [[T6:%.*]] = shufflevector <4 x float> [[T]], <4 x float> undef, <4 x i32> zeroinitializer
|
; CHECK-NEXT: [[T6:%.*]] = shufflevector <4 x float> [[T]], <4 x float> undef, <4 x i32> zeroinitializer
|
||||||
; CHECK-NEXT: [[T7:%.*]] = fadd <4 x float> [[T6]], [[T4]]
|
; CHECK-NEXT: [[T7:%.*]] = fadd <4 x float> [[T6]], [[T4]]
|
||||||
; CHECK-NEXT: ret <4 x float> [[T7]]
|
; CHECK-NEXT: ret <4 x float> [[T7]]
|
||||||
|
|
|
||||||
|
|
@ -30,7 +30,7 @@ define <8 x i32> @trivial_nop(<8 x i32> %vec) {
|
||||||
|
|
||||||
define <2 x i32> @valid_extraction_a(<8 x i32> %vec) {
|
define <2 x i32> @valid_extraction_a(<8 x i32> %vec) {
|
||||||
; CHECK-LABEL: @valid_extraction_a(
|
; CHECK-LABEL: @valid_extraction_a(
|
||||||
; CHECK-NEXT: [[TMP1:%.*]] = shufflevector <8 x i32> [[VEC:%.*]], <8 x i32> undef, <2 x i32> <i32 0, i32 1>
|
; CHECK-NEXT: [[TMP1:%.*]] = shufflevector <8 x i32> [[VEC:%.*]], <8 x i32> poison, <2 x i32> <i32 0, i32 1>
|
||||||
; CHECK-NEXT: ret <2 x i32> [[TMP1]]
|
; CHECK-NEXT: ret <2 x i32> [[TMP1]]
|
||||||
;
|
;
|
||||||
%1 = call <2 x i32> @llvm.experimental.vector.extract.v2i32.v4i32(<8 x i32> %vec, i64 0)
|
%1 = call <2 x i32> @llvm.experimental.vector.extract.v2i32.v4i32(<8 x i32> %vec, i64 0)
|
||||||
|
|
@ -39,7 +39,7 @@ define <2 x i32> @valid_extraction_a(<8 x i32> %vec) {
|
||||||
|
|
||||||
define <2 x i32> @valid_extraction_b(<8 x i32> %vec) {
|
define <2 x i32> @valid_extraction_b(<8 x i32> %vec) {
|
||||||
; CHECK-LABEL: @valid_extraction_b(
|
; CHECK-LABEL: @valid_extraction_b(
|
||||||
; CHECK-NEXT: [[TMP1:%.*]] = shufflevector <8 x i32> [[VEC:%.*]], <8 x i32> undef, <2 x i32> <i32 2, i32 3>
|
; CHECK-NEXT: [[TMP1:%.*]] = shufflevector <8 x i32> [[VEC:%.*]], <8 x i32> poison, <2 x i32> <i32 2, i32 3>
|
||||||
; CHECK-NEXT: ret <2 x i32> [[TMP1]]
|
; CHECK-NEXT: ret <2 x i32> [[TMP1]]
|
||||||
;
|
;
|
||||||
%1 = call <2 x i32> @llvm.experimental.vector.extract.v2i32.v4i32(<8 x i32> %vec, i64 2)
|
%1 = call <2 x i32> @llvm.experimental.vector.extract.v2i32.v4i32(<8 x i32> %vec, i64 2)
|
||||||
|
|
@ -48,7 +48,7 @@ define <2 x i32> @valid_extraction_b(<8 x i32> %vec) {
|
||||||
|
|
||||||
define <2 x i32> @valid_extraction_c(<8 x i32> %vec) {
|
define <2 x i32> @valid_extraction_c(<8 x i32> %vec) {
|
||||||
; CHECK-LABEL: @valid_extraction_c(
|
; CHECK-LABEL: @valid_extraction_c(
|
||||||
; CHECK-NEXT: [[TMP1:%.*]] = shufflevector <8 x i32> [[VEC:%.*]], <8 x i32> undef, <2 x i32> <i32 4, i32 5>
|
; CHECK-NEXT: [[TMP1:%.*]] = shufflevector <8 x i32> [[VEC:%.*]], <8 x i32> poison, <2 x i32> <i32 4, i32 5>
|
||||||
; CHECK-NEXT: ret <2 x i32> [[TMP1]]
|
; CHECK-NEXT: ret <2 x i32> [[TMP1]]
|
||||||
;
|
;
|
||||||
%1 = call <2 x i32> @llvm.experimental.vector.extract.v2i32.v4i32(<8 x i32> %vec, i64 4)
|
%1 = call <2 x i32> @llvm.experimental.vector.extract.v2i32.v4i32(<8 x i32> %vec, i64 4)
|
||||||
|
|
@ -57,7 +57,7 @@ define <2 x i32> @valid_extraction_c(<8 x i32> %vec) {
|
||||||
|
|
||||||
define <2 x i32> @valid_extraction_d(<8 x i32> %vec) {
|
define <2 x i32> @valid_extraction_d(<8 x i32> %vec) {
|
||||||
; CHECK-LABEL: @valid_extraction_d(
|
; CHECK-LABEL: @valid_extraction_d(
|
||||||
; CHECK-NEXT: [[TMP1:%.*]] = shufflevector <8 x i32> [[VEC:%.*]], <8 x i32> undef, <2 x i32> <i32 6, i32 7>
|
; CHECK-NEXT: [[TMP1:%.*]] = shufflevector <8 x i32> [[VEC:%.*]], <8 x i32> poison, <2 x i32> <i32 6, i32 7>
|
||||||
; CHECK-NEXT: ret <2 x i32> [[TMP1]]
|
; CHECK-NEXT: ret <2 x i32> [[TMP1]]
|
||||||
;
|
;
|
||||||
%1 = call <2 x i32> @llvm.experimental.vector.extract.v2i32.v4i32(<8 x i32> %vec, i64 6)
|
%1 = call <2 x i32> @llvm.experimental.vector.extract.v2i32.v4i32(<8 x i32> %vec, i64 6)
|
||||||
|
|
@ -66,7 +66,7 @@ define <2 x i32> @valid_extraction_d(<8 x i32> %vec) {
|
||||||
|
|
||||||
define <4 x i32> @valid_extraction_e(<8 x i32> %vec) {
|
define <4 x i32> @valid_extraction_e(<8 x i32> %vec) {
|
||||||
; CHECK-LABEL: @valid_extraction_e(
|
; CHECK-LABEL: @valid_extraction_e(
|
||||||
; CHECK-NEXT: [[TMP1:%.*]] = shufflevector <8 x i32> [[VEC:%.*]], <8 x i32> undef, <4 x i32> <i32 0, i32 1, i32 2, i32 3>
|
; CHECK-NEXT: [[TMP1:%.*]] = shufflevector <8 x i32> [[VEC:%.*]], <8 x i32> poison, <4 x i32> <i32 0, i32 1, i32 2, i32 3>
|
||||||
; CHECK-NEXT: ret <4 x i32> [[TMP1]]
|
; CHECK-NEXT: ret <4 x i32> [[TMP1]]
|
||||||
;
|
;
|
||||||
%1 = call <4 x i32> @llvm.experimental.vector.extract.v4i32.v8i32(<8 x i32> %vec, i64 0)
|
%1 = call <4 x i32> @llvm.experimental.vector.extract.v4i32.v8i32(<8 x i32> %vec, i64 0)
|
||||||
|
|
@ -75,7 +75,7 @@ define <4 x i32> @valid_extraction_e(<8 x i32> %vec) {
|
||||||
|
|
||||||
define <4 x i32> @valid_extraction_f(<8 x i32> %vec) {
|
define <4 x i32> @valid_extraction_f(<8 x i32> %vec) {
|
||||||
; CHECK-LABEL: @valid_extraction_f(
|
; CHECK-LABEL: @valid_extraction_f(
|
||||||
; CHECK-NEXT: [[TMP1:%.*]] = shufflevector <8 x i32> [[VEC:%.*]], <8 x i32> undef, <4 x i32> <i32 4, i32 5, i32 6, i32 7>
|
; CHECK-NEXT: [[TMP1:%.*]] = shufflevector <8 x i32> [[VEC:%.*]], <8 x i32> poison, <4 x i32> <i32 4, i32 5, i32 6, i32 7>
|
||||||
; CHECK-NEXT: ret <4 x i32> [[TMP1]]
|
; CHECK-NEXT: ret <4 x i32> [[TMP1]]
|
||||||
;
|
;
|
||||||
%1 = call <4 x i32> @llvm.experimental.vector.extract.v4i32.v8i32(<8 x i32> %vec, i64 4)
|
%1 = call <4 x i32> @llvm.experimental.vector.extract.v4i32.v8i32(<8 x i32> %vec, i64 4)
|
||||||
|
|
@ -84,7 +84,7 @@ define <4 x i32> @valid_extraction_f(<8 x i32> %vec) {
|
||||||
|
|
||||||
define <3 x i32> @valid_extraction_g(<8 x i32> %vec) {
|
define <3 x i32> @valid_extraction_g(<8 x i32> %vec) {
|
||||||
; CHECK-LABEL: @valid_extraction_g(
|
; CHECK-LABEL: @valid_extraction_g(
|
||||||
; CHECK-NEXT: [[TMP1:%.*]] = shufflevector <8 x i32> [[VEC:%.*]], <8 x i32> undef, <3 x i32> <i32 0, i32 1, i32 2>
|
; CHECK-NEXT: [[TMP1:%.*]] = shufflevector <8 x i32> [[VEC:%.*]], <8 x i32> poison, <3 x i32> <i32 0, i32 1, i32 2>
|
||||||
; CHECK-NEXT: ret <3 x i32> [[TMP1]]
|
; CHECK-NEXT: ret <3 x i32> [[TMP1]]
|
||||||
;
|
;
|
||||||
%1 = call <3 x i32> @llvm.experimental.vector.extract.v3i32.v8i32(<8 x i32> %vec, i64 0)
|
%1 = call <3 x i32> @llvm.experimental.vector.extract.v3i32.v8i32(<8 x i32> %vec, i64 0)
|
||||||
|
|
@ -93,7 +93,7 @@ define <3 x i32> @valid_extraction_g(<8 x i32> %vec) {
|
||||||
|
|
||||||
define <3 x i32> @valid_extraction_h(<8 x i32> %vec) {
|
define <3 x i32> @valid_extraction_h(<8 x i32> %vec) {
|
||||||
; CHECK-LABEL: @valid_extraction_h(
|
; CHECK-LABEL: @valid_extraction_h(
|
||||||
; CHECK-NEXT: [[TMP1:%.*]] = shufflevector <8 x i32> [[VEC:%.*]], <8 x i32> undef, <3 x i32> <i32 3, i32 4, i32 5>
|
; CHECK-NEXT: [[TMP1:%.*]] = shufflevector <8 x i32> [[VEC:%.*]], <8 x i32> poison, <3 x i32> <i32 3, i32 4, i32 5>
|
||||||
; CHECK-NEXT: ret <3 x i32> [[TMP1]]
|
; CHECK-NEXT: ret <3 x i32> [[TMP1]]
|
||||||
;
|
;
|
||||||
%1 = call <3 x i32> @llvm.experimental.vector.extract.v3i32.v8i32(<8 x i32> %vec, i64 3)
|
%1 = call <3 x i32> @llvm.experimental.vector.extract.v3i32.v8i32(<8 x i32> %vec, i64 3)
|
||||||
|
|
|
||||||
|
|
@ -315,7 +315,7 @@ define float @bitcasted_inselt_to_and_from_FP_uses2(double %x) {
|
||||||
|
|
||||||
define <4 x double> @invalid_extractelement(<2 x double> %a, <4 x double> %b, double* %p) {
|
define <4 x double> @invalid_extractelement(<2 x double> %a, <4 x double> %b, double* %p) {
|
||||||
; ANY-LABEL: @invalid_extractelement(
|
; ANY-LABEL: @invalid_extractelement(
|
||||||
; ANY-NEXT: [[TMP1:%.*]] = shufflevector <2 x double> [[A:%.*]], <2 x double> undef, <4 x i32> <i32 0, i32 undef, i32 undef, i32 undef>
|
; ANY-NEXT: [[TMP1:%.*]] = shufflevector <2 x double> [[A:%.*]], <2 x double> poison, <4 x i32> <i32 0, i32 undef, i32 undef, i32 undef>
|
||||||
; ANY-NEXT: [[T4:%.*]] = shufflevector <4 x double> [[B:%.*]], <4 x double> [[TMP1]], <4 x i32> <i32 undef, i32 1, i32 4, i32 3>
|
; ANY-NEXT: [[T4:%.*]] = shufflevector <4 x double> [[B:%.*]], <4 x double> [[TMP1]], <4 x i32> <i32 undef, i32 1, i32 4, i32 3>
|
||||||
; ANY-NEXT: [[E:%.*]] = extractelement <4 x double> [[B]], i32 1
|
; ANY-NEXT: [[E:%.*]] = extractelement <4 x double> [[B]], i32 1
|
||||||
; ANY-NEXT: store double [[E]], double* [[P:%.*]], align 8
|
; ANY-NEXT: store double [[E]], double* [[P:%.*]], align 8
|
||||||
|
|
|
||||||
|
|
@ -315,7 +315,7 @@ define float @bitcasted_inselt_to_and_from_FP_uses2(double %x) {
|
||||||
|
|
||||||
define <4 x double> @invalid_extractelement(<2 x double> %a, <4 x double> %b, double* %p) {
|
define <4 x double> @invalid_extractelement(<2 x double> %a, <4 x double> %b, double* %p) {
|
||||||
; ANY-LABEL: @invalid_extractelement(
|
; ANY-LABEL: @invalid_extractelement(
|
||||||
; ANY-NEXT: [[TMP1:%.*]] = shufflevector <2 x double> [[A:%.*]], <2 x double> undef, <4 x i32> <i32 0, i32 undef, i32 undef, i32 undef>
|
; ANY-NEXT: [[TMP1:%.*]] = shufflevector <2 x double> [[A:%.*]], <2 x double> poison, <4 x i32> <i32 0, i32 undef, i32 undef, i32 undef>
|
||||||
; ANY-NEXT: [[T4:%.*]] = shufflevector <4 x double> [[B:%.*]], <4 x double> [[TMP1]], <4 x i32> <i32 undef, i32 1, i32 4, i32 3>
|
; ANY-NEXT: [[T4:%.*]] = shufflevector <4 x double> [[B:%.*]], <4 x double> [[TMP1]], <4 x i32> <i32 undef, i32 1, i32 4, i32 3>
|
||||||
; ANY-NEXT: [[E:%.*]] = extractelement <4 x double> [[B]], i32 1
|
; ANY-NEXT: [[E:%.*]] = extractelement <4 x double> [[B]], i32 1
|
||||||
; ANY-NEXT: store double [[E]], double* [[P:%.*]], align 8
|
; ANY-NEXT: store double [[E]], double* [[P:%.*]], align 8
|
||||||
|
|
|
||||||
|
|
@ -31,7 +31,7 @@ define <4 x i16> @test2(<8 x i16> %in, <8 x i16> %in2) {
|
||||||
|
|
||||||
define <2 x i64> @test_vcopyq_lane_p64(<2 x i64> %a, <1 x i64> %b) {
|
define <2 x i64> @test_vcopyq_lane_p64(<2 x i64> %a, <1 x i64> %b) {
|
||||||
; CHECK-LABEL: @test_vcopyq_lane_p64(
|
; CHECK-LABEL: @test_vcopyq_lane_p64(
|
||||||
; CHECK-NEXT: [[TMP1:%.*]] = shufflevector <1 x i64> [[B:%.*]], <1 x i64> undef, <2 x i32> <i32 0, i32 undef>
|
; CHECK-NEXT: [[TMP1:%.*]] = shufflevector <1 x i64> [[B:%.*]], <1 x i64> poison, <2 x i32> <i32 0, i32 undef>
|
||||||
; CHECK-NEXT: [[RES:%.*]] = shufflevector <2 x i64> [[A:%.*]], <2 x i64> [[TMP1]], <2 x i32> <i32 0, i32 2>
|
; CHECK-NEXT: [[RES:%.*]] = shufflevector <2 x i64> [[A:%.*]], <2 x i64> [[TMP1]], <2 x i32> <i32 0, i32 2>
|
||||||
; CHECK-NEXT: ret <2 x i64> [[RES]]
|
; CHECK-NEXT: ret <2 x i64> [[RES]]
|
||||||
;
|
;
|
||||||
|
|
@ -44,7 +44,7 @@ define <2 x i64> @test_vcopyq_lane_p64(<2 x i64> %a, <1 x i64> %b) {
|
||||||
|
|
||||||
define <4 x float> @widen_extract2(<4 x float> %ins, <2 x float> %ext) {
|
define <4 x float> @widen_extract2(<4 x float> %ins, <2 x float> %ext) {
|
||||||
; CHECK-LABEL: @widen_extract2(
|
; CHECK-LABEL: @widen_extract2(
|
||||||
; CHECK-NEXT: [[TMP1:%.*]] = shufflevector <2 x float> [[EXT:%.*]], <2 x float> undef, <4 x i32> <i32 0, i32 1, i32 undef, i32 undef>
|
; CHECK-NEXT: [[TMP1:%.*]] = shufflevector <2 x float> [[EXT:%.*]], <2 x float> poison, <4 x i32> <i32 0, i32 1, i32 undef, i32 undef>
|
||||||
; CHECK-NEXT: [[I2:%.*]] = shufflevector <4 x float> [[INS:%.*]], <4 x float> [[TMP1]], <4 x i32> <i32 0, i32 4, i32 2, i32 5>
|
; CHECK-NEXT: [[I2:%.*]] = shufflevector <4 x float> [[INS:%.*]], <4 x float> [[TMP1]], <4 x i32> <i32 0, i32 4, i32 2, i32 5>
|
||||||
; CHECK-NEXT: ret <4 x float> [[I2]]
|
; CHECK-NEXT: ret <4 x float> [[I2]]
|
||||||
;
|
;
|
||||||
|
|
@ -57,7 +57,7 @@ define <4 x float> @widen_extract2(<4 x float> %ins, <2 x float> %ext) {
|
||||||
|
|
||||||
define <4 x float> @widen_extract3(<4 x float> %ins, <3 x float> %ext) {
|
define <4 x float> @widen_extract3(<4 x float> %ins, <3 x float> %ext) {
|
||||||
; CHECK-LABEL: @widen_extract3(
|
; CHECK-LABEL: @widen_extract3(
|
||||||
; CHECK-NEXT: [[TMP1:%.*]] = shufflevector <3 x float> [[EXT:%.*]], <3 x float> undef, <4 x i32> <i32 0, i32 1, i32 2, i32 undef>
|
; CHECK-NEXT: [[TMP1:%.*]] = shufflevector <3 x float> [[EXT:%.*]], <3 x float> poison, <4 x i32> <i32 0, i32 1, i32 2, i32 undef>
|
||||||
; CHECK-NEXT: [[I3:%.*]] = shufflevector <4 x float> [[INS:%.*]], <4 x float> [[TMP1]], <4 x i32> <i32 6, i32 5, i32 4, i32 3>
|
; CHECK-NEXT: [[I3:%.*]] = shufflevector <4 x float> [[INS:%.*]], <4 x float> [[TMP1]], <4 x i32> <i32 6, i32 5, i32 4, i32 3>
|
||||||
; CHECK-NEXT: ret <4 x float> [[I3]]
|
; CHECK-NEXT: ret <4 x float> [[I3]]
|
||||||
;
|
;
|
||||||
|
|
@ -72,7 +72,7 @@ define <4 x float> @widen_extract3(<4 x float> %ins, <3 x float> %ext) {
|
||||||
|
|
||||||
define <8 x float> @widen_extract4(<8 x float> %ins, <2 x float> %ext) {
|
define <8 x float> @widen_extract4(<8 x float> %ins, <2 x float> %ext) {
|
||||||
; CHECK-LABEL: @widen_extract4(
|
; CHECK-LABEL: @widen_extract4(
|
||||||
; CHECK-NEXT: [[TMP1:%.*]] = shufflevector <2 x float> [[EXT:%.*]], <2 x float> undef, <8 x i32> <i32 0, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef>
|
; CHECK-NEXT: [[TMP1:%.*]] = shufflevector <2 x float> [[EXT:%.*]], <2 x float> poison, <8 x i32> <i32 0, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef>
|
||||||
; CHECK-NEXT: [[I1:%.*]] = shufflevector <8 x float> [[INS:%.*]], <8 x float> [[TMP1]], <8 x i32> <i32 0, i32 1, i32 8, i32 3, i32 4, i32 5, i32 6, i32 7>
|
; CHECK-NEXT: [[I1:%.*]] = shufflevector <8 x float> [[INS:%.*]], <8 x float> [[TMP1]], <8 x i32> <i32 0, i32 1, i32 8, i32 3, i32 4, i32 5, i32 6, i32 7>
|
||||||
; CHECK-NEXT: ret <8 x float> [[I1]]
|
; CHECK-NEXT: ret <8 x float> [[I1]]
|
||||||
;
|
;
|
||||||
|
|
@ -86,7 +86,7 @@ define <8 x float> @widen_extract4(<8 x float> %ins, <2 x float> %ext) {
|
||||||
|
|
||||||
define <8 x i16> @pr26015(<4 x i16> %t0) {
|
define <8 x i16> @pr26015(<4 x i16> %t0) {
|
||||||
; CHECK-LABEL: @pr26015(
|
; CHECK-LABEL: @pr26015(
|
||||||
; CHECK-NEXT: [[TMP1:%.*]] = shufflevector <4 x i16> [[T0:%.*]], <4 x i16> undef, <8 x i32> <i32 undef, i32 undef, i32 2, i32 3, i32 undef, i32 undef, i32 undef, i32 undef>
|
; CHECK-NEXT: [[TMP1:%.*]] = shufflevector <4 x i16> [[T0:%.*]], <4 x i16> poison, <8 x i32> <i32 undef, i32 undef, i32 2, i32 3, i32 undef, i32 undef, i32 undef, i32 undef>
|
||||||
; CHECK-NEXT: [[T5:%.*]] = shufflevector <8 x i16> <i16 0, i16 0, i16 0, i16 poison, i16 0, i16 0, i16 0, i16 poison>, <8 x i16> [[TMP1]], <8 x i32> <i32 0, i32 1, i32 2, i32 10, i32 4, i32 5, i32 6, i32 11>
|
; CHECK-NEXT: [[T5:%.*]] = shufflevector <8 x i16> <i16 0, i16 0, i16 0, i16 poison, i16 0, i16 0, i16 0, i16 poison>, <8 x i16> [[TMP1]], <8 x i32> <i32 0, i32 1, i32 2, i32 10, i32 4, i32 5, i32 6, i32 11>
|
||||||
; CHECK-NEXT: ret <8 x i16> [[T5]]
|
; CHECK-NEXT: ret <8 x i16> [[T5]]
|
||||||
;
|
;
|
||||||
|
|
@ -106,7 +106,7 @@ define <8 x i16> @pr25999(<4 x i16> %t0, i1 %b) {
|
||||||
; CHECK-NEXT: [[T1:%.*]] = extractelement <4 x i16> [[T0:%.*]], i32 2
|
; CHECK-NEXT: [[T1:%.*]] = extractelement <4 x i16> [[T0:%.*]], i32 2
|
||||||
; CHECK-NEXT: br i1 [[B:%.*]], label [[IF:%.*]], label [[END:%.*]]
|
; CHECK-NEXT: br i1 [[B:%.*]], label [[IF:%.*]], label [[END:%.*]]
|
||||||
; CHECK: if:
|
; CHECK: if:
|
||||||
; CHECK-NEXT: [[TMP1:%.*]] = shufflevector <4 x i16> [[T0]], <4 x i16> undef, <8 x i32> <i32 undef, i32 undef, i32 undef, i32 3, i32 undef, i32 undef, i32 undef, i32 undef>
|
; CHECK-NEXT: [[TMP1:%.*]] = shufflevector <4 x i16> [[T0]], <4 x i16> poison, <8 x i32> <i32 undef, i32 undef, i32 undef, i32 3, i32 undef, i32 undef, i32 undef, i32 undef>
|
||||||
; CHECK-NEXT: [[T3:%.*]] = insertelement <8 x i16> <i16 0, i16 0, i16 0, i16 poison, i16 0, i16 0, i16 0, i16 poison>, i16 [[T1]], i32 3
|
; CHECK-NEXT: [[T3:%.*]] = insertelement <8 x i16> <i16 0, i16 0, i16 0, i16 poison, i16 0, i16 0, i16 0, i16 poison>, i16 [[T1]], i32 3
|
||||||
; CHECK-NEXT: [[T5:%.*]] = shufflevector <8 x i16> [[T3]], <8 x i16> [[TMP1]], <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 11>
|
; CHECK-NEXT: [[T5:%.*]] = shufflevector <8 x i16> [[T3]], <8 x i16> [[TMP1]], <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 11>
|
||||||
; CHECK-NEXT: ret <8 x i16> [[T5]]
|
; CHECK-NEXT: ret <8 x i16> [[T5]]
|
||||||
|
|
@ -144,7 +144,7 @@ define <4 x double> @pr25999_phis1(i1 %c, <2 x double> %a, <4 x double> %b) {
|
||||||
; CHECK: bb3:
|
; CHECK: bb3:
|
||||||
; CHECK-NEXT: [[TMP1:%.*]] = phi <2 x double> [ [[A]], [[BB1:%.*]] ], [ [[R]], [[BB2]] ]
|
; CHECK-NEXT: [[TMP1:%.*]] = phi <2 x double> [ [[A]], [[BB1:%.*]] ], [ [[R]], [[BB2]] ]
|
||||||
; CHECK-NEXT: [[TMP2:%.*]] = phi <4 x double> [ [[B:%.*]], [[BB1]] ], [ zeroinitializer, [[BB2]] ]
|
; CHECK-NEXT: [[TMP2:%.*]] = phi <4 x double> [ [[B:%.*]], [[BB1]] ], [ zeroinitializer, [[BB2]] ]
|
||||||
; CHECK-NEXT: [[TMP0:%.*]] = shufflevector <2 x double> [[TMP1]], <2 x double> undef, <4 x i32> <i32 0, i32 undef, i32 undef, i32 undef>
|
; CHECK-NEXT: [[TMP0:%.*]] = shufflevector <2 x double> [[TMP1]], <2 x double> poison, <4 x i32> <i32 0, i32 undef, i32 undef, i32 undef>
|
||||||
; CHECK-NEXT: [[TMP4:%.*]] = shufflevector <4 x double> [[TMP2]], <4 x double> [[TMP0]], <4 x i32> <i32 0, i32 1, i32 4, i32 3>
|
; CHECK-NEXT: [[TMP4:%.*]] = shufflevector <4 x double> [[TMP2]], <4 x double> [[TMP0]], <4 x i32> <i32 0, i32 1, i32 4, i32 3>
|
||||||
; CHECK-NEXT: ret <4 x double> [[TMP4]]
|
; CHECK-NEXT: ret <4 x double> [[TMP4]]
|
||||||
;
|
;
|
||||||
|
|
@ -176,7 +176,7 @@ define <4 x double> @pr25999_phis2(i1 %c, <2 x double> %a, <4 x double> %b) {
|
||||||
; CHECK-NEXT: [[TMP1:%.*]] = phi <2 x double> [ [[A]], [[BB1:%.*]] ], [ [[R]], [[BB2]] ]
|
; CHECK-NEXT: [[TMP1:%.*]] = phi <2 x double> [ [[A]], [[BB1:%.*]] ], [ [[R]], [[BB2]] ]
|
||||||
; CHECK-NEXT: [[TMP2:%.*]] = phi <4 x double> [ [[B:%.*]], [[BB1]] ], [ zeroinitializer, [[BB2]] ]
|
; CHECK-NEXT: [[TMP2:%.*]] = phi <4 x double> [ [[B:%.*]], [[BB1]] ], [ zeroinitializer, [[BB2]] ]
|
||||||
; CHECK-NEXT: [[D:%.*]] = fadd <2 x double> [[TMP1]], [[TMP1]]
|
; CHECK-NEXT: [[D:%.*]] = fadd <2 x double> [[TMP1]], [[TMP1]]
|
||||||
; CHECK-NEXT: [[TMP0:%.*]] = shufflevector <2 x double> [[D]], <2 x double> undef, <4 x i32> <i32 0, i32 undef, i32 undef, i32 undef>
|
; CHECK-NEXT: [[TMP0:%.*]] = shufflevector <2 x double> [[D]], <2 x double> poison, <4 x i32> <i32 0, i32 undef, i32 undef, i32 undef>
|
||||||
; CHECK-NEXT: [[TMP4:%.*]] = shufflevector <4 x double> [[TMP2]], <4 x double> [[TMP0]], <4 x i32> <i32 0, i32 1, i32 4, i32 3>
|
; CHECK-NEXT: [[TMP4:%.*]] = shufflevector <4 x double> [[TMP2]], <4 x double> [[TMP0]], <4 x i32> <i32 0, i32 1, i32 4, i32 3>
|
||||||
; CHECK-NEXT: ret <4 x double> [[TMP4]]
|
; CHECK-NEXT: ret <4 x double> [[TMP4]]
|
||||||
;
|
;
|
||||||
|
|
@ -266,7 +266,7 @@ bb2:
|
||||||
define <4 x i32> @extractelt_insertion(<2 x i32> %x, i32 %y) {
|
define <4 x i32> @extractelt_insertion(<2 x i32> %x, i32 %y) {
|
||||||
; CHECK-LABEL: @extractelt_insertion(
|
; CHECK-LABEL: @extractelt_insertion(
|
||||||
; CHECK-NEXT: entry:
|
; CHECK-NEXT: entry:
|
||||||
; CHECK-NEXT: [[TMP0:%.*]] = shufflevector <2 x i32> [[X:%.*]], <2 x i32> undef, <4 x i32> <i32 0, i32 1, i32 undef, i32 undef>
|
; CHECK-NEXT: [[TMP0:%.*]] = shufflevector <2 x i32> [[X:%.*]], <2 x i32> poison, <4 x i32> <i32 0, i32 1, i32 undef, i32 undef>
|
||||||
; CHECK-NEXT: [[B:%.*]] = shufflevector <4 x i32> <i32 0, i32 0, i32 0, i32 poison>, <4 x i32> [[TMP0]], <4 x i32> <i32 0, i32 1, i32 2, i32 5>
|
; CHECK-NEXT: [[B:%.*]] = shufflevector <4 x i32> <i32 0, i32 0, i32 0, i32 poison>, <4 x i32> [[TMP0]], <4 x i32> <i32 0, i32 1, i32 2, i32 5>
|
||||||
; CHECK-NEXT: [[C:%.*]] = add i32 [[Y:%.*]], 3
|
; CHECK-NEXT: [[C:%.*]] = add i32 [[Y:%.*]], 3
|
||||||
; CHECK-NEXT: [[TMP1:%.*]] = extractelement <4 x i32> [[TMP0]], i32 [[C]]
|
; CHECK-NEXT: [[TMP1:%.*]] = extractelement <4 x i32> [[TMP0]], i32 [[C]]
|
||||||
|
|
|
||||||
|
|
@ -31,7 +31,7 @@ define <4 x i16> @test2(<8 x i16> %in, <8 x i16> %in2) {
|
||||||
|
|
||||||
define <2 x i64> @test_vcopyq_lane_p64(<2 x i64> %a, <1 x i64> %b) {
|
define <2 x i64> @test_vcopyq_lane_p64(<2 x i64> %a, <1 x i64> %b) {
|
||||||
; CHECK-LABEL: @test_vcopyq_lane_p64(
|
; CHECK-LABEL: @test_vcopyq_lane_p64(
|
||||||
; CHECK-NEXT: [[TMP1:%.*]] = shufflevector <1 x i64> [[B:%.*]], <1 x i64> undef, <2 x i32> <i32 0, i32 undef>
|
; CHECK-NEXT: [[TMP1:%.*]] = shufflevector <1 x i64> [[B:%.*]], <1 x i64> poison, <2 x i32> <i32 0, i32 undef>
|
||||||
; CHECK-NEXT: [[RES:%.*]] = shufflevector <2 x i64> [[A:%.*]], <2 x i64> [[TMP1]], <2 x i32> <i32 0, i32 2>
|
; CHECK-NEXT: [[RES:%.*]] = shufflevector <2 x i64> [[A:%.*]], <2 x i64> [[TMP1]], <2 x i32> <i32 0, i32 2>
|
||||||
; CHECK-NEXT: ret <2 x i64> [[RES]]
|
; CHECK-NEXT: ret <2 x i64> [[RES]]
|
||||||
;
|
;
|
||||||
|
|
@ -44,7 +44,7 @@ define <2 x i64> @test_vcopyq_lane_p64(<2 x i64> %a, <1 x i64> %b) {
|
||||||
|
|
||||||
define <4 x float> @widen_extract2(<4 x float> %ins, <2 x float> %ext) {
|
define <4 x float> @widen_extract2(<4 x float> %ins, <2 x float> %ext) {
|
||||||
; CHECK-LABEL: @widen_extract2(
|
; CHECK-LABEL: @widen_extract2(
|
||||||
; CHECK-NEXT: [[TMP1:%.*]] = shufflevector <2 x float> [[EXT:%.*]], <2 x float> undef, <4 x i32> <i32 0, i32 1, i32 undef, i32 undef>
|
; CHECK-NEXT: [[TMP1:%.*]] = shufflevector <2 x float> [[EXT:%.*]], <2 x float> poison, <4 x i32> <i32 0, i32 1, i32 undef, i32 undef>
|
||||||
; CHECK-NEXT: [[I2:%.*]] = shufflevector <4 x float> [[INS:%.*]], <4 x float> [[TMP1]], <4 x i32> <i32 0, i32 4, i32 2, i32 5>
|
; CHECK-NEXT: [[I2:%.*]] = shufflevector <4 x float> [[INS:%.*]], <4 x float> [[TMP1]], <4 x i32> <i32 0, i32 4, i32 2, i32 5>
|
||||||
; CHECK-NEXT: ret <4 x float> [[I2]]
|
; CHECK-NEXT: ret <4 x float> [[I2]]
|
||||||
;
|
;
|
||||||
|
|
@ -57,7 +57,7 @@ define <4 x float> @widen_extract2(<4 x float> %ins, <2 x float> %ext) {
|
||||||
|
|
||||||
define <4 x float> @widen_extract3(<4 x float> %ins, <3 x float> %ext) {
|
define <4 x float> @widen_extract3(<4 x float> %ins, <3 x float> %ext) {
|
||||||
; CHECK-LABEL: @widen_extract3(
|
; CHECK-LABEL: @widen_extract3(
|
||||||
; CHECK-NEXT: [[TMP1:%.*]] = shufflevector <3 x float> [[EXT:%.*]], <3 x float> undef, <4 x i32> <i32 0, i32 1, i32 2, i32 undef>
|
; CHECK-NEXT: [[TMP1:%.*]] = shufflevector <3 x float> [[EXT:%.*]], <3 x float> poison, <4 x i32> <i32 0, i32 1, i32 2, i32 undef>
|
||||||
; CHECK-NEXT: [[I3:%.*]] = shufflevector <4 x float> [[INS:%.*]], <4 x float> [[TMP1]], <4 x i32> <i32 6, i32 5, i32 4, i32 3>
|
; CHECK-NEXT: [[I3:%.*]] = shufflevector <4 x float> [[INS:%.*]], <4 x float> [[TMP1]], <4 x i32> <i32 6, i32 5, i32 4, i32 3>
|
||||||
; CHECK-NEXT: ret <4 x float> [[I3]]
|
; CHECK-NEXT: ret <4 x float> [[I3]]
|
||||||
;
|
;
|
||||||
|
|
@ -72,7 +72,7 @@ define <4 x float> @widen_extract3(<4 x float> %ins, <3 x float> %ext) {
|
||||||
|
|
||||||
define <8 x float> @widen_extract4(<8 x float> %ins, <2 x float> %ext) {
|
define <8 x float> @widen_extract4(<8 x float> %ins, <2 x float> %ext) {
|
||||||
; CHECK-LABEL: @widen_extract4(
|
; CHECK-LABEL: @widen_extract4(
|
||||||
; CHECK-NEXT: [[TMP1:%.*]] = shufflevector <2 x float> [[EXT:%.*]], <2 x float> undef, <8 x i32> <i32 0, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef>
|
; CHECK-NEXT: [[TMP1:%.*]] = shufflevector <2 x float> [[EXT:%.*]], <2 x float> poison, <8 x i32> <i32 0, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef>
|
||||||
; CHECK-NEXT: [[I1:%.*]] = shufflevector <8 x float> [[INS:%.*]], <8 x float> [[TMP1]], <8 x i32> <i32 0, i32 1, i32 8, i32 3, i32 4, i32 5, i32 6, i32 7>
|
; CHECK-NEXT: [[I1:%.*]] = shufflevector <8 x float> [[INS:%.*]], <8 x float> [[TMP1]], <8 x i32> <i32 0, i32 1, i32 8, i32 3, i32 4, i32 5, i32 6, i32 7>
|
||||||
; CHECK-NEXT: ret <8 x float> [[I1]]
|
; CHECK-NEXT: ret <8 x float> [[I1]]
|
||||||
;
|
;
|
||||||
|
|
@ -86,7 +86,7 @@ define <8 x float> @widen_extract4(<8 x float> %ins, <2 x float> %ext) {
|
||||||
|
|
||||||
define <8 x i16> @pr26015(<4 x i16> %t0) {
|
define <8 x i16> @pr26015(<4 x i16> %t0) {
|
||||||
; CHECK-LABEL: @pr26015(
|
; CHECK-LABEL: @pr26015(
|
||||||
; CHECK-NEXT: [[TMP1:%.*]] = shufflevector <4 x i16> [[T0:%.*]], <4 x i16> undef, <8 x i32> <i32 undef, i32 undef, i32 2, i32 3, i32 undef, i32 undef, i32 undef, i32 undef>
|
; CHECK-NEXT: [[TMP1:%.*]] = shufflevector <4 x i16> [[T0:%.*]], <4 x i16> poison, <8 x i32> <i32 undef, i32 undef, i32 2, i32 3, i32 undef, i32 undef, i32 undef, i32 undef>
|
||||||
; CHECK-NEXT: [[T5:%.*]] = shufflevector <8 x i16> <i16 0, i16 0, i16 0, i16 poison, i16 0, i16 0, i16 0, i16 poison>, <8 x i16> [[TMP1]], <8 x i32> <i32 0, i32 1, i32 2, i32 10, i32 4, i32 5, i32 6, i32 11>
|
; CHECK-NEXT: [[T5:%.*]] = shufflevector <8 x i16> <i16 0, i16 0, i16 0, i16 poison, i16 0, i16 0, i16 0, i16 poison>, <8 x i16> [[TMP1]], <8 x i32> <i32 0, i32 1, i32 2, i32 10, i32 4, i32 5, i32 6, i32 11>
|
||||||
; CHECK-NEXT: ret <8 x i16> [[T5]]
|
; CHECK-NEXT: ret <8 x i16> [[T5]]
|
||||||
;
|
;
|
||||||
|
|
@ -106,7 +106,7 @@ define <8 x i16> @pr25999(<4 x i16> %t0, i1 %b) {
|
||||||
; CHECK-NEXT: [[T1:%.*]] = extractelement <4 x i16> [[T0:%.*]], i32 2
|
; CHECK-NEXT: [[T1:%.*]] = extractelement <4 x i16> [[T0:%.*]], i32 2
|
||||||
; CHECK-NEXT: br i1 [[B:%.*]], label [[IF:%.*]], label [[END:%.*]]
|
; CHECK-NEXT: br i1 [[B:%.*]], label [[IF:%.*]], label [[END:%.*]]
|
||||||
; CHECK: if:
|
; CHECK: if:
|
||||||
; CHECK-NEXT: [[TMP1:%.*]] = shufflevector <4 x i16> [[T0]], <4 x i16> undef, <8 x i32> <i32 undef, i32 undef, i32 undef, i32 3, i32 undef, i32 undef, i32 undef, i32 undef>
|
; CHECK-NEXT: [[TMP1:%.*]] = shufflevector <4 x i16> [[T0]], <4 x i16> poison, <8 x i32> <i32 undef, i32 undef, i32 undef, i32 3, i32 undef, i32 undef, i32 undef, i32 undef>
|
||||||
; CHECK-NEXT: [[T3:%.*]] = insertelement <8 x i16> <i16 0, i16 0, i16 0, i16 poison, i16 0, i16 0, i16 0, i16 poison>, i16 [[T1]], i32 3
|
; CHECK-NEXT: [[T3:%.*]] = insertelement <8 x i16> <i16 0, i16 0, i16 0, i16 poison, i16 0, i16 0, i16 0, i16 poison>, i16 [[T1]], i32 3
|
||||||
; CHECK-NEXT: [[T5:%.*]] = shufflevector <8 x i16> [[T3]], <8 x i16> [[TMP1]], <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 11>
|
; CHECK-NEXT: [[T5:%.*]] = shufflevector <8 x i16> [[T3]], <8 x i16> [[TMP1]], <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 11>
|
||||||
; CHECK-NEXT: ret <8 x i16> [[T5]]
|
; CHECK-NEXT: ret <8 x i16> [[T5]]
|
||||||
|
|
@ -144,7 +144,7 @@ define <4 x double> @pr25999_phis1(i1 %c, <2 x double> %a, <4 x double> %b) {
|
||||||
; CHECK: bb3:
|
; CHECK: bb3:
|
||||||
; CHECK-NEXT: [[TMP1:%.*]] = phi <2 x double> [ [[A]], [[BB1:%.*]] ], [ [[R]], [[BB2]] ]
|
; CHECK-NEXT: [[TMP1:%.*]] = phi <2 x double> [ [[A]], [[BB1:%.*]] ], [ [[R]], [[BB2]] ]
|
||||||
; CHECK-NEXT: [[TMP2:%.*]] = phi <4 x double> [ [[B:%.*]], [[BB1]] ], [ zeroinitializer, [[BB2]] ]
|
; CHECK-NEXT: [[TMP2:%.*]] = phi <4 x double> [ [[B:%.*]], [[BB1]] ], [ zeroinitializer, [[BB2]] ]
|
||||||
; CHECK-NEXT: [[TMP0:%.*]] = shufflevector <2 x double> [[TMP1]], <2 x double> undef, <4 x i32> <i32 0, i32 undef, i32 undef, i32 undef>
|
; CHECK-NEXT: [[TMP0:%.*]] = shufflevector <2 x double> [[TMP1]], <2 x double> poison, <4 x i32> <i32 0, i32 undef, i32 undef, i32 undef>
|
||||||
; CHECK-NEXT: [[TMP4:%.*]] = shufflevector <4 x double> [[TMP2]], <4 x double> [[TMP0]], <4 x i32> <i32 0, i32 1, i32 4, i32 3>
|
; CHECK-NEXT: [[TMP4:%.*]] = shufflevector <4 x double> [[TMP2]], <4 x double> [[TMP0]], <4 x i32> <i32 0, i32 1, i32 4, i32 3>
|
||||||
; CHECK-NEXT: ret <4 x double> [[TMP4]]
|
; CHECK-NEXT: ret <4 x double> [[TMP4]]
|
||||||
;
|
;
|
||||||
|
|
@ -176,7 +176,7 @@ define <4 x double> @pr25999_phis2(i1 %c, <2 x double> %a, <4 x double> %b) {
|
||||||
; CHECK-NEXT: [[TMP1:%.*]] = phi <2 x double> [ [[A]], [[BB1:%.*]] ], [ [[R]], [[BB2]] ]
|
; CHECK-NEXT: [[TMP1:%.*]] = phi <2 x double> [ [[A]], [[BB1:%.*]] ], [ [[R]], [[BB2]] ]
|
||||||
; CHECK-NEXT: [[TMP2:%.*]] = phi <4 x double> [ [[B:%.*]], [[BB1]] ], [ zeroinitializer, [[BB2]] ]
|
; CHECK-NEXT: [[TMP2:%.*]] = phi <4 x double> [ [[B:%.*]], [[BB1]] ], [ zeroinitializer, [[BB2]] ]
|
||||||
; CHECK-NEXT: [[D:%.*]] = fadd <2 x double> [[TMP1]], [[TMP1]]
|
; CHECK-NEXT: [[D:%.*]] = fadd <2 x double> [[TMP1]], [[TMP1]]
|
||||||
; CHECK-NEXT: [[TMP0:%.*]] = shufflevector <2 x double> [[D]], <2 x double> undef, <4 x i32> <i32 0, i32 undef, i32 undef, i32 undef>
|
; CHECK-NEXT: [[TMP0:%.*]] = shufflevector <2 x double> [[D]], <2 x double> poison, <4 x i32> <i32 0, i32 undef, i32 undef, i32 undef>
|
||||||
; CHECK-NEXT: [[TMP4:%.*]] = shufflevector <4 x double> [[TMP2]], <4 x double> [[TMP0]], <4 x i32> <i32 0, i32 1, i32 4, i32 3>
|
; CHECK-NEXT: [[TMP4:%.*]] = shufflevector <4 x double> [[TMP2]], <4 x double> [[TMP0]], <4 x i32> <i32 0, i32 1, i32 4, i32 3>
|
||||||
; CHECK-NEXT: ret <4 x double> [[TMP4]]
|
; CHECK-NEXT: ret <4 x double> [[TMP4]]
|
||||||
;
|
;
|
||||||
|
|
@ -266,7 +266,7 @@ bb2:
|
||||||
define <4 x i32> @extractelt_insertion(<2 x i32> %x, i32 %y) {
|
define <4 x i32> @extractelt_insertion(<2 x i32> %x, i32 %y) {
|
||||||
; CHECK-LABEL: @extractelt_insertion(
|
; CHECK-LABEL: @extractelt_insertion(
|
||||||
; CHECK-NEXT: entry:
|
; CHECK-NEXT: entry:
|
||||||
; CHECK-NEXT: [[TMP0:%.*]] = shufflevector <2 x i32> [[X:%.*]], <2 x i32> undef, <4 x i32> <i32 0, i32 1, i32 undef, i32 undef>
|
; CHECK-NEXT: [[TMP0:%.*]] = shufflevector <2 x i32> [[X:%.*]], <2 x i32> poison, <4 x i32> <i32 0, i32 1, i32 undef, i32 undef>
|
||||||
; CHECK-NEXT: [[B:%.*]] = shufflevector <4 x i32> <i32 0, i32 0, i32 0, i32 poison>, <4 x i32> [[TMP0]], <4 x i32> <i32 0, i32 1, i32 2, i32 5>
|
; CHECK-NEXT: [[B:%.*]] = shufflevector <4 x i32> <i32 0, i32 0, i32 0, i32 poison>, <4 x i32> [[TMP0]], <4 x i32> <i32 0, i32 1, i32 2, i32 5>
|
||||||
; CHECK-NEXT: [[C:%.*]] = add i32 [[Y:%.*]], 3
|
; CHECK-NEXT: [[C:%.*]] = add i32 [[Y:%.*]], 3
|
||||||
; CHECK-NEXT: [[TMP1:%.*]] = extractelement <4 x i32> [[TMP0]], i32 [[C]]
|
; CHECK-NEXT: [[TMP1:%.*]] = extractelement <4 x i32> [[TMP0]], i32 [[C]]
|
||||||
|
|
|
||||||
|
|
@ -46,7 +46,7 @@ define <2 x double> @load_cemask(<2 x double>* %ptr, <2 x double> %passthru) {
|
||||||
|
|
||||||
define <2 x double> @load_lane0(<2 x double>* %ptr, double %pt) {
|
define <2 x double> @load_lane0(<2 x double>* %ptr, double %pt) {
|
||||||
; CHECK-LABEL: @load_lane0(
|
; CHECK-LABEL: @load_lane0(
|
||||||
; CHECK-NEXT: [[PTV2:%.*]] = insertelement <2 x double> undef, double [[PT:%.*]], i64 1
|
; CHECK-NEXT: [[PTV2:%.*]] = insertelement <2 x double> poison, double [[PT:%.*]], i64 1
|
||||||
; CHECK-NEXT: [[RES:%.*]] = call <2 x double> @llvm.masked.load.v2f64.p0v2f64(<2 x double>* [[PTR:%.*]], i32 2, <2 x i1> <i1 true, i1 false>, <2 x double> [[PTV2]])
|
; CHECK-NEXT: [[RES:%.*]] = call <2 x double> @llvm.masked.load.v2f64.p0v2f64(<2 x double>* [[PTR:%.*]], i32 2, <2 x i1> <i1 true, i1 false>, <2 x double> [[PTV2]])
|
||||||
; CHECK-NEXT: ret <2 x double> [[RES]]
|
; CHECK-NEXT: ret <2 x double> [[RES]]
|
||||||
;
|
;
|
||||||
|
|
@ -72,7 +72,7 @@ define double @load_all(double* %base, double %pt) {
|
||||||
define <2 x double> @load_generic(<2 x double>* %ptr, double %pt, <2 x i1> %mask) {
|
define <2 x double> @load_generic(<2 x double>* %ptr, double %pt, <2 x i1> %mask) {
|
||||||
; CHECK-LABEL: @load_generic(
|
; CHECK-LABEL: @load_generic(
|
||||||
; CHECK-NEXT: [[PTV1:%.*]] = insertelement <2 x double> poison, double [[PT:%.*]], i64 0
|
; CHECK-NEXT: [[PTV1:%.*]] = insertelement <2 x double> poison, double [[PT:%.*]], i64 0
|
||||||
; CHECK-NEXT: [[PTV2:%.*]] = shufflevector <2 x double> [[PTV1]], <2 x double> undef, <2 x i32> zeroinitializer
|
; CHECK-NEXT: [[PTV2:%.*]] = shufflevector <2 x double> [[PTV1]], <2 x double> poison, <2 x i32> zeroinitializer
|
||||||
; CHECK-NEXT: [[RES:%.*]] = call <2 x double> @llvm.masked.load.v2f64.p0v2f64(<2 x double>* [[PTR:%.*]], i32 4, <2 x i1> [[MASK:%.*]], <2 x double> [[PTV2]])
|
; CHECK-NEXT: [[RES:%.*]] = call <2 x double> @llvm.masked.load.v2f64.p0v2f64(<2 x double>* [[PTR:%.*]], i32 4, <2 x i1> [[MASK:%.*]], <2 x double> [[PTV2]])
|
||||||
; CHECK-NEXT: ret <2 x double> [[RES]]
|
; CHECK-NEXT: ret <2 x double> [[RES]]
|
||||||
;
|
;
|
||||||
|
|
@ -85,7 +85,7 @@ define <2 x double> @load_generic(<2 x double>* %ptr, double %pt, <2 x i1> %mask
|
||||||
define <2 x double> @load_speculative(<2 x double>* dereferenceable(16) align 4 %ptr, double %pt, <2 x i1> %mask) {
|
define <2 x double> @load_speculative(<2 x double>* dereferenceable(16) align 4 %ptr, double %pt, <2 x i1> %mask) {
|
||||||
; CHECK-LABEL: @load_speculative(
|
; CHECK-LABEL: @load_speculative(
|
||||||
; CHECK-NEXT: [[PTV1:%.*]] = insertelement <2 x double> poison, double [[PT:%.*]], i64 0
|
; CHECK-NEXT: [[PTV1:%.*]] = insertelement <2 x double> poison, double [[PT:%.*]], i64 0
|
||||||
; CHECK-NEXT: [[PTV2:%.*]] = shufflevector <2 x double> [[PTV1]], <2 x double> undef, <2 x i32> zeroinitializer
|
; CHECK-NEXT: [[PTV2:%.*]] = shufflevector <2 x double> [[PTV1]], <2 x double> poison, <2 x i32> zeroinitializer
|
||||||
; CHECK-NEXT: [[UNMASKEDLOAD:%.*]] = load <2 x double>, <2 x double>* [[PTR:%.*]], align 4
|
; CHECK-NEXT: [[UNMASKEDLOAD:%.*]] = load <2 x double>, <2 x double>* [[PTR:%.*]], align 4
|
||||||
; CHECK-NEXT: [[TMP1:%.*]] = select <2 x i1> [[MASK:%.*]], <2 x double> [[UNMASKEDLOAD]], <2 x double> [[PTV2]]
|
; CHECK-NEXT: [[TMP1:%.*]] = select <2 x i1> [[MASK:%.*]], <2 x double> [[UNMASKEDLOAD]], <2 x double> [[PTV2]]
|
||||||
; CHECK-NEXT: ret <2 x double> [[TMP1]]
|
; CHECK-NEXT: ret <2 x double> [[TMP1]]
|
||||||
|
|
@ -99,7 +99,7 @@ define <2 x double> @load_speculative(<2 x double>* dereferenceable(16) align 4
|
||||||
define <2 x double> @load_speculative_less_aligned(<2 x double>* dereferenceable(16) %ptr, double %pt, <2 x i1> %mask) {
|
define <2 x double> @load_speculative_less_aligned(<2 x double>* dereferenceable(16) %ptr, double %pt, <2 x i1> %mask) {
|
||||||
; CHECK-LABEL: @load_speculative_less_aligned(
|
; CHECK-LABEL: @load_speculative_less_aligned(
|
||||||
; CHECK-NEXT: [[PTV1:%.*]] = insertelement <2 x double> poison, double [[PT:%.*]], i64 0
|
; CHECK-NEXT: [[PTV1:%.*]] = insertelement <2 x double> poison, double [[PT:%.*]], i64 0
|
||||||
; CHECK-NEXT: [[PTV2:%.*]] = shufflevector <2 x double> [[PTV1]], <2 x double> undef, <2 x i32> zeroinitializer
|
; CHECK-NEXT: [[PTV2:%.*]] = shufflevector <2 x double> [[PTV1]], <2 x double> poison, <2 x i32> zeroinitializer
|
||||||
; CHECK-NEXT: [[UNMASKEDLOAD:%.*]] = load <2 x double>, <2 x double>* [[PTR:%.*]], align 4
|
; CHECK-NEXT: [[UNMASKEDLOAD:%.*]] = load <2 x double>, <2 x double>* [[PTR:%.*]], align 4
|
||||||
; CHECK-NEXT: [[TMP1:%.*]] = select <2 x i1> [[MASK:%.*]], <2 x double> [[UNMASKEDLOAD]], <2 x double> [[PTV2]]
|
; CHECK-NEXT: [[TMP1:%.*]] = select <2 x i1> [[MASK:%.*]], <2 x double> [[UNMASKEDLOAD]], <2 x double> [[PTV2]]
|
||||||
; CHECK-NEXT: ret <2 x double> [[TMP1]]
|
; CHECK-NEXT: ret <2 x double> [[TMP1]]
|
||||||
|
|
@ -115,7 +115,7 @@ define <2 x double> @load_speculative_less_aligned(<2 x double>* dereferenceable
|
||||||
define <2 x double> @load_spec_neg_size(<2 x double>* dereferenceable(8) %ptr, double %pt, <2 x i1> %mask) {
|
define <2 x double> @load_spec_neg_size(<2 x double>* dereferenceable(8) %ptr, double %pt, <2 x i1> %mask) {
|
||||||
; CHECK-LABEL: @load_spec_neg_size(
|
; CHECK-LABEL: @load_spec_neg_size(
|
||||||
; CHECK-NEXT: [[PTV1:%.*]] = insertelement <2 x double> poison, double [[PT:%.*]], i64 0
|
; CHECK-NEXT: [[PTV1:%.*]] = insertelement <2 x double> poison, double [[PT:%.*]], i64 0
|
||||||
; CHECK-NEXT: [[PTV2:%.*]] = shufflevector <2 x double> [[PTV1]], <2 x double> undef, <2 x i32> zeroinitializer
|
; CHECK-NEXT: [[PTV2:%.*]] = shufflevector <2 x double> [[PTV1]], <2 x double> poison, <2 x i32> zeroinitializer
|
||||||
; CHECK-NEXT: [[RES:%.*]] = call <2 x double> @llvm.masked.load.v2f64.p0v2f64(<2 x double>* nonnull [[PTR:%.*]], i32 4, <2 x i1> [[MASK:%.*]], <2 x double> [[PTV2]])
|
; CHECK-NEXT: [[RES:%.*]] = call <2 x double> @llvm.masked.load.v2f64.p0v2f64(<2 x double>* nonnull [[PTR:%.*]], i32 4, <2 x i1> [[MASK:%.*]], <2 x double> [[PTV2]])
|
||||||
; CHECK-NEXT: ret <2 x double> [[RES]]
|
; CHECK-NEXT: ret <2 x double> [[RES]]
|
||||||
;
|
;
|
||||||
|
|
@ -129,7 +129,7 @@ define <2 x double> @load_spec_neg_size(<2 x double>* dereferenceable(8) %ptr, d
|
||||||
define <2 x double> @load_spec_lan0(<2 x double>* dereferenceable(8) %ptr, double %pt, <2 x i1> %mask) {
|
define <2 x double> @load_spec_lan0(<2 x double>* dereferenceable(8) %ptr, double %pt, <2 x i1> %mask) {
|
||||||
; CHECK-LABEL: @load_spec_lan0(
|
; CHECK-LABEL: @load_spec_lan0(
|
||||||
; CHECK-NEXT: [[PTV1:%.*]] = insertelement <2 x double> poison, double [[PT:%.*]], i64 0
|
; CHECK-NEXT: [[PTV1:%.*]] = insertelement <2 x double> poison, double [[PT:%.*]], i64 0
|
||||||
; CHECK-NEXT: [[PTV2:%.*]] = shufflevector <2 x double> [[PTV1]], <2 x double> undef, <2 x i32> zeroinitializer
|
; CHECK-NEXT: [[PTV2:%.*]] = shufflevector <2 x double> [[PTV1]], <2 x double> poison, <2 x i32> zeroinitializer
|
||||||
; CHECK-NEXT: [[MASK2:%.*]] = insertelement <2 x i1> [[MASK:%.*]], i1 false, i64 1
|
; CHECK-NEXT: [[MASK2:%.*]] = insertelement <2 x i1> [[MASK:%.*]], i1 false, i64 1
|
||||||
; CHECK-NEXT: [[RES:%.*]] = call <2 x double> @llvm.masked.load.v2f64.p0v2f64(<2 x double>* nonnull [[PTR:%.*]], i32 4, <2 x i1> [[MASK2]], <2 x double> [[PTV2]])
|
; CHECK-NEXT: [[RES:%.*]] = call <2 x double> @llvm.masked.load.v2f64.p0v2f64(<2 x double>* nonnull [[PTR:%.*]], i32 4, <2 x i1> [[MASK2]], <2 x double> [[PTV2]])
|
||||||
; CHECK-NEXT: ret <2 x double> [[RES]]
|
; CHECK-NEXT: ret <2 x double> [[RES]]
|
||||||
|
|
@ -217,7 +217,7 @@ define <2 x double> @gather_lane0_maybe(double* %base, double %pt, <2 x i1> %mas
|
||||||
; CHECK-LABEL: @gather_lane0_maybe(
|
; CHECK-LABEL: @gather_lane0_maybe(
|
||||||
; CHECK-NEXT: [[PTRS:%.*]] = getelementptr double, double* [[BASE:%.*]], <2 x i64> <i64 0, i64 1>
|
; CHECK-NEXT: [[PTRS:%.*]] = getelementptr double, double* [[BASE:%.*]], <2 x i64> <i64 0, i64 1>
|
||||||
; CHECK-NEXT: [[PT_V1:%.*]] = insertelement <2 x double> poison, double [[PT:%.*]], i64 0
|
; CHECK-NEXT: [[PT_V1:%.*]] = insertelement <2 x double> poison, double [[PT:%.*]], i64 0
|
||||||
; CHECK-NEXT: [[PT_V2:%.*]] = shufflevector <2 x double> [[PT_V1]], <2 x double> undef, <2 x i32> zeroinitializer
|
; CHECK-NEXT: [[PT_V2:%.*]] = shufflevector <2 x double> [[PT_V1]], <2 x double> poison, <2 x i32> zeroinitializer
|
||||||
; CHECK-NEXT: [[MASK2:%.*]] = insertelement <2 x i1> [[MASK:%.*]], i1 false, i64 1
|
; CHECK-NEXT: [[MASK2:%.*]] = insertelement <2 x i1> [[MASK:%.*]], i1 false, i64 1
|
||||||
; CHECK-NEXT: [[RES:%.*]] = call <2 x double> @llvm.masked.gather.v2f64.v2p0f64(<2 x double*> [[PTRS]], i32 4, <2 x i1> [[MASK2]], <2 x double> [[PT_V2]])
|
; CHECK-NEXT: [[RES:%.*]] = call <2 x double> @llvm.masked.gather.v2f64.v2p0f64(<2 x double*> [[PTRS]], i32 4, <2 x i1> [[MASK2]], <2 x double> [[PT_V2]])
|
||||||
; CHECK-NEXT: ret <2 x double> [[RES]]
|
; CHECK-NEXT: ret <2 x double> [[RES]]
|
||||||
|
|
@ -234,7 +234,7 @@ define <2 x double> @gather_lane0_maybe_spec(double* %base, double %pt, <2 x i1>
|
||||||
; CHECK-LABEL: @gather_lane0_maybe_spec(
|
; CHECK-LABEL: @gather_lane0_maybe_spec(
|
||||||
; CHECK-NEXT: [[PTRS:%.*]] = getelementptr double, double* [[BASE:%.*]], <2 x i64> <i64 0, i64 1>
|
; CHECK-NEXT: [[PTRS:%.*]] = getelementptr double, double* [[BASE:%.*]], <2 x i64> <i64 0, i64 1>
|
||||||
; CHECK-NEXT: [[PT_V1:%.*]] = insertelement <2 x double> poison, double [[PT:%.*]], i64 0
|
; CHECK-NEXT: [[PT_V1:%.*]] = insertelement <2 x double> poison, double [[PT:%.*]], i64 0
|
||||||
; CHECK-NEXT: [[PT_V2:%.*]] = shufflevector <2 x double> [[PT_V1]], <2 x double> undef, <2 x i32> zeroinitializer
|
; CHECK-NEXT: [[PT_V2:%.*]] = shufflevector <2 x double> [[PT_V1]], <2 x double> poison, <2 x i32> zeroinitializer
|
||||||
; CHECK-NEXT: [[MASK2:%.*]] = insertelement <2 x i1> [[MASK:%.*]], i1 false, i64 1
|
; CHECK-NEXT: [[MASK2:%.*]] = insertelement <2 x i1> [[MASK:%.*]], i1 false, i64 1
|
||||||
; CHECK-NEXT: [[RES:%.*]] = call <2 x double> @llvm.masked.gather.v2f64.v2p0f64(<2 x double*> [[PTRS]], i32 4, <2 x i1> [[MASK2]], <2 x double> [[PT_V2]])
|
; CHECK-NEXT: [[RES:%.*]] = call <2 x double> @llvm.masked.gather.v2f64.v2p0f64(<2 x double*> [[PTRS]], i32 4, <2 x i1> [[MASK2]], <2 x double> [[PT_V2]])
|
||||||
; CHECK-NEXT: ret <2 x double> [[RES]]
|
; CHECK-NEXT: ret <2 x double> [[RES]]
|
||||||
|
|
|
||||||
|
|
@ -46,7 +46,7 @@ define <2 x double> @load_cemask(<2 x double>* %ptr, <2 x double> %passthru) {
|
||||||
|
|
||||||
define <2 x double> @load_lane0(<2 x double>* %ptr, double %pt) {
|
define <2 x double> @load_lane0(<2 x double>* %ptr, double %pt) {
|
||||||
; CHECK-LABEL: @load_lane0(
|
; CHECK-LABEL: @load_lane0(
|
||||||
; CHECK-NEXT: [[PTV2:%.*]] = insertelement <2 x double> undef, double [[PT:%.*]], i64 1
|
; CHECK-NEXT: [[PTV2:%.*]] = insertelement <2 x double> poison, double [[PT:%.*]], i64 1
|
||||||
; CHECK-NEXT: [[RES:%.*]] = call <2 x double> @llvm.masked.load.v2f64.p0v2f64(<2 x double>* [[PTR:%.*]], i32 2, <2 x i1> <i1 true, i1 false>, <2 x double> [[PTV2]])
|
; CHECK-NEXT: [[RES:%.*]] = call <2 x double> @llvm.masked.load.v2f64.p0v2f64(<2 x double>* [[PTR:%.*]], i32 2, <2 x i1> <i1 true, i1 false>, <2 x double> [[PTV2]])
|
||||||
; CHECK-NEXT: ret <2 x double> [[RES]]
|
; CHECK-NEXT: ret <2 x double> [[RES]]
|
||||||
;
|
;
|
||||||
|
|
@ -72,7 +72,7 @@ define double @load_all(double* %base, double %pt) {
|
||||||
define <2 x double> @load_generic(<2 x double>* %ptr, double %pt, <2 x i1> %mask) {
|
define <2 x double> @load_generic(<2 x double>* %ptr, double %pt, <2 x i1> %mask) {
|
||||||
; CHECK-LABEL: @load_generic(
|
; CHECK-LABEL: @load_generic(
|
||||||
; CHECK-NEXT: [[PTV1:%.*]] = insertelement <2 x double> undef, double [[PT:%.*]], i64 0
|
; CHECK-NEXT: [[PTV1:%.*]] = insertelement <2 x double> undef, double [[PT:%.*]], i64 0
|
||||||
; CHECK-NEXT: [[PTV2:%.*]] = shufflevector <2 x double> [[PTV1]], <2 x double> undef, <2 x i32> zeroinitializer
|
; CHECK-NEXT: [[PTV2:%.*]] = shufflevector <2 x double> [[PTV1]], <2 x double> poison, <2 x i32> zeroinitializer
|
||||||
; CHECK-NEXT: [[RES:%.*]] = call <2 x double> @llvm.masked.load.v2f64.p0v2f64(<2 x double>* [[PTR:%.*]], i32 4, <2 x i1> [[MASK:%.*]], <2 x double> [[PTV2]])
|
; CHECK-NEXT: [[RES:%.*]] = call <2 x double> @llvm.masked.load.v2f64.p0v2f64(<2 x double>* [[PTR:%.*]], i32 4, <2 x i1> [[MASK:%.*]], <2 x double> [[PTV2]])
|
||||||
; CHECK-NEXT: ret <2 x double> [[RES]]
|
; CHECK-NEXT: ret <2 x double> [[RES]]
|
||||||
;
|
;
|
||||||
|
|
@ -85,7 +85,7 @@ define <2 x double> @load_generic(<2 x double>* %ptr, double %pt, <2 x i1> %mask
|
||||||
define <2 x double> @load_speculative(<2 x double>* dereferenceable(16) align 4 %ptr, double %pt, <2 x i1> %mask) {
|
define <2 x double> @load_speculative(<2 x double>* dereferenceable(16) align 4 %ptr, double %pt, <2 x i1> %mask) {
|
||||||
; CHECK-LABEL: @load_speculative(
|
; CHECK-LABEL: @load_speculative(
|
||||||
; CHECK-NEXT: [[PTV1:%.*]] = insertelement <2 x double> undef, double [[PT:%.*]], i64 0
|
; CHECK-NEXT: [[PTV1:%.*]] = insertelement <2 x double> undef, double [[PT:%.*]], i64 0
|
||||||
; CHECK-NEXT: [[PTV2:%.*]] = shufflevector <2 x double> [[PTV1]], <2 x double> undef, <2 x i32> zeroinitializer
|
; CHECK-NEXT: [[PTV2:%.*]] = shufflevector <2 x double> [[PTV1]], <2 x double> poison, <2 x i32> zeroinitializer
|
||||||
; CHECK-NEXT: [[UNMASKEDLOAD:%.*]] = load <2 x double>, <2 x double>* [[PTR:%.*]], align 4
|
; CHECK-NEXT: [[UNMASKEDLOAD:%.*]] = load <2 x double>, <2 x double>* [[PTR:%.*]], align 4
|
||||||
; CHECK-NEXT: [[TMP1:%.*]] = select <2 x i1> [[MASK:%.*]], <2 x double> [[UNMASKEDLOAD]], <2 x double> [[PTV2]]
|
; CHECK-NEXT: [[TMP1:%.*]] = select <2 x i1> [[MASK:%.*]], <2 x double> [[UNMASKEDLOAD]], <2 x double> [[PTV2]]
|
||||||
; CHECK-NEXT: ret <2 x double> [[TMP1]]
|
; CHECK-NEXT: ret <2 x double> [[TMP1]]
|
||||||
|
|
@ -99,7 +99,7 @@ define <2 x double> @load_speculative(<2 x double>* dereferenceable(16) align 4
|
||||||
define <2 x double> @load_speculative_less_aligned(<2 x double>* dereferenceable(16) %ptr, double %pt, <2 x i1> %mask) {
|
define <2 x double> @load_speculative_less_aligned(<2 x double>* dereferenceable(16) %ptr, double %pt, <2 x i1> %mask) {
|
||||||
; CHECK-LABEL: @load_speculative_less_aligned(
|
; CHECK-LABEL: @load_speculative_less_aligned(
|
||||||
; CHECK-NEXT: [[PTV1:%.*]] = insertelement <2 x double> undef, double [[PT:%.*]], i64 0
|
; CHECK-NEXT: [[PTV1:%.*]] = insertelement <2 x double> undef, double [[PT:%.*]], i64 0
|
||||||
; CHECK-NEXT: [[PTV2:%.*]] = shufflevector <2 x double> [[PTV1]], <2 x double> undef, <2 x i32> zeroinitializer
|
; CHECK-NEXT: [[PTV2:%.*]] = shufflevector <2 x double> [[PTV1]], <2 x double> poison, <2 x i32> zeroinitializer
|
||||||
; CHECK-NEXT: [[UNMASKEDLOAD:%.*]] = load <2 x double>, <2 x double>* [[PTR:%.*]], align 4
|
; CHECK-NEXT: [[UNMASKEDLOAD:%.*]] = load <2 x double>, <2 x double>* [[PTR:%.*]], align 4
|
||||||
; CHECK-NEXT: [[TMP1:%.*]] = select <2 x i1> [[MASK:%.*]], <2 x double> [[UNMASKEDLOAD]], <2 x double> [[PTV2]]
|
; CHECK-NEXT: [[TMP1:%.*]] = select <2 x i1> [[MASK:%.*]], <2 x double> [[UNMASKEDLOAD]], <2 x double> [[PTV2]]
|
||||||
; CHECK-NEXT: ret <2 x double> [[TMP1]]
|
; CHECK-NEXT: ret <2 x double> [[TMP1]]
|
||||||
|
|
@ -115,7 +115,7 @@ define <2 x double> @load_speculative_less_aligned(<2 x double>* dereferenceable
|
||||||
define <2 x double> @load_spec_neg_size(<2 x double>* dereferenceable(8) %ptr, double %pt, <2 x i1> %mask) {
|
define <2 x double> @load_spec_neg_size(<2 x double>* dereferenceable(8) %ptr, double %pt, <2 x i1> %mask) {
|
||||||
; CHECK-LABEL: @load_spec_neg_size(
|
; CHECK-LABEL: @load_spec_neg_size(
|
||||||
; CHECK-NEXT: [[PTV1:%.*]] = insertelement <2 x double> undef, double [[PT:%.*]], i64 0
|
; CHECK-NEXT: [[PTV1:%.*]] = insertelement <2 x double> undef, double [[PT:%.*]], i64 0
|
||||||
; CHECK-NEXT: [[PTV2:%.*]] = shufflevector <2 x double> [[PTV1]], <2 x double> undef, <2 x i32> zeroinitializer
|
; CHECK-NEXT: [[PTV2:%.*]] = shufflevector <2 x double> [[PTV1]], <2 x double> poison, <2 x i32> zeroinitializer
|
||||||
; CHECK-NEXT: [[RES:%.*]] = call <2 x double> @llvm.masked.load.v2f64.p0v2f64(<2 x double>* nonnull [[PTR:%.*]], i32 4, <2 x i1> [[MASK:%.*]], <2 x double> [[PTV2]])
|
; CHECK-NEXT: [[RES:%.*]] = call <2 x double> @llvm.masked.load.v2f64.p0v2f64(<2 x double>* nonnull [[PTR:%.*]], i32 4, <2 x i1> [[MASK:%.*]], <2 x double> [[PTV2]])
|
||||||
; CHECK-NEXT: ret <2 x double> [[RES]]
|
; CHECK-NEXT: ret <2 x double> [[RES]]
|
||||||
;
|
;
|
||||||
|
|
@ -129,7 +129,7 @@ define <2 x double> @load_spec_neg_size(<2 x double>* dereferenceable(8) %ptr, d
|
||||||
define <2 x double> @load_spec_lan0(<2 x double>* dereferenceable(8) %ptr, double %pt, <2 x i1> %mask) {
|
define <2 x double> @load_spec_lan0(<2 x double>* dereferenceable(8) %ptr, double %pt, <2 x i1> %mask) {
|
||||||
; CHECK-LABEL: @load_spec_lan0(
|
; CHECK-LABEL: @load_spec_lan0(
|
||||||
; CHECK-NEXT: [[PTV1:%.*]] = insertelement <2 x double> undef, double [[PT:%.*]], i64 0
|
; CHECK-NEXT: [[PTV1:%.*]] = insertelement <2 x double> undef, double [[PT:%.*]], i64 0
|
||||||
; CHECK-NEXT: [[PTV2:%.*]] = shufflevector <2 x double> [[PTV1]], <2 x double> undef, <2 x i32> zeroinitializer
|
; CHECK-NEXT: [[PTV2:%.*]] = shufflevector <2 x double> [[PTV1]], <2 x double> poison, <2 x i32> zeroinitializer
|
||||||
; CHECK-NEXT: [[MASK2:%.*]] = insertelement <2 x i1> [[MASK:%.*]], i1 false, i64 1
|
; CHECK-NEXT: [[MASK2:%.*]] = insertelement <2 x i1> [[MASK:%.*]], i1 false, i64 1
|
||||||
; CHECK-NEXT: [[RES:%.*]] = call <2 x double> @llvm.masked.load.v2f64.p0v2f64(<2 x double>* nonnull [[PTR:%.*]], i32 4, <2 x i1> [[MASK2]], <2 x double> [[PTV2]])
|
; CHECK-NEXT: [[RES:%.*]] = call <2 x double> @llvm.masked.load.v2f64.p0v2f64(<2 x double>* nonnull [[PTR:%.*]], i32 4, <2 x i1> [[MASK2]], <2 x double> [[PTV2]])
|
||||||
; CHECK-NEXT: ret <2 x double> [[RES]]
|
; CHECK-NEXT: ret <2 x double> [[RES]]
|
||||||
|
|
@ -217,7 +217,7 @@ define <2 x double> @gather_lane0_maybe(double* %base, double %pt, <2 x i1> %mas
|
||||||
; CHECK-LABEL: @gather_lane0_maybe(
|
; CHECK-LABEL: @gather_lane0_maybe(
|
||||||
; CHECK-NEXT: [[PTRS:%.*]] = getelementptr double, double* [[BASE:%.*]], <2 x i64> <i64 0, i64 1>
|
; CHECK-NEXT: [[PTRS:%.*]] = getelementptr double, double* [[BASE:%.*]], <2 x i64> <i64 0, i64 1>
|
||||||
; CHECK-NEXT: [[PT_V1:%.*]] = insertelement <2 x double> undef, double [[PT:%.*]], i64 0
|
; CHECK-NEXT: [[PT_V1:%.*]] = insertelement <2 x double> undef, double [[PT:%.*]], i64 0
|
||||||
; CHECK-NEXT: [[PT_V2:%.*]] = shufflevector <2 x double> [[PT_V1]], <2 x double> undef, <2 x i32> zeroinitializer
|
; CHECK-NEXT: [[PT_V2:%.*]] = shufflevector <2 x double> [[PT_V1]], <2 x double> poison, <2 x i32> zeroinitializer
|
||||||
; CHECK-NEXT: [[MASK2:%.*]] = insertelement <2 x i1> [[MASK:%.*]], i1 false, i64 1
|
; CHECK-NEXT: [[MASK2:%.*]] = insertelement <2 x i1> [[MASK:%.*]], i1 false, i64 1
|
||||||
; CHECK-NEXT: [[RES:%.*]] = call <2 x double> @llvm.masked.gather.v2f64.v2p0f64(<2 x double*> [[PTRS]], i32 4, <2 x i1> [[MASK2]], <2 x double> [[PT_V2]])
|
; CHECK-NEXT: [[RES:%.*]] = call <2 x double> @llvm.masked.gather.v2f64.v2p0f64(<2 x double*> [[PTRS]], i32 4, <2 x i1> [[MASK2]], <2 x double> [[PT_V2]])
|
||||||
; CHECK-NEXT: ret <2 x double> [[RES]]
|
; CHECK-NEXT: ret <2 x double> [[RES]]
|
||||||
|
|
@ -234,7 +234,7 @@ define <2 x double> @gather_lane0_maybe_spec(double* %base, double %pt, <2 x i1>
|
||||||
; CHECK-LABEL: @gather_lane0_maybe_spec(
|
; CHECK-LABEL: @gather_lane0_maybe_spec(
|
||||||
; CHECK-NEXT: [[PTRS:%.*]] = getelementptr double, double* [[BASE:%.*]], <2 x i64> <i64 0, i64 1>
|
; CHECK-NEXT: [[PTRS:%.*]] = getelementptr double, double* [[BASE:%.*]], <2 x i64> <i64 0, i64 1>
|
||||||
; CHECK-NEXT: [[PT_V1:%.*]] = insertelement <2 x double> undef, double [[PT:%.*]], i64 0
|
; CHECK-NEXT: [[PT_V1:%.*]] = insertelement <2 x double> undef, double [[PT:%.*]], i64 0
|
||||||
; CHECK-NEXT: [[PT_V2:%.*]] = shufflevector <2 x double> [[PT_V1]], <2 x double> undef, <2 x i32> zeroinitializer
|
; CHECK-NEXT: [[PT_V2:%.*]] = shufflevector <2 x double> [[PT_V1]], <2 x double> poison, <2 x i32> zeroinitializer
|
||||||
; CHECK-NEXT: [[MASK2:%.*]] = insertelement <2 x i1> [[MASK:%.*]], i1 false, i64 1
|
; CHECK-NEXT: [[MASK2:%.*]] = insertelement <2 x i1> [[MASK:%.*]], i1 false, i64 1
|
||||||
; CHECK-NEXT: [[RES:%.*]] = call <2 x double> @llvm.masked.gather.v2f64.v2p0f64(<2 x double*> [[PTRS]], i32 4, <2 x i1> [[MASK2]], <2 x double> [[PT_V2]])
|
; CHECK-NEXT: [[RES:%.*]] = call <2 x double> @llvm.masked.gather.v2f64.v2p0f64(<2 x double*> [[PTRS]], i32 4, <2 x i1> [[MASK2]], <2 x double> [[PT_V2]])
|
||||||
; CHECK-NEXT: ret <2 x double> [[RES]]
|
; CHECK-NEXT: ret <2 x double> [[RES]]
|
||||||
|
|
|
||||||
|
|
@ -1614,7 +1614,7 @@ define i32 @nopragma(i32* noalias nocapture %a, i32* noalias nocapture readonly
|
||||||
; O1VEC2-NEXT: store <4 x i32> [[TMP4]], <4 x i32>* [[TMP7]], align 4
|
; O1VEC2-NEXT: store <4 x i32> [[TMP4]], <4 x i32>* [[TMP7]], align 4
|
||||||
; O1VEC2-NEXT: [[INDEX_NEXT]] = add i64 [[INDEX]], 4
|
; O1VEC2-NEXT: [[INDEX_NEXT]] = add i64 [[INDEX]], 4
|
||||||
; O1VEC2-NEXT: [[TMP8:%.*]] = icmp eq i64 [[INDEX_NEXT]], 64
|
; O1VEC2-NEXT: [[TMP8:%.*]] = icmp eq i64 [[INDEX_NEXT]], 64
|
||||||
; O1VEC2-NEXT: br i1 [[TMP8]], label [[MIDDLE_BLOCK:%.*]], label [[VECTOR_BODY]], [[LOOP0:!llvm.loop !.*]]
|
; O1VEC2-NEXT: br i1 [[TMP8]], label [[MIDDLE_BLOCK:%.*]], label [[VECTOR_BODY]], !llvm.loop [[LOOP0:![0-9]+]]
|
||||||
; O1VEC2: middle.block:
|
; O1VEC2: middle.block:
|
||||||
; O1VEC2-NEXT: [[CMP_N:%.*]] = icmp eq i64 64, 64
|
; O1VEC2-NEXT: [[CMP_N:%.*]] = icmp eq i64 64, 64
|
||||||
; O1VEC2-NEXT: br i1 [[CMP_N]], label [[FOR_END:%.*]], label [[SCALAR_PH]]
|
; O1VEC2-NEXT: br i1 [[CMP_N]], label [[FOR_END:%.*]], label [[SCALAR_PH]]
|
||||||
|
|
@ -1630,7 +1630,7 @@ define i32 @nopragma(i32* noalias nocapture %a, i32* noalias nocapture readonly
|
||||||
; O1VEC2-NEXT: store i32 [[ADD]], i32* [[ARRAYIDX2]], align 4
|
; O1VEC2-NEXT: store i32 [[ADD]], i32* [[ARRAYIDX2]], align 4
|
||||||
; O1VEC2-NEXT: [[INDVARS_IV_NEXT]] = add nuw nsw i64 [[INDVARS_IV]], 1
|
; O1VEC2-NEXT: [[INDVARS_IV_NEXT]] = add nuw nsw i64 [[INDVARS_IV]], 1
|
||||||
; O1VEC2-NEXT: [[EXITCOND:%.*]] = icmp eq i64 [[INDVARS_IV_NEXT]], 64
|
; O1VEC2-NEXT: [[EXITCOND:%.*]] = icmp eq i64 [[INDVARS_IV_NEXT]], 64
|
||||||
; O1VEC2-NEXT: br i1 [[EXITCOND]], label [[FOR_END]], label [[FOR_BODY]], [[LOOP2:!llvm.loop !.*]]
|
; O1VEC2-NEXT: br i1 [[EXITCOND]], label [[FOR_END]], label [[FOR_BODY]], !llvm.loop [[LOOP2:![0-9]+]]
|
||||||
; O1VEC2: for.end:
|
; O1VEC2: for.end:
|
||||||
; O1VEC2-NEXT: [[TMP10:%.*]] = load i32, i32* [[A]], align 4
|
; O1VEC2-NEXT: [[TMP10:%.*]] = load i32, i32* [[A]], align 4
|
||||||
; O1VEC2-NEXT: ret i32 [[TMP10]]
|
; O1VEC2-NEXT: ret i32 [[TMP10]]
|
||||||
|
|
@ -1656,7 +1656,7 @@ define i32 @nopragma(i32* noalias nocapture %a, i32* noalias nocapture readonly
|
||||||
; OzVEC2-NEXT: store <4 x i32> [[TMP4]], <4 x i32>* [[TMP7]], align 4
|
; OzVEC2-NEXT: store <4 x i32> [[TMP4]], <4 x i32>* [[TMP7]], align 4
|
||||||
; OzVEC2-NEXT: [[INDEX_NEXT]] = add i64 [[INDEX]], 4
|
; OzVEC2-NEXT: [[INDEX_NEXT]] = add i64 [[INDEX]], 4
|
||||||
; OzVEC2-NEXT: [[TMP8:%.*]] = icmp eq i64 [[INDEX_NEXT]], 64
|
; OzVEC2-NEXT: [[TMP8:%.*]] = icmp eq i64 [[INDEX_NEXT]], 64
|
||||||
; OzVEC2-NEXT: br i1 [[TMP8]], label [[MIDDLE_BLOCK:%.*]], label [[VECTOR_BODY]], [[LOOP0:!llvm.loop !.*]]
|
; OzVEC2-NEXT: br i1 [[TMP8]], label [[MIDDLE_BLOCK:%.*]], label [[VECTOR_BODY]], !llvm.loop [[LOOP0:![0-9]+]]
|
||||||
; OzVEC2: middle.block:
|
; OzVEC2: middle.block:
|
||||||
; OzVEC2-NEXT: [[CMP_N:%.*]] = icmp eq i64 64, 64
|
; OzVEC2-NEXT: [[CMP_N:%.*]] = icmp eq i64 64, 64
|
||||||
; OzVEC2-NEXT: br i1 [[CMP_N]], label [[FOR_END:%.*]], label [[SCALAR_PH]]
|
; OzVEC2-NEXT: br i1 [[CMP_N]], label [[FOR_END:%.*]], label [[SCALAR_PH]]
|
||||||
|
|
@ -1672,7 +1672,7 @@ define i32 @nopragma(i32* noalias nocapture %a, i32* noalias nocapture readonly
|
||||||
; OzVEC2-NEXT: store i32 [[ADD]], i32* [[ARRAYIDX2]], align 4
|
; OzVEC2-NEXT: store i32 [[ADD]], i32* [[ARRAYIDX2]], align 4
|
||||||
; OzVEC2-NEXT: [[INDVARS_IV_NEXT]] = add nuw nsw i64 [[INDVARS_IV]], 1
|
; OzVEC2-NEXT: [[INDVARS_IV_NEXT]] = add nuw nsw i64 [[INDVARS_IV]], 1
|
||||||
; OzVEC2-NEXT: [[EXITCOND:%.*]] = icmp eq i64 [[INDVARS_IV_NEXT]], 64
|
; OzVEC2-NEXT: [[EXITCOND:%.*]] = icmp eq i64 [[INDVARS_IV_NEXT]], 64
|
||||||
; OzVEC2-NEXT: br i1 [[EXITCOND]], label [[FOR_END]], label [[FOR_BODY]], [[LOOP2:!llvm.loop !.*]]
|
; OzVEC2-NEXT: br i1 [[EXITCOND]], label [[FOR_END]], label [[FOR_BODY]], !llvm.loop [[LOOP2:![0-9]+]]
|
||||||
; OzVEC2: for.end:
|
; OzVEC2: for.end:
|
||||||
; OzVEC2-NEXT: [[TMP10:%.*]] = load i32, i32* [[A]], align 4
|
; OzVEC2-NEXT: [[TMP10:%.*]] = load i32, i32* [[A]], align 4
|
||||||
; OzVEC2-NEXT: ret i32 [[TMP10]]
|
; OzVEC2-NEXT: ret i32 [[TMP10]]
|
||||||
|
|
@ -1726,7 +1726,7 @@ define i32 @disabled(i32* noalias nocapture %a, i32* noalias nocapture readonly
|
||||||
; O1-NEXT: store i32 [[ADD]], i32* [[ARRAYIDX2]], align 4
|
; O1-NEXT: store i32 [[ADD]], i32* [[ARRAYIDX2]], align 4
|
||||||
; O1-NEXT: [[INDVARS_IV_NEXT]] = add nuw nsw i64 [[INDVARS_IV]], 1
|
; O1-NEXT: [[INDVARS_IV_NEXT]] = add nuw nsw i64 [[INDVARS_IV]], 1
|
||||||
; O1-NEXT: [[EXITCOND:%.*]] = icmp eq i64 [[INDVARS_IV_NEXT]], 48
|
; O1-NEXT: [[EXITCOND:%.*]] = icmp eq i64 [[INDVARS_IV_NEXT]], 48
|
||||||
; O1-NEXT: br i1 [[EXITCOND]], label [[FOR_END:%.*]], label [[FOR_BODY]], [[LOOP0:!llvm.loop !.*]]
|
; O1-NEXT: br i1 [[EXITCOND]], label [[FOR_END:%.*]], label [[FOR_BODY]], !llvm.loop [[LOOP0:![0-9]+]]
|
||||||
; O1: for.end:
|
; O1: for.end:
|
||||||
; O1-NEXT: [[TMP1:%.*]] = load i32, i32* [[A]], align 4
|
; O1-NEXT: [[TMP1:%.*]] = load i32, i32* [[A]], align 4
|
||||||
; O1-NEXT: ret i32 [[TMP1]]
|
; O1-NEXT: ret i32 [[TMP1]]
|
||||||
|
|
@ -1743,7 +1743,7 @@ define i32 @disabled(i32* noalias nocapture %a, i32* noalias nocapture readonly
|
||||||
; O2-NEXT: store i32 [[ADD]], i32* [[ARRAYIDX2]], align 4
|
; O2-NEXT: store i32 [[ADD]], i32* [[ARRAYIDX2]], align 4
|
||||||
; O2-NEXT: [[INDVARS_IV_NEXT]] = add nuw nsw i64 [[INDVARS_IV]], 1
|
; O2-NEXT: [[INDVARS_IV_NEXT]] = add nuw nsw i64 [[INDVARS_IV]], 1
|
||||||
; O2-NEXT: [[EXITCOND:%.*]] = icmp eq i64 [[INDVARS_IV_NEXT]], 48
|
; O2-NEXT: [[EXITCOND:%.*]] = icmp eq i64 [[INDVARS_IV_NEXT]], 48
|
||||||
; O2-NEXT: br i1 [[EXITCOND]], label [[FOR_END:%.*]], label [[FOR_BODY]], [[LOOP0:!llvm.loop !.*]]
|
; O2-NEXT: br i1 [[EXITCOND]], label [[FOR_END:%.*]], label [[FOR_BODY]], !llvm.loop [[LOOP0:![0-9]+]]
|
||||||
; O2: for.end:
|
; O2: for.end:
|
||||||
; O2-NEXT: [[TMP1:%.*]] = load i32, i32* [[A]], align 4
|
; O2-NEXT: [[TMP1:%.*]] = load i32, i32* [[A]], align 4
|
||||||
; O2-NEXT: ret i32 [[TMP1]]
|
; O2-NEXT: ret i32 [[TMP1]]
|
||||||
|
|
@ -1760,7 +1760,7 @@ define i32 @disabled(i32* noalias nocapture %a, i32* noalias nocapture readonly
|
||||||
; O3-NEXT: store i32 [[ADD]], i32* [[ARRAYIDX2]], align 4
|
; O3-NEXT: store i32 [[ADD]], i32* [[ARRAYIDX2]], align 4
|
||||||
; O3-NEXT: [[INDVARS_IV_NEXT]] = add nuw nsw i64 [[INDVARS_IV]], 1
|
; O3-NEXT: [[INDVARS_IV_NEXT]] = add nuw nsw i64 [[INDVARS_IV]], 1
|
||||||
; O3-NEXT: [[EXITCOND:%.*]] = icmp eq i64 [[INDVARS_IV_NEXT]], 48
|
; O3-NEXT: [[EXITCOND:%.*]] = icmp eq i64 [[INDVARS_IV_NEXT]], 48
|
||||||
; O3-NEXT: br i1 [[EXITCOND]], label [[FOR_END:%.*]], label [[FOR_BODY]], [[LOOP0:!llvm.loop !.*]]
|
; O3-NEXT: br i1 [[EXITCOND]], label [[FOR_END:%.*]], label [[FOR_BODY]], !llvm.loop [[LOOP0:![0-9]+]]
|
||||||
; O3: for.end:
|
; O3: for.end:
|
||||||
; O3-NEXT: [[TMP1:%.*]] = load i32, i32* [[A]], align 4
|
; O3-NEXT: [[TMP1:%.*]] = load i32, i32* [[A]], align 4
|
||||||
; O3-NEXT: ret i32 [[TMP1]]
|
; O3-NEXT: ret i32 [[TMP1]]
|
||||||
|
|
@ -1770,7 +1770,7 @@ define i32 @disabled(i32* noalias nocapture %a, i32* noalias nocapture readonly
|
||||||
; O3DEFAULT-NEXT: [[TMP0:%.*]] = bitcast i32* [[B:%.*]] to <4 x i32>*
|
; O3DEFAULT-NEXT: [[TMP0:%.*]] = bitcast i32* [[B:%.*]] to <4 x i32>*
|
||||||
; O3DEFAULT-NEXT: [[TMP1:%.*]] = load <4 x i32>, <4 x i32>* [[TMP0]], align 4
|
; O3DEFAULT-NEXT: [[TMP1:%.*]] = load <4 x i32>, <4 x i32>* [[TMP0]], align 4
|
||||||
; O3DEFAULT-NEXT: [[TMP2:%.*]] = insertelement <4 x i32> poison, i32 [[N:%.*]], i32 0
|
; O3DEFAULT-NEXT: [[TMP2:%.*]] = insertelement <4 x i32> poison, i32 [[N:%.*]], i32 0
|
||||||
; O3DEFAULT-NEXT: [[TMP3:%.*]] = shufflevector <4 x i32> [[TMP2]], <4 x i32> undef, <4 x i32> zeroinitializer
|
; O3DEFAULT-NEXT: [[TMP3:%.*]] = shufflevector <4 x i32> [[TMP2]], <4 x i32> poison, <4 x i32> zeroinitializer
|
||||||
; O3DEFAULT-NEXT: [[TMP4:%.*]] = add nsw <4 x i32> [[TMP1]], [[TMP3]]
|
; O3DEFAULT-NEXT: [[TMP4:%.*]] = add nsw <4 x i32> [[TMP1]], [[TMP3]]
|
||||||
; O3DEFAULT-NEXT: [[TMP5:%.*]] = bitcast i32* [[A:%.*]] to <4 x i32>*
|
; O3DEFAULT-NEXT: [[TMP5:%.*]] = bitcast i32* [[A:%.*]] to <4 x i32>*
|
||||||
; O3DEFAULT-NEXT: store <4 x i32> [[TMP4]], <4 x i32>* [[TMP5]], align 4
|
; O3DEFAULT-NEXT: store <4 x i32> [[TMP4]], <4 x i32>* [[TMP5]], align 4
|
||||||
|
|
@ -1866,7 +1866,7 @@ define i32 @disabled(i32* noalias nocapture %a, i32* noalias nocapture readonly
|
||||||
; Os-NEXT: store i32 [[ADD]], i32* [[ARRAYIDX2]], align 4
|
; Os-NEXT: store i32 [[ADD]], i32* [[ARRAYIDX2]], align 4
|
||||||
; Os-NEXT: [[INDVARS_IV_NEXT]] = add nuw nsw i64 [[INDVARS_IV]], 1
|
; Os-NEXT: [[INDVARS_IV_NEXT]] = add nuw nsw i64 [[INDVARS_IV]], 1
|
||||||
; Os-NEXT: [[EXITCOND:%.*]] = icmp eq i64 [[INDVARS_IV_NEXT]], 48
|
; Os-NEXT: [[EXITCOND:%.*]] = icmp eq i64 [[INDVARS_IV_NEXT]], 48
|
||||||
; Os-NEXT: br i1 [[EXITCOND]], label [[FOR_END:%.*]], label [[FOR_BODY]], [[LOOP0:!llvm.loop !.*]]
|
; Os-NEXT: br i1 [[EXITCOND]], label [[FOR_END:%.*]], label [[FOR_BODY]], !llvm.loop [[LOOP0:![0-9]+]]
|
||||||
; Os: for.end:
|
; Os: for.end:
|
||||||
; Os-NEXT: [[TMP1:%.*]] = load i32, i32* [[A]], align 4
|
; Os-NEXT: [[TMP1:%.*]] = load i32, i32* [[A]], align 4
|
||||||
; Os-NEXT: ret i32 [[TMP1]]
|
; Os-NEXT: ret i32 [[TMP1]]
|
||||||
|
|
@ -1883,7 +1883,7 @@ define i32 @disabled(i32* noalias nocapture %a, i32* noalias nocapture readonly
|
||||||
; Oz-NEXT: store i32 [[ADD]], i32* [[ARRAYIDX2]], align 4
|
; Oz-NEXT: store i32 [[ADD]], i32* [[ARRAYIDX2]], align 4
|
||||||
; Oz-NEXT: [[INDVARS_IV_NEXT]] = add nuw nsw i64 [[INDVARS_IV]], 1
|
; Oz-NEXT: [[INDVARS_IV_NEXT]] = add nuw nsw i64 [[INDVARS_IV]], 1
|
||||||
; Oz-NEXT: [[EXITCOND:%.*]] = icmp eq i64 [[INDVARS_IV_NEXT]], 48
|
; Oz-NEXT: [[EXITCOND:%.*]] = icmp eq i64 [[INDVARS_IV_NEXT]], 48
|
||||||
; Oz-NEXT: br i1 [[EXITCOND]], label [[FOR_END:%.*]], label [[FOR_BODY]], [[LOOP0:!llvm.loop !.*]]
|
; Oz-NEXT: br i1 [[EXITCOND]], label [[FOR_END:%.*]], label [[FOR_BODY]], !llvm.loop [[LOOP0:![0-9]+]]
|
||||||
; Oz: for.end:
|
; Oz: for.end:
|
||||||
; Oz-NEXT: [[TMP1:%.*]] = load i32, i32* [[A]], align 4
|
; Oz-NEXT: [[TMP1:%.*]] = load i32, i32* [[A]], align 4
|
||||||
; Oz-NEXT: ret i32 [[TMP1]]
|
; Oz-NEXT: ret i32 [[TMP1]]
|
||||||
|
|
@ -1900,7 +1900,7 @@ define i32 @disabled(i32* noalias nocapture %a, i32* noalias nocapture readonly
|
||||||
; O1VEC2-NEXT: store i32 [[ADD]], i32* [[ARRAYIDX2]], align 4
|
; O1VEC2-NEXT: store i32 [[ADD]], i32* [[ARRAYIDX2]], align 4
|
||||||
; O1VEC2-NEXT: [[INDVARS_IV_NEXT]] = add nuw nsw i64 [[INDVARS_IV]], 1
|
; O1VEC2-NEXT: [[INDVARS_IV_NEXT]] = add nuw nsw i64 [[INDVARS_IV]], 1
|
||||||
; O1VEC2-NEXT: [[EXITCOND:%.*]] = icmp eq i64 [[INDVARS_IV_NEXT]], 48
|
; O1VEC2-NEXT: [[EXITCOND:%.*]] = icmp eq i64 [[INDVARS_IV_NEXT]], 48
|
||||||
; O1VEC2-NEXT: br i1 [[EXITCOND]], label [[FOR_END:%.*]], label [[FOR_BODY]], [[LOOP4:!llvm.loop !.*]]
|
; O1VEC2-NEXT: br i1 [[EXITCOND]], label [[FOR_END:%.*]], label [[FOR_BODY]], !llvm.loop [[LOOP4:![0-9]+]]
|
||||||
; O1VEC2: for.end:
|
; O1VEC2: for.end:
|
||||||
; O1VEC2-NEXT: [[TMP1:%.*]] = load i32, i32* [[A]], align 4
|
; O1VEC2-NEXT: [[TMP1:%.*]] = load i32, i32* [[A]], align 4
|
||||||
; O1VEC2-NEXT: ret i32 [[TMP1]]
|
; O1VEC2-NEXT: ret i32 [[TMP1]]
|
||||||
|
|
@ -1917,7 +1917,7 @@ define i32 @disabled(i32* noalias nocapture %a, i32* noalias nocapture readonly
|
||||||
; OzVEC2-NEXT: store i32 [[ADD]], i32* [[ARRAYIDX2]], align 4
|
; OzVEC2-NEXT: store i32 [[ADD]], i32* [[ARRAYIDX2]], align 4
|
||||||
; OzVEC2-NEXT: [[INDVARS_IV_NEXT]] = add nuw nsw i64 [[INDVARS_IV]], 1
|
; OzVEC2-NEXT: [[INDVARS_IV_NEXT]] = add nuw nsw i64 [[INDVARS_IV]], 1
|
||||||
; OzVEC2-NEXT: [[EXITCOND:%.*]] = icmp eq i64 [[INDVARS_IV_NEXT]], 48
|
; OzVEC2-NEXT: [[EXITCOND:%.*]] = icmp eq i64 [[INDVARS_IV_NEXT]], 48
|
||||||
; OzVEC2-NEXT: br i1 [[EXITCOND]], label [[FOR_END:%.*]], label [[FOR_BODY]], [[LOOP4:!llvm.loop !.*]]
|
; OzVEC2-NEXT: br i1 [[EXITCOND]], label [[FOR_END:%.*]], label [[FOR_BODY]], !llvm.loop [[LOOP4:![0-9]+]]
|
||||||
; OzVEC2: for.end:
|
; OzVEC2: for.end:
|
||||||
; OzVEC2-NEXT: [[TMP1:%.*]] = load i32, i32* [[A]], align 4
|
; OzVEC2-NEXT: [[TMP1:%.*]] = load i32, i32* [[A]], align 4
|
||||||
; OzVEC2-NEXT: ret i32 [[TMP1]]
|
; OzVEC2-NEXT: ret i32 [[TMP1]]
|
||||||
|
|
@ -1934,7 +1934,7 @@ define i32 @disabled(i32* noalias nocapture %a, i32* noalias nocapture readonly
|
||||||
; O3DIS-NEXT: store i32 [[ADD]], i32* [[ARRAYIDX2]], align 4
|
; O3DIS-NEXT: store i32 [[ADD]], i32* [[ARRAYIDX2]], align 4
|
||||||
; O3DIS-NEXT: [[INDVARS_IV_NEXT]] = add nuw nsw i64 [[INDVARS_IV]], 1
|
; O3DIS-NEXT: [[INDVARS_IV_NEXT]] = add nuw nsw i64 [[INDVARS_IV]], 1
|
||||||
; O3DIS-NEXT: [[EXITCOND:%.*]] = icmp eq i64 [[INDVARS_IV_NEXT]], 48
|
; O3DIS-NEXT: [[EXITCOND:%.*]] = icmp eq i64 [[INDVARS_IV_NEXT]], 48
|
||||||
; O3DIS-NEXT: br i1 [[EXITCOND]], label [[FOR_END:%.*]], label [[FOR_BODY]], [[LOOP0:!llvm.loop !.*]]
|
; O3DIS-NEXT: br i1 [[EXITCOND]], label [[FOR_END:%.*]], label [[FOR_BODY]], !llvm.loop [[LOOP0:![0-9]+]]
|
||||||
; O3DIS: for.end:
|
; O3DIS: for.end:
|
||||||
; O3DIS-NEXT: [[TMP1:%.*]] = load i32, i32* [[A]], align 4
|
; O3DIS-NEXT: [[TMP1:%.*]] = load i32, i32* [[A]], align 4
|
||||||
; O3DIS-NEXT: ret i32 [[TMP1]]
|
; O3DIS-NEXT: ret i32 [[TMP1]]
|
||||||
|
|
|
||||||
|
|
@ -61,7 +61,7 @@ define i32 @getelementptr_4x32(i32* nocapture readonly %g, i32 %n, i32 %x, i32 %
|
||||||
; CHECK-NEXT: [[TMP5:%.*]] = extractelement <2 x i32> [[TMP4]], i32 0
|
; CHECK-NEXT: [[TMP5:%.*]] = extractelement <2 x i32> [[TMP4]], i32 0
|
||||||
; CHECK-NEXT: [[T4:%.*]] = shl nsw i32 [[TMP5]], 1
|
; CHECK-NEXT: [[T4:%.*]] = shl nsw i32 [[TMP5]], 1
|
||||||
; CHECK-NEXT: [[TMP6:%.*]] = insertelement <4 x i32> poison, i32 [[T4]], i32 0
|
; CHECK-NEXT: [[TMP6:%.*]] = insertelement <4 x i32> poison, i32 [[T4]], i32 0
|
||||||
; CHECK-NEXT: [[TMP7:%.*]] = shufflevector <4 x i32> [[TMP6]], <4 x i32> undef, <4 x i32> zeroinitializer
|
; CHECK-NEXT: [[TMP7:%.*]] = shufflevector <4 x i32> [[TMP6]], <4 x i32> poison, <4 x i32> zeroinitializer
|
||||||
; CHECK-NEXT: [[TMP8:%.*]] = add nsw <4 x i32> [[TMP7]], [[TMP2]]
|
; CHECK-NEXT: [[TMP8:%.*]] = add nsw <4 x i32> [[TMP7]], [[TMP2]]
|
||||||
; CHECK-NEXT: [[TMP9:%.*]] = extractelement <4 x i32> [[TMP8]], i32 0
|
; CHECK-NEXT: [[TMP9:%.*]] = extractelement <4 x i32> [[TMP8]], i32 0
|
||||||
; CHECK-NEXT: [[TMP10:%.*]] = sext i32 [[TMP9]] to i64
|
; CHECK-NEXT: [[TMP10:%.*]] = sext i32 [[TMP9]] to i64
|
||||||
|
|
@ -176,7 +176,7 @@ define i32 @getelementptr_2x32(i32* nocapture readonly %g, i32 %n, i32 %x, i32 %
|
||||||
; CHECK-NEXT: [[T8:%.*]] = load i32, i32* [[ARRAYIDX5]], align 4
|
; CHECK-NEXT: [[T8:%.*]] = load i32, i32* [[ARRAYIDX5]], align 4
|
||||||
; CHECK-NEXT: [[ADD6:%.*]] = add nsw i32 [[ADD1]], [[T8]]
|
; CHECK-NEXT: [[ADD6:%.*]] = add nsw i32 [[ADD1]], [[T8]]
|
||||||
; CHECK-NEXT: [[TMP8:%.*]] = insertelement <2 x i32> poison, i32 [[T4]], i32 0
|
; CHECK-NEXT: [[TMP8:%.*]] = insertelement <2 x i32> poison, i32 [[T4]], i32 0
|
||||||
; CHECK-NEXT: [[TMP9:%.*]] = shufflevector <2 x i32> [[TMP8]], <2 x i32> undef, <2 x i32> zeroinitializer
|
; CHECK-NEXT: [[TMP9:%.*]] = shufflevector <2 x i32> [[TMP8]], <2 x i32> poison, <2 x i32> zeroinitializer
|
||||||
; CHECK-NEXT: [[TMP10:%.*]] = add nsw <2 x i32> [[TMP9]], [[TMP1]]
|
; CHECK-NEXT: [[TMP10:%.*]] = add nsw <2 x i32> [[TMP9]], [[TMP1]]
|
||||||
; CHECK-NEXT: [[TMP11:%.*]] = extractelement <2 x i32> [[TMP10]], i32 0
|
; CHECK-NEXT: [[TMP11:%.*]] = extractelement <2 x i32> [[TMP10]], i32 0
|
||||||
; CHECK-NEXT: [[TMP12:%.*]] = sext i32 [[TMP11]] to i64
|
; CHECK-NEXT: [[TMP12:%.*]] = sext i32 [[TMP11]] to i64
|
||||||
|
|
|
||||||
|
|
@ -439,7 +439,7 @@ define <8 x i32> @sdiv_v8i32_undefs(<8 x i32> %a) {
|
||||||
define <8 x i32> @add_sub_v8i32_splat(<8 x i32> %a, i32 %b) {
|
define <8 x i32> @add_sub_v8i32_splat(<8 x i32> %a, i32 %b) {
|
||||||
; CHECK-LABEL: @add_sub_v8i32_splat(
|
; CHECK-LABEL: @add_sub_v8i32_splat(
|
||||||
; CHECK-NEXT: [[TMP1:%.*]] = insertelement <8 x i32> poison, i32 [[B:%.*]], i32 0
|
; CHECK-NEXT: [[TMP1:%.*]] = insertelement <8 x i32> poison, i32 [[B:%.*]], i32 0
|
||||||
; CHECK-NEXT: [[TMP2:%.*]] = shufflevector <8 x i32> [[TMP1]], <8 x i32> undef, <8 x i32> zeroinitializer
|
; CHECK-NEXT: [[TMP2:%.*]] = shufflevector <8 x i32> [[TMP1]], <8 x i32> poison, <8 x i32> zeroinitializer
|
||||||
; CHECK-NEXT: [[TMP3:%.*]] = add <8 x i32> [[TMP2]], [[A:%.*]]
|
; CHECK-NEXT: [[TMP3:%.*]] = add <8 x i32> [[TMP2]], [[A:%.*]]
|
||||||
; CHECK-NEXT: [[TMP4:%.*]] = sub <8 x i32> [[TMP2]], [[A]]
|
; CHECK-NEXT: [[TMP4:%.*]] = sub <8 x i32> [[TMP2]], [[A]]
|
||||||
; CHECK-NEXT: [[TMP5:%.*]] = shufflevector <8 x i32> [[TMP3]], <8 x i32> [[TMP4]], <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 12, i32 13, i32 14, i32 15>
|
; CHECK-NEXT: [[TMP5:%.*]] = shufflevector <8 x i32> [[TMP3]], <8 x i32> [[TMP4]], <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 12, i32 13, i32 14, i32 15>
|
||||||
|
|
|
||||||
|
|
@ -439,7 +439,7 @@ define <8 x i32> @sdiv_v8i32_undefs(<8 x i32> %a) {
|
||||||
define <8 x i32> @add_sub_v8i32_splat(<8 x i32> %a, i32 %b) {
|
define <8 x i32> @add_sub_v8i32_splat(<8 x i32> %a, i32 %b) {
|
||||||
; CHECK-LABEL: @add_sub_v8i32_splat(
|
; CHECK-LABEL: @add_sub_v8i32_splat(
|
||||||
; CHECK-NEXT: [[TMP1:%.*]] = insertelement <8 x i32> poison, i32 [[B:%.*]], i32 0
|
; CHECK-NEXT: [[TMP1:%.*]] = insertelement <8 x i32> poison, i32 [[B:%.*]], i32 0
|
||||||
; CHECK-NEXT: [[TMP2:%.*]] = shufflevector <8 x i32> [[TMP1]], <8 x i32> undef, <8 x i32> zeroinitializer
|
; CHECK-NEXT: [[TMP2:%.*]] = shufflevector <8 x i32> [[TMP1]], <8 x i32> poison, <8 x i32> zeroinitializer
|
||||||
; CHECK-NEXT: [[TMP3:%.*]] = add <8 x i32> [[TMP2]], [[A:%.*]]
|
; CHECK-NEXT: [[TMP3:%.*]] = add <8 x i32> [[TMP2]], [[A:%.*]]
|
||||||
; CHECK-NEXT: [[TMP4:%.*]] = sub <8 x i32> [[TMP2]], [[A]]
|
; CHECK-NEXT: [[TMP4:%.*]] = sub <8 x i32> [[TMP2]], [[A]]
|
||||||
; CHECK-NEXT: [[TMP5:%.*]] = shufflevector <8 x i32> [[TMP3]], <8 x i32> [[TMP4]], <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 12, i32 13, i32 14, i32 15>
|
; CHECK-NEXT: [[TMP5:%.*]] = shufflevector <8 x i32> [[TMP3]], <8 x i32> [[TMP4]], <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 12, i32 13, i32 14, i32 15>
|
||||||
|
|
|
||||||
|
|
@ -148,7 +148,7 @@ define void @shuffle_preserve_broadcast4(double * noalias %from, double * noalia
|
||||||
; CHECK-NEXT: [[TMP0:%.*]] = insertelement <2 x double> poison, double [[V0_2]], i32 0
|
; CHECK-NEXT: [[TMP0:%.*]] = insertelement <2 x double> poison, double [[V0_2]], i32 0
|
||||||
; CHECK-NEXT: [[TMP1:%.*]] = insertelement <2 x double> [[TMP0]], double [[P]], i32 1
|
; CHECK-NEXT: [[TMP1:%.*]] = insertelement <2 x double> [[TMP0]], double [[P]], i32 1
|
||||||
; CHECK-NEXT: [[TMP2:%.*]] = insertelement <2 x double> poison, double [[V0_1]], i32 0
|
; CHECK-NEXT: [[TMP2:%.*]] = insertelement <2 x double> poison, double [[V0_1]], i32 0
|
||||||
; CHECK-NEXT: [[TMP3:%.*]] = shufflevector <2 x double> [[TMP2]], <2 x double> undef, <2 x i32> zeroinitializer
|
; CHECK-NEXT: [[TMP3:%.*]] = shufflevector <2 x double> [[TMP2]], <2 x double> poison, <2 x i32> zeroinitializer
|
||||||
; CHECK-NEXT: [[TMP4:%.*]] = fadd <2 x double> [[TMP1]], [[TMP3]]
|
; CHECK-NEXT: [[TMP4:%.*]] = fadd <2 x double> [[TMP1]], [[TMP3]]
|
||||||
; CHECK-NEXT: [[TMP5:%.*]] = bitcast double* [[TO:%.*]] to <2 x double>*
|
; CHECK-NEXT: [[TMP5:%.*]] = bitcast double* [[TO:%.*]] to <2 x double>*
|
||||||
; CHECK-NEXT: store <2 x double> [[TMP4]], <2 x double>* [[TMP5]], align 4
|
; CHECK-NEXT: store <2 x double> [[TMP4]], <2 x double>* [[TMP5]], align 4
|
||||||
|
|
@ -222,7 +222,7 @@ define void @shuffle_preserve_broadcast6(double * noalias %from, double * noalia
|
||||||
; CHECK-NEXT: [[V0_1:%.*]] = load double, double* [[FROM]], align 4
|
; CHECK-NEXT: [[V0_1:%.*]] = load double, double* [[FROM]], align 4
|
||||||
; CHECK-NEXT: [[V0_2:%.*]] = load double, double* [[FROM_1]], align 4
|
; CHECK-NEXT: [[V0_2:%.*]] = load double, double* [[FROM_1]], align 4
|
||||||
; CHECK-NEXT: [[TMP0:%.*]] = insertelement <2 x double> poison, double [[V0_1]], i32 0
|
; CHECK-NEXT: [[TMP0:%.*]] = insertelement <2 x double> poison, double [[V0_1]], i32 0
|
||||||
; CHECK-NEXT: [[TMP1:%.*]] = shufflevector <2 x double> [[TMP0]], <2 x double> undef, <2 x i32> zeroinitializer
|
; CHECK-NEXT: [[TMP1:%.*]] = shufflevector <2 x double> [[TMP0]], <2 x double> poison, <2 x i32> zeroinitializer
|
||||||
; CHECK-NEXT: [[TMP2:%.*]] = insertelement <2 x double> poison, double [[V0_2]], i32 0
|
; CHECK-NEXT: [[TMP2:%.*]] = insertelement <2 x double> poison, double [[V0_2]], i32 0
|
||||||
; CHECK-NEXT: [[TMP3:%.*]] = insertelement <2 x double> [[TMP2]], double [[P]], i32 1
|
; CHECK-NEXT: [[TMP3:%.*]] = insertelement <2 x double> [[TMP2]], double [[P]], i32 1
|
||||||
; CHECK-NEXT: [[TMP4:%.*]] = fadd <2 x double> [[TMP1]], [[TMP3]]
|
; CHECK-NEXT: [[TMP4:%.*]] = fadd <2 x double> [[TMP1]], [[TMP3]]
|
||||||
|
|
|
||||||
|
|
@ -10,7 +10,7 @@ define void @store_i32(i32* nocapture %0, i32 %1, i32 %2) {
|
||||||
; CHECK-NEXT: [[TMP4:%.*]] = bitcast i32* [[TMP0:%.*]] to <4 x i32>*
|
; CHECK-NEXT: [[TMP4:%.*]] = bitcast i32* [[TMP0:%.*]] to <4 x i32>*
|
||||||
; CHECK-NEXT: [[TMP5:%.*]] = load <4 x i32>, <4 x i32>* [[TMP4]], align 4, !tbaa [[TBAA0:![0-9]+]]
|
; CHECK-NEXT: [[TMP5:%.*]] = load <4 x i32>, <4 x i32>* [[TMP4]], align 4, !tbaa [[TBAA0:![0-9]+]]
|
||||||
; CHECK-NEXT: [[TMP6:%.*]] = insertelement <4 x i32> poison, i32 [[TMP1:%.*]], i32 0
|
; CHECK-NEXT: [[TMP6:%.*]] = insertelement <4 x i32> poison, i32 [[TMP1:%.*]], i32 0
|
||||||
; CHECK-NEXT: [[TMP7:%.*]] = shufflevector <4 x i32> [[TMP6]], <4 x i32> undef, <4 x i32> zeroinitializer
|
; CHECK-NEXT: [[TMP7:%.*]] = shufflevector <4 x i32> [[TMP6]], <4 x i32> poison, <4 x i32> zeroinitializer
|
||||||
; CHECK-NEXT: [[TMP8:%.*]] = mul <4 x i32> [[TMP5]], [[TMP7]]
|
; CHECK-NEXT: [[TMP8:%.*]] = mul <4 x i32> [[TMP5]], [[TMP7]]
|
||||||
; CHECK-NEXT: [[TMP9:%.*]] = lshr <4 x i32> [[TMP8]], <i32 15, i32 15, i32 15, i32 15>
|
; CHECK-NEXT: [[TMP9:%.*]] = lshr <4 x i32> [[TMP8]], <i32 15, i32 15, i32 15, i32 15>
|
||||||
; CHECK-NEXT: [[TMP10:%.*]] = icmp ult <4 x i32> [[TMP9]], <i32 255, i32 255, i32 255, i32 255>
|
; CHECK-NEXT: [[TMP10:%.*]] = icmp ult <4 x i32> [[TMP9]], <i32 255, i32 255, i32 255, i32 255>
|
||||||
|
|
@ -55,7 +55,7 @@ define void @store_i8(i8* nocapture %0, i32 %1, i32 %2) {
|
||||||
; CHECK-NEXT: [[TMP5:%.*]] = load <4 x i8>, <4 x i8>* [[TMP4]], align 1, !tbaa [[TBAA4:![0-9]+]]
|
; CHECK-NEXT: [[TMP5:%.*]] = load <4 x i8>, <4 x i8>* [[TMP4]], align 1, !tbaa [[TBAA4:![0-9]+]]
|
||||||
; CHECK-NEXT: [[TMP6:%.*]] = zext <4 x i8> [[TMP5]] to <4 x i32>
|
; CHECK-NEXT: [[TMP6:%.*]] = zext <4 x i8> [[TMP5]] to <4 x i32>
|
||||||
; CHECK-NEXT: [[TMP7:%.*]] = insertelement <4 x i32> poison, i32 [[TMP1:%.*]], i32 0
|
; CHECK-NEXT: [[TMP7:%.*]] = insertelement <4 x i32> poison, i32 [[TMP1:%.*]], i32 0
|
||||||
; CHECK-NEXT: [[TMP8:%.*]] = shufflevector <4 x i32> [[TMP7]], <4 x i32> undef, <4 x i32> zeroinitializer
|
; CHECK-NEXT: [[TMP8:%.*]] = shufflevector <4 x i32> [[TMP7]], <4 x i32> poison, <4 x i32> zeroinitializer
|
||||||
; CHECK-NEXT: [[TMP9:%.*]] = mul <4 x i32> [[TMP8]], [[TMP6]]
|
; CHECK-NEXT: [[TMP9:%.*]] = mul <4 x i32> [[TMP8]], [[TMP6]]
|
||||||
; CHECK-NEXT: [[TMP10:%.*]] = lshr <4 x i32> [[TMP9]], <i32 15, i32 15, i32 15, i32 15>
|
; CHECK-NEXT: [[TMP10:%.*]] = lshr <4 x i32> [[TMP9]], <i32 15, i32 15, i32 15, i32 15>
|
||||||
; CHECK-NEXT: [[TMP11:%.*]] = icmp ult <4 x i32> [[TMP10]], <i32 255, i32 255, i32 255, i32 255>
|
; CHECK-NEXT: [[TMP11:%.*]] = icmp ult <4 x i32> [[TMP10]], <i32 255, i32 255, i32 255, i32 255>
|
||||||
|
|
@ -148,7 +148,7 @@ define void @store_i64(i64* nocapture %0, i32 %1, i32 %2) {
|
||||||
; AVX-NEXT: [[TMP5:%.*]] = bitcast i64* [[TMP0:%.*]] to <4 x i64>*
|
; AVX-NEXT: [[TMP5:%.*]] = bitcast i64* [[TMP0:%.*]] to <4 x i64>*
|
||||||
; AVX-NEXT: [[TMP6:%.*]] = load <4 x i64>, <4 x i64>* [[TMP5]], align 8, !tbaa [[TBAA5:![0-9]+]]
|
; AVX-NEXT: [[TMP6:%.*]] = load <4 x i64>, <4 x i64>* [[TMP5]], align 8, !tbaa [[TBAA5:![0-9]+]]
|
||||||
; AVX-NEXT: [[TMP7:%.*]] = insertelement <4 x i64> poison, i64 [[TMP4]], i32 0
|
; AVX-NEXT: [[TMP7:%.*]] = insertelement <4 x i64> poison, i64 [[TMP4]], i32 0
|
||||||
; AVX-NEXT: [[TMP8:%.*]] = shufflevector <4 x i64> [[TMP7]], <4 x i64> undef, <4 x i32> zeroinitializer
|
; AVX-NEXT: [[TMP8:%.*]] = shufflevector <4 x i64> [[TMP7]], <4 x i64> poison, <4 x i32> zeroinitializer
|
||||||
; AVX-NEXT: [[TMP9:%.*]] = mul <4 x i64> [[TMP6]], [[TMP8]]
|
; AVX-NEXT: [[TMP9:%.*]] = mul <4 x i64> [[TMP6]], [[TMP8]]
|
||||||
; AVX-NEXT: [[TMP10:%.*]] = lshr <4 x i64> [[TMP9]], <i64 15, i64 15, i64 15, i64 15>
|
; AVX-NEXT: [[TMP10:%.*]] = lshr <4 x i64> [[TMP9]], <i64 15, i64 15, i64 15, i64 15>
|
||||||
; AVX-NEXT: [[TMP11:%.*]] = trunc <4 x i64> [[TMP10]] to <4 x i32>
|
; AVX-NEXT: [[TMP11:%.*]] = trunc <4 x i64> [[TMP10]] to <4 x i32>
|
||||||
|
|
|
||||||
|
|
@ -90,7 +90,7 @@ define void @gather_load_2(i32* noalias nocapture %0, i32* noalias nocapture rea
|
||||||
;
|
;
|
||||||
; AVX2-LABEL: @gather_load_2(
|
; AVX2-LABEL: @gather_load_2(
|
||||||
; AVX2-NEXT: [[TMP3:%.*]] = insertelement <4 x i32*> poison, i32* [[TMP1:%.*]], i32 0
|
; AVX2-NEXT: [[TMP3:%.*]] = insertelement <4 x i32*> poison, i32* [[TMP1:%.*]], i32 0
|
||||||
; AVX2-NEXT: [[TMP4:%.*]] = shufflevector <4 x i32*> [[TMP3]], <4 x i32*> undef, <4 x i32> zeroinitializer
|
; AVX2-NEXT: [[TMP4:%.*]] = shufflevector <4 x i32*> [[TMP3]], <4 x i32*> poison, <4 x i32> zeroinitializer
|
||||||
; AVX2-NEXT: [[TMP5:%.*]] = getelementptr i32, <4 x i32*> [[TMP4]], <4 x i64> <i64 1, i64 10, i64 3, i64 5>
|
; AVX2-NEXT: [[TMP5:%.*]] = getelementptr i32, <4 x i32*> [[TMP4]], <4 x i64> <i64 1, i64 10, i64 3, i64 5>
|
||||||
; AVX2-NEXT: [[TMP6:%.*]] = call <4 x i32> @llvm.masked.gather.v4i32.v4p0i32(<4 x i32*> [[TMP5]], i32 4, <4 x i1> <i1 true, i1 true, i1 true, i1 true>, <4 x i32> undef), !tbaa [[TBAA0]]
|
; AVX2-NEXT: [[TMP6:%.*]] = call <4 x i32> @llvm.masked.gather.v4i32.v4p0i32(<4 x i32*> [[TMP5]], i32 4, <4 x i1> <i1 true, i1 true, i1 true, i1 true>, <4 x i32> undef), !tbaa [[TBAA0]]
|
||||||
; AVX2-NEXT: [[TMP7:%.*]] = add nsw <4 x i32> [[TMP6]], <i32 1, i32 2, i32 3, i32 4>
|
; AVX2-NEXT: [[TMP7:%.*]] = add nsw <4 x i32> [[TMP6]], <i32 1, i32 2, i32 3, i32 4>
|
||||||
|
|
@ -100,7 +100,7 @@ define void @gather_load_2(i32* noalias nocapture %0, i32* noalias nocapture rea
|
||||||
;
|
;
|
||||||
; AVX512-LABEL: @gather_load_2(
|
; AVX512-LABEL: @gather_load_2(
|
||||||
; AVX512-NEXT: [[TMP3:%.*]] = insertelement <4 x i32*> poison, i32* [[TMP1:%.*]], i32 0
|
; AVX512-NEXT: [[TMP3:%.*]] = insertelement <4 x i32*> poison, i32* [[TMP1:%.*]], i32 0
|
||||||
; AVX512-NEXT: [[TMP4:%.*]] = shufflevector <4 x i32*> [[TMP3]], <4 x i32*> undef, <4 x i32> zeroinitializer
|
; AVX512-NEXT: [[TMP4:%.*]] = shufflevector <4 x i32*> [[TMP3]], <4 x i32*> poison, <4 x i32> zeroinitializer
|
||||||
; AVX512-NEXT: [[TMP5:%.*]] = getelementptr i32, <4 x i32*> [[TMP4]], <4 x i64> <i64 1, i64 10, i64 3, i64 5>
|
; AVX512-NEXT: [[TMP5:%.*]] = getelementptr i32, <4 x i32*> [[TMP4]], <4 x i64> <i64 1, i64 10, i64 3, i64 5>
|
||||||
; AVX512-NEXT: [[TMP6:%.*]] = call <4 x i32> @llvm.masked.gather.v4i32.v4p0i32(<4 x i32*> [[TMP5]], i32 4, <4 x i1> <i1 true, i1 true, i1 true, i1 true>, <4 x i32> undef), !tbaa [[TBAA0]]
|
; AVX512-NEXT: [[TMP6:%.*]] = call <4 x i32> @llvm.masked.gather.v4i32.v4p0i32(<4 x i32*> [[TMP5]], i32 4, <4 x i1> <i1 true, i1 true, i1 true, i1 true>, <4 x i32> undef), !tbaa [[TBAA0]]
|
||||||
; AVX512-NEXT: [[TMP7:%.*]] = add nsw <4 x i32> [[TMP6]], <i32 1, i32 2, i32 3, i32 4>
|
; AVX512-NEXT: [[TMP7:%.*]] = add nsw <4 x i32> [[TMP6]], <i32 1, i32 2, i32 3, i32 4>
|
||||||
|
|
@ -220,7 +220,7 @@ define void @gather_load_3(i32* noalias nocapture %0, i32* noalias nocapture rea
|
||||||
; AVX2-NEXT: [[TMP5:%.*]] = getelementptr inbounds i32, i32* [[TMP0:%.*]], i64 1
|
; AVX2-NEXT: [[TMP5:%.*]] = getelementptr inbounds i32, i32* [[TMP0:%.*]], i64 1
|
||||||
; AVX2-NEXT: store i32 [[TMP4]], i32* [[TMP0]], align 4, !tbaa [[TBAA0]]
|
; AVX2-NEXT: store i32 [[TMP4]], i32* [[TMP0]], align 4, !tbaa [[TBAA0]]
|
||||||
; AVX2-NEXT: [[TMP6:%.*]] = insertelement <4 x i32*> poison, i32* [[TMP1]], i32 0
|
; AVX2-NEXT: [[TMP6:%.*]] = insertelement <4 x i32*> poison, i32* [[TMP1]], i32 0
|
||||||
; AVX2-NEXT: [[TMP7:%.*]] = shufflevector <4 x i32*> [[TMP6]], <4 x i32*> undef, <4 x i32> zeroinitializer
|
; AVX2-NEXT: [[TMP7:%.*]] = shufflevector <4 x i32*> [[TMP6]], <4 x i32*> poison, <4 x i32> zeroinitializer
|
||||||
; AVX2-NEXT: [[TMP8:%.*]] = getelementptr i32, <4 x i32*> [[TMP7]], <4 x i64> <i64 11, i64 4, i64 15, i64 18>
|
; AVX2-NEXT: [[TMP8:%.*]] = getelementptr i32, <4 x i32*> [[TMP7]], <4 x i64> <i64 11, i64 4, i64 15, i64 18>
|
||||||
; AVX2-NEXT: [[TMP9:%.*]] = call <4 x i32> @llvm.masked.gather.v4i32.v4p0i32(<4 x i32*> [[TMP8]], i32 4, <4 x i1> <i1 true, i1 true, i1 true, i1 true>, <4 x i32> undef), !tbaa [[TBAA0]]
|
; AVX2-NEXT: [[TMP9:%.*]] = call <4 x i32> @llvm.masked.gather.v4i32.v4p0i32(<4 x i32*> [[TMP8]], i32 4, <4 x i1> <i1 true, i1 true, i1 true, i1 true>, <4 x i32> undef), !tbaa [[TBAA0]]
|
||||||
; AVX2-NEXT: [[TMP10:%.*]] = add <4 x i32> [[TMP9]], <i32 2, i32 3, i32 4, i32 1>
|
; AVX2-NEXT: [[TMP10:%.*]] = add <4 x i32> [[TMP9]], <i32 2, i32 3, i32 4, i32 1>
|
||||||
|
|
@ -249,7 +249,7 @@ define void @gather_load_3(i32* noalias nocapture %0, i32* noalias nocapture rea
|
||||||
; AVX512-NEXT: [[TMP5:%.*]] = getelementptr inbounds i32, i32* [[TMP0:%.*]], i64 1
|
; AVX512-NEXT: [[TMP5:%.*]] = getelementptr inbounds i32, i32* [[TMP0:%.*]], i64 1
|
||||||
; AVX512-NEXT: store i32 [[TMP4]], i32* [[TMP0]], align 4, !tbaa [[TBAA0]]
|
; AVX512-NEXT: store i32 [[TMP4]], i32* [[TMP0]], align 4, !tbaa [[TBAA0]]
|
||||||
; AVX512-NEXT: [[TMP6:%.*]] = insertelement <4 x i32*> poison, i32* [[TMP1]], i32 0
|
; AVX512-NEXT: [[TMP6:%.*]] = insertelement <4 x i32*> poison, i32* [[TMP1]], i32 0
|
||||||
; AVX512-NEXT: [[TMP7:%.*]] = shufflevector <4 x i32*> [[TMP6]], <4 x i32*> undef, <4 x i32> zeroinitializer
|
; AVX512-NEXT: [[TMP7:%.*]] = shufflevector <4 x i32*> [[TMP6]], <4 x i32*> poison, <4 x i32> zeroinitializer
|
||||||
; AVX512-NEXT: [[TMP8:%.*]] = getelementptr i32, <4 x i32*> [[TMP7]], <4 x i64> <i64 11, i64 4, i64 15, i64 18>
|
; AVX512-NEXT: [[TMP8:%.*]] = getelementptr i32, <4 x i32*> [[TMP7]], <4 x i64> <i64 11, i64 4, i64 15, i64 18>
|
||||||
; AVX512-NEXT: [[TMP9:%.*]] = call <4 x i32> @llvm.masked.gather.v4i32.v4p0i32(<4 x i32*> [[TMP8]], i32 4, <4 x i1> <i1 true, i1 true, i1 true, i1 true>, <4 x i32> undef), !tbaa [[TBAA0]]
|
; AVX512-NEXT: [[TMP9:%.*]] = call <4 x i32> @llvm.masked.gather.v4i32.v4p0i32(<4 x i32*> [[TMP8]], i32 4, <4 x i1> <i1 true, i1 true, i1 true, i1 true>, <4 x i32> undef), !tbaa [[TBAA0]]
|
||||||
; AVX512-NEXT: [[TMP10:%.*]] = add <4 x i32> [[TMP9]], <i32 2, i32 3, i32 4, i32 1>
|
; AVX512-NEXT: [[TMP10:%.*]] = add <4 x i32> [[TMP9]], <i32 2, i32 3, i32 4, i32 1>
|
||||||
|
|
@ -399,7 +399,7 @@ define void @gather_load_4(i32* noalias nocapture %t0, i32* noalias nocapture re
|
||||||
; AVX2-LABEL: @gather_load_4(
|
; AVX2-LABEL: @gather_load_4(
|
||||||
; AVX2-NEXT: [[T5:%.*]] = getelementptr inbounds i32, i32* [[T0:%.*]], i64 1
|
; AVX2-NEXT: [[T5:%.*]] = getelementptr inbounds i32, i32* [[T0:%.*]], i64 1
|
||||||
; AVX2-NEXT: [[TMP1:%.*]] = insertelement <4 x i32*> poison, i32* [[T1:%.*]], i32 0
|
; AVX2-NEXT: [[TMP1:%.*]] = insertelement <4 x i32*> poison, i32* [[T1:%.*]], i32 0
|
||||||
; AVX2-NEXT: [[TMP2:%.*]] = shufflevector <4 x i32*> [[TMP1]], <4 x i32*> undef, <4 x i32> zeroinitializer
|
; AVX2-NEXT: [[TMP2:%.*]] = shufflevector <4 x i32*> [[TMP1]], <4 x i32*> poison, <4 x i32> zeroinitializer
|
||||||
; AVX2-NEXT: [[TMP3:%.*]] = getelementptr i32, <4 x i32*> [[TMP2]], <4 x i64> <i64 11, i64 4, i64 15, i64 18>
|
; AVX2-NEXT: [[TMP3:%.*]] = getelementptr i32, <4 x i32*> [[TMP2]], <4 x i64> <i64 11, i64 4, i64 15, i64 18>
|
||||||
; AVX2-NEXT: [[T21:%.*]] = getelementptr inbounds i32, i32* [[T0]], i64 5
|
; AVX2-NEXT: [[T21:%.*]] = getelementptr inbounds i32, i32* [[T0]], i64 5
|
||||||
; AVX2-NEXT: [[T22:%.*]] = getelementptr inbounds i32, i32* [[T1]], i64 9
|
; AVX2-NEXT: [[T22:%.*]] = getelementptr inbounds i32, i32* [[T1]], i64 9
|
||||||
|
|
@ -428,7 +428,7 @@ define void @gather_load_4(i32* noalias nocapture %t0, i32* noalias nocapture re
|
||||||
; AVX512-LABEL: @gather_load_4(
|
; AVX512-LABEL: @gather_load_4(
|
||||||
; AVX512-NEXT: [[T5:%.*]] = getelementptr inbounds i32, i32* [[T0:%.*]], i64 1
|
; AVX512-NEXT: [[T5:%.*]] = getelementptr inbounds i32, i32* [[T0:%.*]], i64 1
|
||||||
; AVX512-NEXT: [[TMP1:%.*]] = insertelement <4 x i32*> poison, i32* [[T1:%.*]], i32 0
|
; AVX512-NEXT: [[TMP1:%.*]] = insertelement <4 x i32*> poison, i32* [[T1:%.*]], i32 0
|
||||||
; AVX512-NEXT: [[TMP2:%.*]] = shufflevector <4 x i32*> [[TMP1]], <4 x i32*> undef, <4 x i32> zeroinitializer
|
; AVX512-NEXT: [[TMP2:%.*]] = shufflevector <4 x i32*> [[TMP1]], <4 x i32*> poison, <4 x i32> zeroinitializer
|
||||||
; AVX512-NEXT: [[TMP3:%.*]] = getelementptr i32, <4 x i32*> [[TMP2]], <4 x i64> <i64 11, i64 4, i64 15, i64 18>
|
; AVX512-NEXT: [[TMP3:%.*]] = getelementptr i32, <4 x i32*> [[TMP2]], <4 x i64> <i64 11, i64 4, i64 15, i64 18>
|
||||||
; AVX512-NEXT: [[T21:%.*]] = getelementptr inbounds i32, i32* [[T0]], i64 5
|
; AVX512-NEXT: [[T21:%.*]] = getelementptr inbounds i32, i32* [[T0]], i64 5
|
||||||
; AVX512-NEXT: [[T22:%.*]] = getelementptr inbounds i32, i32* [[T1]], i64 9
|
; AVX512-NEXT: [[T22:%.*]] = getelementptr inbounds i32, i32* [[T1]], i64 9
|
||||||
|
|
@ -510,7 +510,7 @@ define void @gather_load_div(float* noalias nocapture %0, float* noalias nocaptu
|
||||||
; SSE-NEXT: [[TMP8:%.*]] = insertelement <4 x float*> [[TMP7]], float* [[TMP4]], i32 2
|
; SSE-NEXT: [[TMP8:%.*]] = insertelement <4 x float*> [[TMP7]], float* [[TMP4]], i32 2
|
||||||
; SSE-NEXT: [[TMP9:%.*]] = insertelement <4 x float*> [[TMP8]], float* [[TMP5]], i32 3
|
; SSE-NEXT: [[TMP9:%.*]] = insertelement <4 x float*> [[TMP8]], float* [[TMP5]], i32 3
|
||||||
; SSE-NEXT: [[TMP10:%.*]] = call <4 x float> @llvm.masked.gather.v4f32.v4p0f32(<4 x float*> [[TMP9]], i32 4, <4 x i1> <i1 true, i1 true, i1 true, i1 true>, <4 x float> undef), !tbaa [[TBAA0]]
|
; SSE-NEXT: [[TMP10:%.*]] = call <4 x float> @llvm.masked.gather.v4f32.v4p0f32(<4 x float*> [[TMP9]], i32 4, <4 x i1> <i1 true, i1 true, i1 true, i1 true>, <4 x float> undef), !tbaa [[TBAA0]]
|
||||||
; SSE-NEXT: [[TMP11:%.*]] = shufflevector <4 x float*> [[TMP6]], <4 x float*> undef, <4 x i32> zeroinitializer
|
; SSE-NEXT: [[TMP11:%.*]] = shufflevector <4 x float*> [[TMP6]], <4 x float*> poison, <4 x i32> zeroinitializer
|
||||||
; SSE-NEXT: [[TMP12:%.*]] = getelementptr float, <4 x float*> [[TMP11]], <4 x i64> <i64 4, i64 13, i64 11, i64 44>
|
; SSE-NEXT: [[TMP12:%.*]] = getelementptr float, <4 x float*> [[TMP11]], <4 x i64> <i64 4, i64 13, i64 11, i64 44>
|
||||||
; SSE-NEXT: [[TMP13:%.*]] = call <4 x float> @llvm.masked.gather.v4f32.v4p0f32(<4 x float*> [[TMP12]], i32 4, <4 x i1> <i1 true, i1 true, i1 true, i1 true>, <4 x float> undef), !tbaa [[TBAA0]]
|
; SSE-NEXT: [[TMP13:%.*]] = call <4 x float> @llvm.masked.gather.v4f32.v4p0f32(<4 x float*> [[TMP12]], i32 4, <4 x i1> <i1 true, i1 true, i1 true, i1 true>, <4 x float> undef), !tbaa [[TBAA0]]
|
||||||
; SSE-NEXT: [[TMP14:%.*]] = fdiv <4 x float> [[TMP10]], [[TMP13]]
|
; SSE-NEXT: [[TMP14:%.*]] = fdiv <4 x float> [[TMP10]], [[TMP13]]
|
||||||
|
|
@ -529,7 +529,7 @@ define void @gather_load_div(float* noalias nocapture %0, float* noalias nocaptu
|
||||||
; AVX-LABEL: @gather_load_div(
|
; AVX-LABEL: @gather_load_div(
|
||||||
; AVX-NEXT: [[TMP3:%.*]] = getelementptr inbounds float, float* [[TMP1:%.*]], i64 10
|
; AVX-NEXT: [[TMP3:%.*]] = getelementptr inbounds float, float* [[TMP1:%.*]], i64 10
|
||||||
; AVX-NEXT: [[TMP4:%.*]] = insertelement <2 x float*> poison, float* [[TMP1]], i32 0
|
; AVX-NEXT: [[TMP4:%.*]] = insertelement <2 x float*> poison, float* [[TMP1]], i32 0
|
||||||
; AVX-NEXT: [[TMP5:%.*]] = shufflevector <2 x float*> [[TMP4]], <2 x float*> undef, <2 x i32> zeroinitializer
|
; AVX-NEXT: [[TMP5:%.*]] = shufflevector <2 x float*> [[TMP4]], <2 x float*> poison, <2 x i32> zeroinitializer
|
||||||
; AVX-NEXT: [[TMP6:%.*]] = getelementptr float, <2 x float*> [[TMP5]], <2 x i64> <i64 3, i64 14>
|
; AVX-NEXT: [[TMP6:%.*]] = getelementptr float, <2 x float*> [[TMP5]], <2 x i64> <i64 3, i64 14>
|
||||||
; AVX-NEXT: [[TMP7:%.*]] = getelementptr float, <2 x float*> [[TMP5]], <2 x i64> <i64 17, i64 8>
|
; AVX-NEXT: [[TMP7:%.*]] = getelementptr float, <2 x float*> [[TMP5]], <2 x i64> <i64 17, i64 8>
|
||||||
; AVX-NEXT: [[TMP8:%.*]] = getelementptr float, <2 x float*> [[TMP5]], <2 x i64> <i64 5, i64 20>
|
; AVX-NEXT: [[TMP8:%.*]] = getelementptr float, <2 x float*> [[TMP5]], <2 x i64> <i64 5, i64 20>
|
||||||
|
|
@ -542,7 +542,7 @@ define void @gather_load_div(float* noalias nocapture %0, float* noalias nocaptu
|
||||||
; AVX-NEXT: [[TMP15:%.*]] = shufflevector <2 x float*> [[TMP8]], <2 x float*> undef, <8 x i32> <i32 0, i32 1, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef>
|
; AVX-NEXT: [[TMP15:%.*]] = shufflevector <2 x float*> [[TMP8]], <2 x float*> undef, <8 x i32> <i32 0, i32 1, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef>
|
||||||
; AVX-NEXT: [[TMP16:%.*]] = shufflevector <8 x float*> [[TMP14]], <8 x float*> [[TMP15]], <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 8, i32 9>
|
; AVX-NEXT: [[TMP16:%.*]] = shufflevector <8 x float*> [[TMP14]], <8 x float*> [[TMP15]], <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 8, i32 9>
|
||||||
; AVX-NEXT: [[TMP17:%.*]] = call <8 x float> @llvm.masked.gather.v8f32.v8p0f32(<8 x float*> [[TMP16]], i32 4, <8 x i1> <i1 true, i1 true, i1 true, i1 true, i1 true, i1 true, i1 true, i1 true>, <8 x float> undef), !tbaa [[TBAA0]]
|
; AVX-NEXT: [[TMP17:%.*]] = call <8 x float> @llvm.masked.gather.v8f32.v8p0f32(<8 x float*> [[TMP16]], i32 4, <8 x i1> <i1 true, i1 true, i1 true, i1 true, i1 true, i1 true, i1 true, i1 true>, <8 x float> undef), !tbaa [[TBAA0]]
|
||||||
; AVX-NEXT: [[TMP18:%.*]] = shufflevector <8 x float*> [[TMP9]], <8 x float*> undef, <8 x i32> zeroinitializer
|
; AVX-NEXT: [[TMP18:%.*]] = shufflevector <8 x float*> [[TMP9]], <8 x float*> poison, <8 x i32> zeroinitializer
|
||||||
; AVX-NEXT: [[TMP19:%.*]] = getelementptr float, <8 x float*> [[TMP18]], <8 x i64> <i64 4, i64 13, i64 11, i64 44, i64 33, i64 30, i64 27, i64 23>
|
; AVX-NEXT: [[TMP19:%.*]] = getelementptr float, <8 x float*> [[TMP18]], <8 x i64> <i64 4, i64 13, i64 11, i64 44, i64 33, i64 30, i64 27, i64 23>
|
||||||
; AVX-NEXT: [[TMP20:%.*]] = call <8 x float> @llvm.masked.gather.v8f32.v8p0f32(<8 x float*> [[TMP19]], i32 4, <8 x i1> <i1 true, i1 true, i1 true, i1 true, i1 true, i1 true, i1 true, i1 true>, <8 x float> undef), !tbaa [[TBAA0]]
|
; AVX-NEXT: [[TMP20:%.*]] = call <8 x float> @llvm.masked.gather.v8f32.v8p0f32(<8 x float*> [[TMP19]], i32 4, <8 x i1> <i1 true, i1 true, i1 true, i1 true, i1 true, i1 true, i1 true, i1 true>, <8 x float> undef), !tbaa [[TBAA0]]
|
||||||
; AVX-NEXT: [[TMP21:%.*]] = fdiv <8 x float> [[TMP17]], [[TMP20]]
|
; AVX-NEXT: [[TMP21:%.*]] = fdiv <8 x float> [[TMP17]], [[TMP20]]
|
||||||
|
|
@ -553,10 +553,10 @@ define void @gather_load_div(float* noalias nocapture %0, float* noalias nocaptu
|
||||||
; AVX2-LABEL: @gather_load_div(
|
; AVX2-LABEL: @gather_load_div(
|
||||||
; AVX2-NEXT: [[TMP3:%.*]] = getelementptr inbounds float, float* [[TMP1:%.*]], i64 10
|
; AVX2-NEXT: [[TMP3:%.*]] = getelementptr inbounds float, float* [[TMP1:%.*]], i64 10
|
||||||
; AVX2-NEXT: [[TMP4:%.*]] = insertelement <2 x float*> poison, float* [[TMP1]], i32 0
|
; AVX2-NEXT: [[TMP4:%.*]] = insertelement <2 x float*> poison, float* [[TMP1]], i32 0
|
||||||
; AVX2-NEXT: [[TMP5:%.*]] = shufflevector <2 x float*> [[TMP4]], <2 x float*> undef, <2 x i32> zeroinitializer
|
; AVX2-NEXT: [[TMP5:%.*]] = shufflevector <2 x float*> [[TMP4]], <2 x float*> poison, <2 x i32> zeroinitializer
|
||||||
; AVX2-NEXT: [[TMP6:%.*]] = getelementptr float, <2 x float*> [[TMP5]], <2 x i64> <i64 3, i64 14>
|
; AVX2-NEXT: [[TMP6:%.*]] = getelementptr float, <2 x float*> [[TMP5]], <2 x i64> <i64 3, i64 14>
|
||||||
; AVX2-NEXT: [[TMP7:%.*]] = insertelement <4 x float*> poison, float* [[TMP1]], i32 0
|
; AVX2-NEXT: [[TMP7:%.*]] = insertelement <4 x float*> poison, float* [[TMP1]], i32 0
|
||||||
; AVX2-NEXT: [[TMP8:%.*]] = shufflevector <4 x float*> [[TMP7]], <4 x float*> undef, <4 x i32> zeroinitializer
|
; AVX2-NEXT: [[TMP8:%.*]] = shufflevector <4 x float*> [[TMP7]], <4 x float*> poison, <4 x i32> zeroinitializer
|
||||||
; AVX2-NEXT: [[TMP9:%.*]] = getelementptr float, <4 x float*> [[TMP8]], <4 x i64> <i64 17, i64 8, i64 5, i64 20>
|
; AVX2-NEXT: [[TMP9:%.*]] = getelementptr float, <4 x float*> [[TMP8]], <4 x i64> <i64 17, i64 8, i64 5, i64 20>
|
||||||
; AVX2-NEXT: [[TMP10:%.*]] = insertelement <8 x float*> poison, float* [[TMP1]], i32 0
|
; AVX2-NEXT: [[TMP10:%.*]] = insertelement <8 x float*> poison, float* [[TMP1]], i32 0
|
||||||
; AVX2-NEXT: [[TMP11:%.*]] = insertelement <8 x float*> [[TMP10]], float* [[TMP3]], i32 1
|
; AVX2-NEXT: [[TMP11:%.*]] = insertelement <8 x float*> [[TMP10]], float* [[TMP3]], i32 1
|
||||||
|
|
@ -565,7 +565,7 @@ define void @gather_load_div(float* noalias nocapture %0, float* noalias nocaptu
|
||||||
; AVX2-NEXT: [[TMP14:%.*]] = shufflevector <4 x float*> [[TMP9]], <4 x float*> undef, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 undef, i32 undef, i32 undef, i32 undef>
|
; AVX2-NEXT: [[TMP14:%.*]] = shufflevector <4 x float*> [[TMP9]], <4 x float*> undef, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 undef, i32 undef, i32 undef, i32 undef>
|
||||||
; AVX2-NEXT: [[TMP15:%.*]] = shufflevector <8 x float*> [[TMP13]], <8 x float*> [[TMP14]], <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 8, i32 9, i32 10, i32 11>
|
; AVX2-NEXT: [[TMP15:%.*]] = shufflevector <8 x float*> [[TMP13]], <8 x float*> [[TMP14]], <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 8, i32 9, i32 10, i32 11>
|
||||||
; AVX2-NEXT: [[TMP16:%.*]] = call <8 x float> @llvm.masked.gather.v8f32.v8p0f32(<8 x float*> [[TMP15]], i32 4, <8 x i1> <i1 true, i1 true, i1 true, i1 true, i1 true, i1 true, i1 true, i1 true>, <8 x float> undef), !tbaa [[TBAA0]]
|
; AVX2-NEXT: [[TMP16:%.*]] = call <8 x float> @llvm.masked.gather.v8f32.v8p0f32(<8 x float*> [[TMP15]], i32 4, <8 x i1> <i1 true, i1 true, i1 true, i1 true, i1 true, i1 true, i1 true, i1 true>, <8 x float> undef), !tbaa [[TBAA0]]
|
||||||
; AVX2-NEXT: [[TMP17:%.*]] = shufflevector <8 x float*> [[TMP10]], <8 x float*> undef, <8 x i32> zeroinitializer
|
; AVX2-NEXT: [[TMP17:%.*]] = shufflevector <8 x float*> [[TMP10]], <8 x float*> poison, <8 x i32> zeroinitializer
|
||||||
; AVX2-NEXT: [[TMP18:%.*]] = getelementptr float, <8 x float*> [[TMP17]], <8 x i64> <i64 4, i64 13, i64 11, i64 44, i64 33, i64 30, i64 27, i64 23>
|
; AVX2-NEXT: [[TMP18:%.*]] = getelementptr float, <8 x float*> [[TMP17]], <8 x i64> <i64 4, i64 13, i64 11, i64 44, i64 33, i64 30, i64 27, i64 23>
|
||||||
; AVX2-NEXT: [[TMP19:%.*]] = call <8 x float> @llvm.masked.gather.v8f32.v8p0f32(<8 x float*> [[TMP18]], i32 4, <8 x i1> <i1 true, i1 true, i1 true, i1 true, i1 true, i1 true, i1 true, i1 true>, <8 x float> undef), !tbaa [[TBAA0]]
|
; AVX2-NEXT: [[TMP19:%.*]] = call <8 x float> @llvm.masked.gather.v8f32.v8p0f32(<8 x float*> [[TMP18]], i32 4, <8 x i1> <i1 true, i1 true, i1 true, i1 true, i1 true, i1 true, i1 true, i1 true>, <8 x float> undef), !tbaa [[TBAA0]]
|
||||||
; AVX2-NEXT: [[TMP20:%.*]] = fdiv <8 x float> [[TMP16]], [[TMP19]]
|
; AVX2-NEXT: [[TMP20:%.*]] = fdiv <8 x float> [[TMP16]], [[TMP19]]
|
||||||
|
|
@ -576,10 +576,10 @@ define void @gather_load_div(float* noalias nocapture %0, float* noalias nocaptu
|
||||||
; AVX512-LABEL: @gather_load_div(
|
; AVX512-LABEL: @gather_load_div(
|
||||||
; AVX512-NEXT: [[TMP3:%.*]] = getelementptr inbounds float, float* [[TMP1:%.*]], i64 10
|
; AVX512-NEXT: [[TMP3:%.*]] = getelementptr inbounds float, float* [[TMP1:%.*]], i64 10
|
||||||
; AVX512-NEXT: [[TMP4:%.*]] = insertelement <2 x float*> poison, float* [[TMP1]], i32 0
|
; AVX512-NEXT: [[TMP4:%.*]] = insertelement <2 x float*> poison, float* [[TMP1]], i32 0
|
||||||
; AVX512-NEXT: [[TMP5:%.*]] = shufflevector <2 x float*> [[TMP4]], <2 x float*> undef, <2 x i32> zeroinitializer
|
; AVX512-NEXT: [[TMP5:%.*]] = shufflevector <2 x float*> [[TMP4]], <2 x float*> poison, <2 x i32> zeroinitializer
|
||||||
; AVX512-NEXT: [[TMP6:%.*]] = getelementptr float, <2 x float*> [[TMP5]], <2 x i64> <i64 3, i64 14>
|
; AVX512-NEXT: [[TMP6:%.*]] = getelementptr float, <2 x float*> [[TMP5]], <2 x i64> <i64 3, i64 14>
|
||||||
; AVX512-NEXT: [[TMP7:%.*]] = insertelement <4 x float*> poison, float* [[TMP1]], i32 0
|
; AVX512-NEXT: [[TMP7:%.*]] = insertelement <4 x float*> poison, float* [[TMP1]], i32 0
|
||||||
; AVX512-NEXT: [[TMP8:%.*]] = shufflevector <4 x float*> [[TMP7]], <4 x float*> undef, <4 x i32> zeroinitializer
|
; AVX512-NEXT: [[TMP8:%.*]] = shufflevector <4 x float*> [[TMP7]], <4 x float*> poison, <4 x i32> zeroinitializer
|
||||||
; AVX512-NEXT: [[TMP9:%.*]] = getelementptr float, <4 x float*> [[TMP8]], <4 x i64> <i64 17, i64 8, i64 5, i64 20>
|
; AVX512-NEXT: [[TMP9:%.*]] = getelementptr float, <4 x float*> [[TMP8]], <4 x i64> <i64 17, i64 8, i64 5, i64 20>
|
||||||
; AVX512-NEXT: [[TMP10:%.*]] = insertelement <8 x float*> poison, float* [[TMP1]], i32 0
|
; AVX512-NEXT: [[TMP10:%.*]] = insertelement <8 x float*> poison, float* [[TMP1]], i32 0
|
||||||
; AVX512-NEXT: [[TMP11:%.*]] = insertelement <8 x float*> [[TMP10]], float* [[TMP3]], i32 1
|
; AVX512-NEXT: [[TMP11:%.*]] = insertelement <8 x float*> [[TMP10]], float* [[TMP3]], i32 1
|
||||||
|
|
@ -588,7 +588,7 @@ define void @gather_load_div(float* noalias nocapture %0, float* noalias nocaptu
|
||||||
; AVX512-NEXT: [[TMP14:%.*]] = shufflevector <4 x float*> [[TMP9]], <4 x float*> undef, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 undef, i32 undef, i32 undef, i32 undef>
|
; AVX512-NEXT: [[TMP14:%.*]] = shufflevector <4 x float*> [[TMP9]], <4 x float*> undef, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 undef, i32 undef, i32 undef, i32 undef>
|
||||||
; AVX512-NEXT: [[TMP15:%.*]] = shufflevector <8 x float*> [[TMP13]], <8 x float*> [[TMP14]], <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 8, i32 9, i32 10, i32 11>
|
; AVX512-NEXT: [[TMP15:%.*]] = shufflevector <8 x float*> [[TMP13]], <8 x float*> [[TMP14]], <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 8, i32 9, i32 10, i32 11>
|
||||||
; AVX512-NEXT: [[TMP16:%.*]] = call <8 x float> @llvm.masked.gather.v8f32.v8p0f32(<8 x float*> [[TMP15]], i32 4, <8 x i1> <i1 true, i1 true, i1 true, i1 true, i1 true, i1 true, i1 true, i1 true>, <8 x float> undef), !tbaa [[TBAA0]]
|
; AVX512-NEXT: [[TMP16:%.*]] = call <8 x float> @llvm.masked.gather.v8f32.v8p0f32(<8 x float*> [[TMP15]], i32 4, <8 x i1> <i1 true, i1 true, i1 true, i1 true, i1 true, i1 true, i1 true, i1 true>, <8 x float> undef), !tbaa [[TBAA0]]
|
||||||
; AVX512-NEXT: [[TMP17:%.*]] = shufflevector <8 x float*> [[TMP10]], <8 x float*> undef, <8 x i32> zeroinitializer
|
; AVX512-NEXT: [[TMP17:%.*]] = shufflevector <8 x float*> [[TMP10]], <8 x float*> poison, <8 x i32> zeroinitializer
|
||||||
; AVX512-NEXT: [[TMP18:%.*]] = getelementptr float, <8 x float*> [[TMP17]], <8 x i64> <i64 4, i64 13, i64 11, i64 44, i64 33, i64 30, i64 27, i64 23>
|
; AVX512-NEXT: [[TMP18:%.*]] = getelementptr float, <8 x float*> [[TMP17]], <8 x i64> <i64 4, i64 13, i64 11, i64 44, i64 33, i64 30, i64 27, i64 23>
|
||||||
; AVX512-NEXT: [[TMP19:%.*]] = call <8 x float> @llvm.masked.gather.v8f32.v8p0f32(<8 x float*> [[TMP18]], i32 4, <8 x i1> <i1 true, i1 true, i1 true, i1 true, i1 true, i1 true, i1 true, i1 true>, <8 x float> undef), !tbaa [[TBAA0]]
|
; AVX512-NEXT: [[TMP19:%.*]] = call <8 x float> @llvm.masked.gather.v8f32.v8p0f32(<8 x float*> [[TMP18]], i32 4, <8 x i1> <i1 true, i1 true, i1 true, i1 true, i1 true, i1 true, i1 true, i1 true>, <8 x float> undef), !tbaa [[TBAA0]]
|
||||||
; AVX512-NEXT: [[TMP20:%.*]] = fdiv <8 x float> [[TMP16]], [[TMP19]]
|
; AVX512-NEXT: [[TMP20:%.*]] = fdiv <8 x float> [[TMP16]], [[TMP19]]
|
||||||
|
|
|
||||||
|
|
@ -90,7 +90,7 @@ define void @gather_load_2(i32* noalias nocapture %0, i32* noalias nocapture rea
|
||||||
;
|
;
|
||||||
; AVX2-LABEL: @gather_load_2(
|
; AVX2-LABEL: @gather_load_2(
|
||||||
; AVX2-NEXT: [[TMP3:%.*]] = insertelement <4 x i32*> poison, i32* [[TMP1:%.*]], i32 0
|
; AVX2-NEXT: [[TMP3:%.*]] = insertelement <4 x i32*> poison, i32* [[TMP1:%.*]], i32 0
|
||||||
; AVX2-NEXT: [[TMP4:%.*]] = shufflevector <4 x i32*> [[TMP3]], <4 x i32*> undef, <4 x i32> zeroinitializer
|
; AVX2-NEXT: [[TMP4:%.*]] = shufflevector <4 x i32*> [[TMP3]], <4 x i32*> poison, <4 x i32> zeroinitializer
|
||||||
; AVX2-NEXT: [[TMP5:%.*]] = getelementptr i32, <4 x i32*> [[TMP4]], <4 x i64> <i64 1, i64 10, i64 3, i64 5>
|
; AVX2-NEXT: [[TMP5:%.*]] = getelementptr i32, <4 x i32*> [[TMP4]], <4 x i64> <i64 1, i64 10, i64 3, i64 5>
|
||||||
; AVX2-NEXT: [[TMP6:%.*]] = call <4 x i32> @llvm.masked.gather.v4i32.v4p0i32(<4 x i32*> [[TMP5]], i32 4, <4 x i1> <i1 true, i1 true, i1 true, i1 true>, <4 x i32> undef), !tbaa [[TBAA0]]
|
; AVX2-NEXT: [[TMP6:%.*]] = call <4 x i32> @llvm.masked.gather.v4i32.v4p0i32(<4 x i32*> [[TMP5]], i32 4, <4 x i1> <i1 true, i1 true, i1 true, i1 true>, <4 x i32> undef), !tbaa [[TBAA0]]
|
||||||
; AVX2-NEXT: [[TMP7:%.*]] = add nsw <4 x i32> [[TMP6]], <i32 1, i32 2, i32 3, i32 4>
|
; AVX2-NEXT: [[TMP7:%.*]] = add nsw <4 x i32> [[TMP6]], <i32 1, i32 2, i32 3, i32 4>
|
||||||
|
|
@ -100,7 +100,7 @@ define void @gather_load_2(i32* noalias nocapture %0, i32* noalias nocapture rea
|
||||||
;
|
;
|
||||||
; AVX512-LABEL: @gather_load_2(
|
; AVX512-LABEL: @gather_load_2(
|
||||||
; AVX512-NEXT: [[TMP3:%.*]] = insertelement <4 x i32*> poison, i32* [[TMP1:%.*]], i32 0
|
; AVX512-NEXT: [[TMP3:%.*]] = insertelement <4 x i32*> poison, i32* [[TMP1:%.*]], i32 0
|
||||||
; AVX512-NEXT: [[TMP4:%.*]] = shufflevector <4 x i32*> [[TMP3]], <4 x i32*> undef, <4 x i32> zeroinitializer
|
; AVX512-NEXT: [[TMP4:%.*]] = shufflevector <4 x i32*> [[TMP3]], <4 x i32*> poison, <4 x i32> zeroinitializer
|
||||||
; AVX512-NEXT: [[TMP5:%.*]] = getelementptr i32, <4 x i32*> [[TMP4]], <4 x i64> <i64 1, i64 10, i64 3, i64 5>
|
; AVX512-NEXT: [[TMP5:%.*]] = getelementptr i32, <4 x i32*> [[TMP4]], <4 x i64> <i64 1, i64 10, i64 3, i64 5>
|
||||||
; AVX512-NEXT: [[TMP6:%.*]] = call <4 x i32> @llvm.masked.gather.v4i32.v4p0i32(<4 x i32*> [[TMP5]], i32 4, <4 x i1> <i1 true, i1 true, i1 true, i1 true>, <4 x i32> undef), !tbaa [[TBAA0]]
|
; AVX512-NEXT: [[TMP6:%.*]] = call <4 x i32> @llvm.masked.gather.v4i32.v4p0i32(<4 x i32*> [[TMP5]], i32 4, <4 x i1> <i1 true, i1 true, i1 true, i1 true>, <4 x i32> undef), !tbaa [[TBAA0]]
|
||||||
; AVX512-NEXT: [[TMP7:%.*]] = add nsw <4 x i32> [[TMP6]], <i32 1, i32 2, i32 3, i32 4>
|
; AVX512-NEXT: [[TMP7:%.*]] = add nsw <4 x i32> [[TMP6]], <i32 1, i32 2, i32 3, i32 4>
|
||||||
|
|
@ -220,7 +220,7 @@ define void @gather_load_3(i32* noalias nocapture %0, i32* noalias nocapture rea
|
||||||
; AVX2-NEXT: [[TMP5:%.*]] = getelementptr inbounds i32, i32* [[TMP0:%.*]], i64 1
|
; AVX2-NEXT: [[TMP5:%.*]] = getelementptr inbounds i32, i32* [[TMP0:%.*]], i64 1
|
||||||
; AVX2-NEXT: store i32 [[TMP4]], i32* [[TMP0]], align 4, !tbaa [[TBAA0]]
|
; AVX2-NEXT: store i32 [[TMP4]], i32* [[TMP0]], align 4, !tbaa [[TBAA0]]
|
||||||
; AVX2-NEXT: [[TMP6:%.*]] = insertelement <4 x i32*> poison, i32* [[TMP1]], i32 0
|
; AVX2-NEXT: [[TMP6:%.*]] = insertelement <4 x i32*> poison, i32* [[TMP1]], i32 0
|
||||||
; AVX2-NEXT: [[TMP7:%.*]] = shufflevector <4 x i32*> [[TMP6]], <4 x i32*> undef, <4 x i32> zeroinitializer
|
; AVX2-NEXT: [[TMP7:%.*]] = shufflevector <4 x i32*> [[TMP6]], <4 x i32*> poison, <4 x i32> zeroinitializer
|
||||||
; AVX2-NEXT: [[TMP8:%.*]] = getelementptr i32, <4 x i32*> [[TMP7]], <4 x i64> <i64 11, i64 4, i64 15, i64 18>
|
; AVX2-NEXT: [[TMP8:%.*]] = getelementptr i32, <4 x i32*> [[TMP7]], <4 x i64> <i64 11, i64 4, i64 15, i64 18>
|
||||||
; AVX2-NEXT: [[TMP9:%.*]] = call <4 x i32> @llvm.masked.gather.v4i32.v4p0i32(<4 x i32*> [[TMP8]], i32 4, <4 x i1> <i1 true, i1 true, i1 true, i1 true>, <4 x i32> undef), !tbaa [[TBAA0]]
|
; AVX2-NEXT: [[TMP9:%.*]] = call <4 x i32> @llvm.masked.gather.v4i32.v4p0i32(<4 x i32*> [[TMP8]], i32 4, <4 x i1> <i1 true, i1 true, i1 true, i1 true>, <4 x i32> undef), !tbaa [[TBAA0]]
|
||||||
; AVX2-NEXT: [[TMP10:%.*]] = add <4 x i32> [[TMP9]], <i32 2, i32 3, i32 4, i32 1>
|
; AVX2-NEXT: [[TMP10:%.*]] = add <4 x i32> [[TMP9]], <i32 2, i32 3, i32 4, i32 1>
|
||||||
|
|
@ -249,7 +249,7 @@ define void @gather_load_3(i32* noalias nocapture %0, i32* noalias nocapture rea
|
||||||
; AVX512-NEXT: [[TMP5:%.*]] = getelementptr inbounds i32, i32* [[TMP0:%.*]], i64 1
|
; AVX512-NEXT: [[TMP5:%.*]] = getelementptr inbounds i32, i32* [[TMP0:%.*]], i64 1
|
||||||
; AVX512-NEXT: store i32 [[TMP4]], i32* [[TMP0]], align 4, !tbaa [[TBAA0]]
|
; AVX512-NEXT: store i32 [[TMP4]], i32* [[TMP0]], align 4, !tbaa [[TBAA0]]
|
||||||
; AVX512-NEXT: [[TMP6:%.*]] = insertelement <4 x i32*> poison, i32* [[TMP1]], i32 0
|
; AVX512-NEXT: [[TMP6:%.*]] = insertelement <4 x i32*> poison, i32* [[TMP1]], i32 0
|
||||||
; AVX512-NEXT: [[TMP7:%.*]] = shufflevector <4 x i32*> [[TMP6]], <4 x i32*> undef, <4 x i32> zeroinitializer
|
; AVX512-NEXT: [[TMP7:%.*]] = shufflevector <4 x i32*> [[TMP6]], <4 x i32*> poison, <4 x i32> zeroinitializer
|
||||||
; AVX512-NEXT: [[TMP8:%.*]] = getelementptr i32, <4 x i32*> [[TMP7]], <4 x i64> <i64 11, i64 4, i64 15, i64 18>
|
; AVX512-NEXT: [[TMP8:%.*]] = getelementptr i32, <4 x i32*> [[TMP7]], <4 x i64> <i64 11, i64 4, i64 15, i64 18>
|
||||||
; AVX512-NEXT: [[TMP9:%.*]] = call <4 x i32> @llvm.masked.gather.v4i32.v4p0i32(<4 x i32*> [[TMP8]], i32 4, <4 x i1> <i1 true, i1 true, i1 true, i1 true>, <4 x i32> undef), !tbaa [[TBAA0]]
|
; AVX512-NEXT: [[TMP9:%.*]] = call <4 x i32> @llvm.masked.gather.v4i32.v4p0i32(<4 x i32*> [[TMP8]], i32 4, <4 x i1> <i1 true, i1 true, i1 true, i1 true>, <4 x i32> undef), !tbaa [[TBAA0]]
|
||||||
; AVX512-NEXT: [[TMP10:%.*]] = add <4 x i32> [[TMP9]], <i32 2, i32 3, i32 4, i32 1>
|
; AVX512-NEXT: [[TMP10:%.*]] = add <4 x i32> [[TMP9]], <i32 2, i32 3, i32 4, i32 1>
|
||||||
|
|
@ -399,7 +399,7 @@ define void @gather_load_4(i32* noalias nocapture %t0, i32* noalias nocapture re
|
||||||
; AVX2-LABEL: @gather_load_4(
|
; AVX2-LABEL: @gather_load_4(
|
||||||
; AVX2-NEXT: [[T5:%.*]] = getelementptr inbounds i32, i32* [[T0:%.*]], i64 1
|
; AVX2-NEXT: [[T5:%.*]] = getelementptr inbounds i32, i32* [[T0:%.*]], i64 1
|
||||||
; AVX2-NEXT: [[TMP1:%.*]] = insertelement <4 x i32*> poison, i32* [[T1:%.*]], i32 0
|
; AVX2-NEXT: [[TMP1:%.*]] = insertelement <4 x i32*> poison, i32* [[T1:%.*]], i32 0
|
||||||
; AVX2-NEXT: [[TMP2:%.*]] = shufflevector <4 x i32*> [[TMP1]], <4 x i32*> undef, <4 x i32> zeroinitializer
|
; AVX2-NEXT: [[TMP2:%.*]] = shufflevector <4 x i32*> [[TMP1]], <4 x i32*> poison, <4 x i32> zeroinitializer
|
||||||
; AVX2-NEXT: [[TMP3:%.*]] = getelementptr i32, <4 x i32*> [[TMP2]], <4 x i64> <i64 11, i64 4, i64 15, i64 18>
|
; AVX2-NEXT: [[TMP3:%.*]] = getelementptr i32, <4 x i32*> [[TMP2]], <4 x i64> <i64 11, i64 4, i64 15, i64 18>
|
||||||
; AVX2-NEXT: [[T21:%.*]] = getelementptr inbounds i32, i32* [[T0]], i64 5
|
; AVX2-NEXT: [[T21:%.*]] = getelementptr inbounds i32, i32* [[T0]], i64 5
|
||||||
; AVX2-NEXT: [[T22:%.*]] = getelementptr inbounds i32, i32* [[T1]], i64 9
|
; AVX2-NEXT: [[T22:%.*]] = getelementptr inbounds i32, i32* [[T1]], i64 9
|
||||||
|
|
@ -428,7 +428,7 @@ define void @gather_load_4(i32* noalias nocapture %t0, i32* noalias nocapture re
|
||||||
; AVX512-LABEL: @gather_load_4(
|
; AVX512-LABEL: @gather_load_4(
|
||||||
; AVX512-NEXT: [[T5:%.*]] = getelementptr inbounds i32, i32* [[T0:%.*]], i64 1
|
; AVX512-NEXT: [[T5:%.*]] = getelementptr inbounds i32, i32* [[T0:%.*]], i64 1
|
||||||
; AVX512-NEXT: [[TMP1:%.*]] = insertelement <4 x i32*> poison, i32* [[T1:%.*]], i32 0
|
; AVX512-NEXT: [[TMP1:%.*]] = insertelement <4 x i32*> poison, i32* [[T1:%.*]], i32 0
|
||||||
; AVX512-NEXT: [[TMP2:%.*]] = shufflevector <4 x i32*> [[TMP1]], <4 x i32*> undef, <4 x i32> zeroinitializer
|
; AVX512-NEXT: [[TMP2:%.*]] = shufflevector <4 x i32*> [[TMP1]], <4 x i32*> poison, <4 x i32> zeroinitializer
|
||||||
; AVX512-NEXT: [[TMP3:%.*]] = getelementptr i32, <4 x i32*> [[TMP2]], <4 x i64> <i64 11, i64 4, i64 15, i64 18>
|
; AVX512-NEXT: [[TMP3:%.*]] = getelementptr i32, <4 x i32*> [[TMP2]], <4 x i64> <i64 11, i64 4, i64 15, i64 18>
|
||||||
; AVX512-NEXT: [[T21:%.*]] = getelementptr inbounds i32, i32* [[T0]], i64 5
|
; AVX512-NEXT: [[T21:%.*]] = getelementptr inbounds i32, i32* [[T0]], i64 5
|
||||||
; AVX512-NEXT: [[T22:%.*]] = getelementptr inbounds i32, i32* [[T1]], i64 9
|
; AVX512-NEXT: [[T22:%.*]] = getelementptr inbounds i32, i32* [[T1]], i64 9
|
||||||
|
|
@ -510,7 +510,7 @@ define void @gather_load_div(float* noalias nocapture %0, float* noalias nocaptu
|
||||||
; SSE-NEXT: [[TMP8:%.*]] = insertelement <4 x float*> [[TMP7]], float* [[TMP4]], i32 2
|
; SSE-NEXT: [[TMP8:%.*]] = insertelement <4 x float*> [[TMP7]], float* [[TMP4]], i32 2
|
||||||
; SSE-NEXT: [[TMP9:%.*]] = insertelement <4 x float*> [[TMP8]], float* [[TMP5]], i32 3
|
; SSE-NEXT: [[TMP9:%.*]] = insertelement <4 x float*> [[TMP8]], float* [[TMP5]], i32 3
|
||||||
; SSE-NEXT: [[TMP10:%.*]] = call <4 x float> @llvm.masked.gather.v4f32.v4p0f32(<4 x float*> [[TMP9]], i32 4, <4 x i1> <i1 true, i1 true, i1 true, i1 true>, <4 x float> undef), !tbaa [[TBAA0]]
|
; SSE-NEXT: [[TMP10:%.*]] = call <4 x float> @llvm.masked.gather.v4f32.v4p0f32(<4 x float*> [[TMP9]], i32 4, <4 x i1> <i1 true, i1 true, i1 true, i1 true>, <4 x float> undef), !tbaa [[TBAA0]]
|
||||||
; SSE-NEXT: [[TMP11:%.*]] = shufflevector <4 x float*> [[TMP6]], <4 x float*> undef, <4 x i32> zeroinitializer
|
; SSE-NEXT: [[TMP11:%.*]] = shufflevector <4 x float*> [[TMP6]], <4 x float*> poison, <4 x i32> zeroinitializer
|
||||||
; SSE-NEXT: [[TMP12:%.*]] = getelementptr float, <4 x float*> [[TMP11]], <4 x i64> <i64 4, i64 13, i64 11, i64 44>
|
; SSE-NEXT: [[TMP12:%.*]] = getelementptr float, <4 x float*> [[TMP11]], <4 x i64> <i64 4, i64 13, i64 11, i64 44>
|
||||||
; SSE-NEXT: [[TMP13:%.*]] = call <4 x float> @llvm.masked.gather.v4f32.v4p0f32(<4 x float*> [[TMP12]], i32 4, <4 x i1> <i1 true, i1 true, i1 true, i1 true>, <4 x float> undef), !tbaa [[TBAA0]]
|
; SSE-NEXT: [[TMP13:%.*]] = call <4 x float> @llvm.masked.gather.v4f32.v4p0f32(<4 x float*> [[TMP12]], i32 4, <4 x i1> <i1 true, i1 true, i1 true, i1 true>, <4 x float> undef), !tbaa [[TBAA0]]
|
||||||
; SSE-NEXT: [[TMP14:%.*]] = fdiv <4 x float> [[TMP10]], [[TMP13]]
|
; SSE-NEXT: [[TMP14:%.*]] = fdiv <4 x float> [[TMP10]], [[TMP13]]
|
||||||
|
|
@ -529,7 +529,7 @@ define void @gather_load_div(float* noalias nocapture %0, float* noalias nocaptu
|
||||||
; AVX-LABEL: @gather_load_div(
|
; AVX-LABEL: @gather_load_div(
|
||||||
; AVX-NEXT: [[TMP3:%.*]] = getelementptr inbounds float, float* [[TMP1:%.*]], i64 10
|
; AVX-NEXT: [[TMP3:%.*]] = getelementptr inbounds float, float* [[TMP1:%.*]], i64 10
|
||||||
; AVX-NEXT: [[TMP4:%.*]] = insertelement <2 x float*> poison, float* [[TMP1]], i32 0
|
; AVX-NEXT: [[TMP4:%.*]] = insertelement <2 x float*> poison, float* [[TMP1]], i32 0
|
||||||
; AVX-NEXT: [[TMP5:%.*]] = shufflevector <2 x float*> [[TMP4]], <2 x float*> undef, <2 x i32> zeroinitializer
|
; AVX-NEXT: [[TMP5:%.*]] = shufflevector <2 x float*> [[TMP4]], <2 x float*> poison, <2 x i32> zeroinitializer
|
||||||
; AVX-NEXT: [[TMP6:%.*]] = getelementptr float, <2 x float*> [[TMP5]], <2 x i64> <i64 3, i64 14>
|
; AVX-NEXT: [[TMP6:%.*]] = getelementptr float, <2 x float*> [[TMP5]], <2 x i64> <i64 3, i64 14>
|
||||||
; AVX-NEXT: [[TMP7:%.*]] = getelementptr float, <2 x float*> [[TMP5]], <2 x i64> <i64 17, i64 8>
|
; AVX-NEXT: [[TMP7:%.*]] = getelementptr float, <2 x float*> [[TMP5]], <2 x i64> <i64 17, i64 8>
|
||||||
; AVX-NEXT: [[TMP8:%.*]] = getelementptr float, <2 x float*> [[TMP5]], <2 x i64> <i64 5, i64 20>
|
; AVX-NEXT: [[TMP8:%.*]] = getelementptr float, <2 x float*> [[TMP5]], <2 x i64> <i64 5, i64 20>
|
||||||
|
|
@ -542,7 +542,7 @@ define void @gather_load_div(float* noalias nocapture %0, float* noalias nocaptu
|
||||||
; AVX-NEXT: [[TMP15:%.*]] = shufflevector <2 x float*> [[TMP8]], <2 x float*> undef, <8 x i32> <i32 0, i32 1, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef>
|
; AVX-NEXT: [[TMP15:%.*]] = shufflevector <2 x float*> [[TMP8]], <2 x float*> undef, <8 x i32> <i32 0, i32 1, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef>
|
||||||
; AVX-NEXT: [[TMP16:%.*]] = shufflevector <8 x float*> [[TMP14]], <8 x float*> [[TMP15]], <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 8, i32 9>
|
; AVX-NEXT: [[TMP16:%.*]] = shufflevector <8 x float*> [[TMP14]], <8 x float*> [[TMP15]], <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 8, i32 9>
|
||||||
; AVX-NEXT: [[TMP17:%.*]] = call <8 x float> @llvm.masked.gather.v8f32.v8p0f32(<8 x float*> [[TMP16]], i32 4, <8 x i1> <i1 true, i1 true, i1 true, i1 true, i1 true, i1 true, i1 true, i1 true>, <8 x float> undef), !tbaa [[TBAA0]]
|
; AVX-NEXT: [[TMP17:%.*]] = call <8 x float> @llvm.masked.gather.v8f32.v8p0f32(<8 x float*> [[TMP16]], i32 4, <8 x i1> <i1 true, i1 true, i1 true, i1 true, i1 true, i1 true, i1 true, i1 true>, <8 x float> undef), !tbaa [[TBAA0]]
|
||||||
; AVX-NEXT: [[TMP18:%.*]] = shufflevector <8 x float*> [[TMP9]], <8 x float*> undef, <8 x i32> zeroinitializer
|
; AVX-NEXT: [[TMP18:%.*]] = shufflevector <8 x float*> [[TMP9]], <8 x float*> poison, <8 x i32> zeroinitializer
|
||||||
; AVX-NEXT: [[TMP19:%.*]] = getelementptr float, <8 x float*> [[TMP18]], <8 x i64> <i64 4, i64 13, i64 11, i64 44, i64 33, i64 30, i64 27, i64 23>
|
; AVX-NEXT: [[TMP19:%.*]] = getelementptr float, <8 x float*> [[TMP18]], <8 x i64> <i64 4, i64 13, i64 11, i64 44, i64 33, i64 30, i64 27, i64 23>
|
||||||
; AVX-NEXT: [[TMP20:%.*]] = call <8 x float> @llvm.masked.gather.v8f32.v8p0f32(<8 x float*> [[TMP19]], i32 4, <8 x i1> <i1 true, i1 true, i1 true, i1 true, i1 true, i1 true, i1 true, i1 true>, <8 x float> undef), !tbaa [[TBAA0]]
|
; AVX-NEXT: [[TMP20:%.*]] = call <8 x float> @llvm.masked.gather.v8f32.v8p0f32(<8 x float*> [[TMP19]], i32 4, <8 x i1> <i1 true, i1 true, i1 true, i1 true, i1 true, i1 true, i1 true, i1 true>, <8 x float> undef), !tbaa [[TBAA0]]
|
||||||
; AVX-NEXT: [[TMP21:%.*]] = fdiv <8 x float> [[TMP17]], [[TMP20]]
|
; AVX-NEXT: [[TMP21:%.*]] = fdiv <8 x float> [[TMP17]], [[TMP20]]
|
||||||
|
|
@ -553,10 +553,10 @@ define void @gather_load_div(float* noalias nocapture %0, float* noalias nocaptu
|
||||||
; AVX2-LABEL: @gather_load_div(
|
; AVX2-LABEL: @gather_load_div(
|
||||||
; AVX2-NEXT: [[TMP3:%.*]] = getelementptr inbounds float, float* [[TMP1:%.*]], i64 10
|
; AVX2-NEXT: [[TMP3:%.*]] = getelementptr inbounds float, float* [[TMP1:%.*]], i64 10
|
||||||
; AVX2-NEXT: [[TMP4:%.*]] = insertelement <2 x float*> poison, float* [[TMP1]], i32 0
|
; AVX2-NEXT: [[TMP4:%.*]] = insertelement <2 x float*> poison, float* [[TMP1]], i32 0
|
||||||
; AVX2-NEXT: [[TMP5:%.*]] = shufflevector <2 x float*> [[TMP4]], <2 x float*> undef, <2 x i32> zeroinitializer
|
; AVX2-NEXT: [[TMP5:%.*]] = shufflevector <2 x float*> [[TMP4]], <2 x float*> poison, <2 x i32> zeroinitializer
|
||||||
; AVX2-NEXT: [[TMP6:%.*]] = getelementptr float, <2 x float*> [[TMP5]], <2 x i64> <i64 3, i64 14>
|
; AVX2-NEXT: [[TMP6:%.*]] = getelementptr float, <2 x float*> [[TMP5]], <2 x i64> <i64 3, i64 14>
|
||||||
; AVX2-NEXT: [[TMP7:%.*]] = insertelement <4 x float*> poison, float* [[TMP1]], i32 0
|
; AVX2-NEXT: [[TMP7:%.*]] = insertelement <4 x float*> poison, float* [[TMP1]], i32 0
|
||||||
; AVX2-NEXT: [[TMP8:%.*]] = shufflevector <4 x float*> [[TMP7]], <4 x float*> undef, <4 x i32> zeroinitializer
|
; AVX2-NEXT: [[TMP8:%.*]] = shufflevector <4 x float*> [[TMP7]], <4 x float*> poison, <4 x i32> zeroinitializer
|
||||||
; AVX2-NEXT: [[TMP9:%.*]] = getelementptr float, <4 x float*> [[TMP8]], <4 x i64> <i64 17, i64 8, i64 5, i64 20>
|
; AVX2-NEXT: [[TMP9:%.*]] = getelementptr float, <4 x float*> [[TMP8]], <4 x i64> <i64 17, i64 8, i64 5, i64 20>
|
||||||
; AVX2-NEXT: [[TMP10:%.*]] = insertelement <8 x float*> poison, float* [[TMP1]], i32 0
|
; AVX2-NEXT: [[TMP10:%.*]] = insertelement <8 x float*> poison, float* [[TMP1]], i32 0
|
||||||
; AVX2-NEXT: [[TMP11:%.*]] = insertelement <8 x float*> [[TMP10]], float* [[TMP3]], i32 1
|
; AVX2-NEXT: [[TMP11:%.*]] = insertelement <8 x float*> [[TMP10]], float* [[TMP3]], i32 1
|
||||||
|
|
@ -565,7 +565,7 @@ define void @gather_load_div(float* noalias nocapture %0, float* noalias nocaptu
|
||||||
; AVX2-NEXT: [[TMP14:%.*]] = shufflevector <4 x float*> [[TMP9]], <4 x float*> undef, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 undef, i32 undef, i32 undef, i32 undef>
|
; AVX2-NEXT: [[TMP14:%.*]] = shufflevector <4 x float*> [[TMP9]], <4 x float*> undef, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 undef, i32 undef, i32 undef, i32 undef>
|
||||||
; AVX2-NEXT: [[TMP15:%.*]] = shufflevector <8 x float*> [[TMP13]], <8 x float*> [[TMP14]], <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 8, i32 9, i32 10, i32 11>
|
; AVX2-NEXT: [[TMP15:%.*]] = shufflevector <8 x float*> [[TMP13]], <8 x float*> [[TMP14]], <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 8, i32 9, i32 10, i32 11>
|
||||||
; AVX2-NEXT: [[TMP16:%.*]] = call <8 x float> @llvm.masked.gather.v8f32.v8p0f32(<8 x float*> [[TMP15]], i32 4, <8 x i1> <i1 true, i1 true, i1 true, i1 true, i1 true, i1 true, i1 true, i1 true>, <8 x float> undef), !tbaa [[TBAA0]]
|
; AVX2-NEXT: [[TMP16:%.*]] = call <8 x float> @llvm.masked.gather.v8f32.v8p0f32(<8 x float*> [[TMP15]], i32 4, <8 x i1> <i1 true, i1 true, i1 true, i1 true, i1 true, i1 true, i1 true, i1 true>, <8 x float> undef), !tbaa [[TBAA0]]
|
||||||
; AVX2-NEXT: [[TMP17:%.*]] = shufflevector <8 x float*> [[TMP10]], <8 x float*> undef, <8 x i32> zeroinitializer
|
; AVX2-NEXT: [[TMP17:%.*]] = shufflevector <8 x float*> [[TMP10]], <8 x float*> poison, <8 x i32> zeroinitializer
|
||||||
; AVX2-NEXT: [[TMP18:%.*]] = getelementptr float, <8 x float*> [[TMP17]], <8 x i64> <i64 4, i64 13, i64 11, i64 44, i64 33, i64 30, i64 27, i64 23>
|
; AVX2-NEXT: [[TMP18:%.*]] = getelementptr float, <8 x float*> [[TMP17]], <8 x i64> <i64 4, i64 13, i64 11, i64 44, i64 33, i64 30, i64 27, i64 23>
|
||||||
; AVX2-NEXT: [[TMP19:%.*]] = call <8 x float> @llvm.masked.gather.v8f32.v8p0f32(<8 x float*> [[TMP18]], i32 4, <8 x i1> <i1 true, i1 true, i1 true, i1 true, i1 true, i1 true, i1 true, i1 true>, <8 x float> undef), !tbaa [[TBAA0]]
|
; AVX2-NEXT: [[TMP19:%.*]] = call <8 x float> @llvm.masked.gather.v8f32.v8p0f32(<8 x float*> [[TMP18]], i32 4, <8 x i1> <i1 true, i1 true, i1 true, i1 true, i1 true, i1 true, i1 true, i1 true>, <8 x float> undef), !tbaa [[TBAA0]]
|
||||||
; AVX2-NEXT: [[TMP20:%.*]] = fdiv <8 x float> [[TMP16]], [[TMP19]]
|
; AVX2-NEXT: [[TMP20:%.*]] = fdiv <8 x float> [[TMP16]], [[TMP19]]
|
||||||
|
|
@ -576,10 +576,10 @@ define void @gather_load_div(float* noalias nocapture %0, float* noalias nocaptu
|
||||||
; AVX512-LABEL: @gather_load_div(
|
; AVX512-LABEL: @gather_load_div(
|
||||||
; AVX512-NEXT: [[TMP3:%.*]] = getelementptr inbounds float, float* [[TMP1:%.*]], i64 10
|
; AVX512-NEXT: [[TMP3:%.*]] = getelementptr inbounds float, float* [[TMP1:%.*]], i64 10
|
||||||
; AVX512-NEXT: [[TMP4:%.*]] = insertelement <2 x float*> poison, float* [[TMP1]], i32 0
|
; AVX512-NEXT: [[TMP4:%.*]] = insertelement <2 x float*> poison, float* [[TMP1]], i32 0
|
||||||
; AVX512-NEXT: [[TMP5:%.*]] = shufflevector <2 x float*> [[TMP4]], <2 x float*> undef, <2 x i32> zeroinitializer
|
; AVX512-NEXT: [[TMP5:%.*]] = shufflevector <2 x float*> [[TMP4]], <2 x float*> poison, <2 x i32> zeroinitializer
|
||||||
; AVX512-NEXT: [[TMP6:%.*]] = getelementptr float, <2 x float*> [[TMP5]], <2 x i64> <i64 3, i64 14>
|
; AVX512-NEXT: [[TMP6:%.*]] = getelementptr float, <2 x float*> [[TMP5]], <2 x i64> <i64 3, i64 14>
|
||||||
; AVX512-NEXT: [[TMP7:%.*]] = insertelement <4 x float*> poison, float* [[TMP1]], i32 0
|
; AVX512-NEXT: [[TMP7:%.*]] = insertelement <4 x float*> poison, float* [[TMP1]], i32 0
|
||||||
; AVX512-NEXT: [[TMP8:%.*]] = shufflevector <4 x float*> [[TMP7]], <4 x float*> undef, <4 x i32> zeroinitializer
|
; AVX512-NEXT: [[TMP8:%.*]] = shufflevector <4 x float*> [[TMP7]], <4 x float*> poison, <4 x i32> zeroinitializer
|
||||||
; AVX512-NEXT: [[TMP9:%.*]] = getelementptr float, <4 x float*> [[TMP8]], <4 x i64> <i64 17, i64 8, i64 5, i64 20>
|
; AVX512-NEXT: [[TMP9:%.*]] = getelementptr float, <4 x float*> [[TMP8]], <4 x i64> <i64 17, i64 8, i64 5, i64 20>
|
||||||
; AVX512-NEXT: [[TMP10:%.*]] = insertelement <8 x float*> poison, float* [[TMP1]], i32 0
|
; AVX512-NEXT: [[TMP10:%.*]] = insertelement <8 x float*> poison, float* [[TMP1]], i32 0
|
||||||
; AVX512-NEXT: [[TMP11:%.*]] = insertelement <8 x float*> [[TMP10]], float* [[TMP3]], i32 1
|
; AVX512-NEXT: [[TMP11:%.*]] = insertelement <8 x float*> [[TMP10]], float* [[TMP3]], i32 1
|
||||||
|
|
@ -588,7 +588,7 @@ define void @gather_load_div(float* noalias nocapture %0, float* noalias nocaptu
|
||||||
; AVX512-NEXT: [[TMP14:%.*]] = shufflevector <4 x float*> [[TMP9]], <4 x float*> undef, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 undef, i32 undef, i32 undef, i32 undef>
|
; AVX512-NEXT: [[TMP14:%.*]] = shufflevector <4 x float*> [[TMP9]], <4 x float*> undef, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 undef, i32 undef, i32 undef, i32 undef>
|
||||||
; AVX512-NEXT: [[TMP15:%.*]] = shufflevector <8 x float*> [[TMP13]], <8 x float*> [[TMP14]], <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 8, i32 9, i32 10, i32 11>
|
; AVX512-NEXT: [[TMP15:%.*]] = shufflevector <8 x float*> [[TMP13]], <8 x float*> [[TMP14]], <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 8, i32 9, i32 10, i32 11>
|
||||||
; AVX512-NEXT: [[TMP16:%.*]] = call <8 x float> @llvm.masked.gather.v8f32.v8p0f32(<8 x float*> [[TMP15]], i32 4, <8 x i1> <i1 true, i1 true, i1 true, i1 true, i1 true, i1 true, i1 true, i1 true>, <8 x float> undef), !tbaa [[TBAA0]]
|
; AVX512-NEXT: [[TMP16:%.*]] = call <8 x float> @llvm.masked.gather.v8f32.v8p0f32(<8 x float*> [[TMP15]], i32 4, <8 x i1> <i1 true, i1 true, i1 true, i1 true, i1 true, i1 true, i1 true, i1 true>, <8 x float> undef), !tbaa [[TBAA0]]
|
||||||
; AVX512-NEXT: [[TMP17:%.*]] = shufflevector <8 x float*> [[TMP10]], <8 x float*> undef, <8 x i32> zeroinitializer
|
; AVX512-NEXT: [[TMP17:%.*]] = shufflevector <8 x float*> [[TMP10]], <8 x float*> poison, <8 x i32> zeroinitializer
|
||||||
; AVX512-NEXT: [[TMP18:%.*]] = getelementptr float, <8 x float*> [[TMP17]], <8 x i64> <i64 4, i64 13, i64 11, i64 44, i64 33, i64 30, i64 27, i64 23>
|
; AVX512-NEXT: [[TMP18:%.*]] = getelementptr float, <8 x float*> [[TMP17]], <8 x i64> <i64 4, i64 13, i64 11, i64 44, i64 33, i64 30, i64 27, i64 23>
|
||||||
; AVX512-NEXT: [[TMP19:%.*]] = call <8 x float> @llvm.masked.gather.v8f32.v8p0f32(<8 x float*> [[TMP18]], i32 4, <8 x i1> <i1 true, i1 true, i1 true, i1 true, i1 true, i1 true, i1 true, i1 true>, <8 x float> undef), !tbaa [[TBAA0]]
|
; AVX512-NEXT: [[TMP19:%.*]] = call <8 x float> @llvm.masked.gather.v8f32.v8p0f32(<8 x float*> [[TMP18]], i32 4, <8 x i1> <i1 true, i1 true, i1 true, i1 true, i1 true, i1 true, i1 true, i1 true>, <8 x float> undef), !tbaa [[TBAA0]]
|
||||||
; AVX512-NEXT: [[TMP20:%.*]] = fdiv <8 x float> [[TMP16]], [[TMP19]]
|
; AVX512-NEXT: [[TMP20:%.*]] = fdiv <8 x float> [[TMP16]], [[TMP19]]
|
||||||
|
|
|
||||||
Loading…
Reference in New Issue