forked from OSchip/llvm-project
[Hexagon] Cleaning up i1 load and extension patterns.
llvm-svn: 228232
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@ -3842,6 +3842,17 @@ let AddedComplexity = 100 in {
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def: LoadGP_pats <load, L2_loadrdgp, i64>;
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def: LoadGP_pats <load, L2_loadrdgp, i64>;
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}
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}
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// When the Interprocedural Global Variable optimizer realizes that a certain
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// global variable takes only two constant values, it shrinks the global to
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// a boolean. Catch those loads here in the following 3 patterns.
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let AddedComplexity = 100 in {
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def: LoadGP_pats <extloadi1, L2_loadrubgp>;
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def: LoadGP_pats <zextloadi1, L2_loadrubgp>;
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}
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def: Pat<(i64 (ctlz I64:$src1)), (Zext64 (S2_cl0p I64:$src1))>;
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def: Pat<(i64 (cttz I64:$src1)), (Zext64 (S2_ct0p I64:$src1))>;
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let AddedComplexity = 30 in {
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let AddedComplexity = 30 in {
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def: Storea_pat<truncstorei8, I32, u0AlwaysExtPred, S2_storerbabs>;
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def: Storea_pat<truncstorei8, I32, u0AlwaysExtPred, S2_storerbabs>;
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def: Storea_pat<truncstorei16, I32, u0AlwaysExtPred, S2_storerhabs>;
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def: Storea_pat<truncstorei16, I32, u0AlwaysExtPred, S2_storerhabs>;
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@ -3890,22 +3901,6 @@ let AddedComplexity = 100 in
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def : Pat <(i1 (load (HexagonCONST32_GP tglobaladdr:$global))),
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def : Pat <(i1 (load (HexagonCONST32_GP tglobaladdr:$global))),
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(i1 (C2_tfrrp (i32 (L2_loadrbgp tglobaladdr:$global))))>;
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(i1 (C2_tfrrp (i32 (L2_loadrbgp tglobaladdr:$global))))>;
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// When the Interprocedural Global Variable optimizer realizes that a certain
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// global variable takes only two constant values, it shrinks the global to
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// a boolean. Catch those loads here in the following 3 patterns.
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let AddedComplexity = 100 in
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def : Pat <(i32 (extloadi1 (HexagonCONST32_GP tglobaladdr:$global))),
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(i32 (L2_loadrbgp tglobaladdr:$global))>;
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let AddedComplexity = 100 in
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def : Pat <(i32 (sextloadi1 (HexagonCONST32_GP tglobaladdr:$global))),
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(i32 (L2_loadrbgp tglobaladdr:$global))>;
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let AddedComplexity = 100 in
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def : Pat <(i32 (zextloadi1 (HexagonCONST32_GP tglobaladdr:$global))),
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(i32 (L2_loadrubgp tglobaladdr:$global))>;
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// Transfer global address into a register
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// Transfer global address into a register
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let isExtended = 1, opExtendable = 1, AddedComplexity=50, isMoveImm = 1,
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let isExtended = 1, opExtendable = 1, AddedComplexity=50, isMoveImm = 1,
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isAsCheapAsAMove = 1, isReMaterializable = 1, validSubTargets = HasV4SubT in
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isAsCheapAsAMove = 1, isReMaterializable = 1, validSubTargets = HasV4SubT in
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@ -3966,14 +3961,6 @@ def STriw_offset_ext_V4 : STInst<(outs),
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(add IntRegs:$src1, u6_2ImmPred:$src2))]>,
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(add IntRegs:$src1, u6_2ImmPred:$src2))]>,
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Requires<[HasV4T]>;
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Requires<[HasV4T]>;
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def : Pat<(i64 (ctlz (i64 DoubleRegs:$src1))),
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(i64 (A4_combineir (i32 0), (i32 (S2_cl0p DoubleRegs:$src1))))>,
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Requires<[HasV4T]>;
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def : Pat<(i64 (cttz (i64 DoubleRegs:$src1))),
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(i64 (A4_combineir (i32 0), (i32 (S2_ct0p DoubleRegs:$src1))))>,
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Requires<[HasV4T]>;
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// i8/i16/i32 -> i64 loads
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// i8/i16/i32 -> i64 loads
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// We need a complexity of 120 here to override preceding handling of
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// We need a complexity of 120 here to override preceding handling of
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// zextload.
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// zextload.
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