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Revert "[AArch64][AsmParser] Remove 'x31' alias for 'sp/xzr' register." 

This reverts commit 8b281bfaf3.
This commit is contained in:
Caroline Concatto 2020-11-02 08:15:50 +00:00
parent 8b281bfaf3
commit 71038788ce
5 changed files with 13 additions and 28 deletions
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9
llvm/docs/ReleaseNotes.rst
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@ -90,15 +90,6 @@ Changes to the ARM Backend
During this release ...
Changes to the AArch64 Backend
------------------------------
During this release ...
* The assembler no longer accepts ``w31`` and ``x31`` as aliases for ``wzr``
and ``xzr``, because the architecture manual explicitly states that no
registers with those names exist.
Changes to the MIPS Target
--------------------------

2
llvm/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp
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@ -2322,6 +2322,8 @@ unsigned AArch64AsmParser::matchRegisterNameAlias(StringRef Name,
if (auto RegNum = StringSwitch<unsigned>(Name.lower())
.Case("fp", AArch64::FP)
.Case("lr", AArch64::LR)
.Case("x31", AArch64::XZR)
.Case("w31", AArch64::WZR)
.Default(0))
return Kind == RegKind::Scalar ? RegNum : 0;

14
llvm/test/MC/AArch64/basic-a64-diagnostics.s
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@ -2443,38 +2443,30 @@
//// 32-bit addresses
ldr w0, [w20]
ldrsh x3, [wsp]
ldrb w0, [sp, x31]
// CHECK-ERROR: error: invalid operand for instruction
// CHECK-ERROR-NEXT: ldr w0, [w20]
// CHECK-ERROR-NEXT: ^
// CHECK-ERROR-NEXT: error: invalid operand for instruction
// CHECK-ERROR-NEXT: ldrsh x3, [wsp]
// CHECK-ERROR-NEXT: ^
// CHECK-ERROR-NEXT: error: index must be an integer in range [-256, 255].
// CHECK-ERROR-NEXT: ldrb w0, [sp, x31]
// CHECK-ERROR-NETX: ^
//// Store things
strb w0, [wsp]
strh w31, [x23, #1]
str x5, [x22, #12]
str w7, [x12, #16384]
strb w0, [sp, x31]
// CHECK-ERROR: error: invalid operand for instruction
// CHECK-ERROR-NEXT: strb w0, [wsp]
// CHECK-ERROR-NEXT: ^
// CHECK-ERROR: error: invalid operand for instruction
// CHECK-ERROR-NEXT: strh w31, [x23, #1]
// CHECK-ERROR-NEXT: ^
// CHECK-ERROR-AARCH64: error: invalid operand for instruction
// CHECK-ERROR-AARCH64-NEXT: strh w31, [x23, #1]
// CHECK-ERROR-AARCH64-NEXT: ^
// CHECK-ERROR-AARCH64-NEXT: error: too few operands for instruction
// CHECK-ERROR-AARCH64-NEXT: str x5, [x22, #12]
// CHECK-ERROR-AARCH64-NEXT: ^
// CHECK-ERROR-NEXT: error: {{expected|index must be an}} integer in range [-256, 255]
// CHECK-ERROR-NEXT: str w7, [x12, #16384]
// CHECK-ERROR-NEXT: ^
// CHECK-ERROR-NEXT: error: index must be an integer in range [-256, 255].
// CHECK-ERROR-NEXT: strb w0, [sp, x31]
// CHECK-ERROR-NEXT: ^
//// Bad PRFMs
prfm #-1, [sp]

8
llvm/test/tools/llvm-mca/AArch64/Exynos/load.s
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@ -8,10 +8,10 @@ ldur x0, [sp, #8]
ldrb w0, [sp], #1
ldrsh w0, [sp, #2]!
ldr x0, [sp, #8]
ldrb w0, [sp, xzr]
ldrsh w0, [sp, xzr, lsl #1]
ldr w0, [sp, wzr, sxtw]
ldr x0, [sp, wzr, uxtw #3]
ldrb w0, [sp, x31]
ldrsh w0, [sp, x31, lsl #1]
ldr w0, [sp, w31, sxtw]
ldr x0, [sp, w31, uxtw #3]
ldnp w0, w1, [sp, #8]
ldp x0, x1, [sp], #16
ldpsw x0, x1, [sp, #8]!

8
llvm/test/tools/llvm-mca/AArch64/Exynos/store.s
View File

@ -7,10 +7,10 @@ stur x0, [sp, #8]
strb w0, [sp], #1
strh w0, [sp, #2]!
str x0, [sp, #8]
strb w0, [sp, xzr]
strh w0, [sp, xzr, lsl #1]
str w0, [sp, wzr, sxtw]
str x0, [sp, wzr, uxtw #3]
strb w0, [sp, x31]
strh w0, [sp, x31, lsl #1]
str w0, [sp, w31, sxtw]
str x0, [sp, w31, uxtw #3]
stnp w0, w1, [sp, #8]
stp x0, x1, [sp], #16
stp w0, w1, [sp, #8]!