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[SCEV] Add a mode to skip classification when printing analysis 

For the various trip-count tests, the classification isn't useful and makes the auto-generated tests super verbose.  By skipping it, we make the auto-gen tests closer to the manually written ones.  Up next: auto-genning a bunch of the existings tests.
This commit is contained in:
Philip Reames 2019-11-21 10:22:49 -08:00
parent 46240c3872
commit 70d173fb1f
2 changed files with 66 additions and 170 deletions
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122
llvm/lib/Analysis/ScalarEvolution.cpp
View File

@ -221,6 +221,12 @@ static cl::opt<unsigned>
cl::desc("Size of the expression which is considered huge"),
cl::init(4096));
static cl::opt<bool>
ClassifyExpressions("scalar-evolution-classify-expressions",
cl::Hidden, cl::init(true),
cl::desc("When printing analysis, include information on every instruction"));
//===----------------------------------------------------------------------===//
// SCEV class definitions
//===----------------------------------------------------------------------===//
@ -11583,77 +11589,79 @@ void ScalarEvolution::print(raw_ostream &OS) const {
// const isn't dangerous.
ScalarEvolution &SE = *const_cast<ScalarEvolution *>(this);
OS << "Classifying expressions for: ";
F.printAsOperand(OS, /*PrintType=*/false);
OS << "\n";
for (Instruction &I : instructions(F))
if (isSCEVable(I.getType()) && !isa<CmpInst>(I)) {
OS << I << '\n';
OS << " --> ";
const SCEV *SV = SE.getSCEV(&I);
SV->print(OS);
if (!isa<SCEVCouldNotCompute>(SV)) {
OS << " U: ";
SE.getUnsignedRange(SV).print(OS);
OS << " S: ";
SE.getSignedRange(SV).print(OS);
}
const Loop *L = LI.getLoopFor(I.getParent());
const SCEV *AtUse = SE.getSCEVAtScope(SV, L);
if (AtUse != SV) {
if (ClassifyExpressions) {
OS << "Classifying expressions for: ";
F.printAsOperand(OS, /*PrintType=*/false);
OS << "\n";
for (Instruction &I : instructions(F))
if (isSCEVable(I.getType()) && !isa<CmpInst>(I)) {
OS << I << '\n';
OS << " --> ";
AtUse->print(OS);
if (!isa<SCEVCouldNotCompute>(AtUse)) {
const SCEV *SV = SE.getSCEV(&I);
SV->print(OS);
if (!isa<SCEVCouldNotCompute>(SV)) {
OS << " U: ";
SE.getUnsignedRange(AtUse).print(OS);
SE.getUnsignedRange(SV).print(OS);
OS << " S: ";
SE.getSignedRange(AtUse).print(OS);
}
}
if (L) {
OS << "\t\t" "Exits: ";
const SCEV *ExitValue = SE.getSCEVAtScope(SV, L->getParentLoop());
if (!SE.isLoopInvariant(ExitValue, L)) {
OS << "<<Unknown>>";
} else {
OS << *ExitValue;
SE.getSignedRange(SV).print(OS);
}
bool First = true;
for (auto *Iter = L; Iter; Iter = Iter->getParentLoop()) {
if (First) {
OS << "\t\t" "LoopDispositions: { ";
First = false;
const Loop *L = LI.getLoopFor(I.getParent());
const SCEV *AtUse = SE.getSCEVAtScope(SV, L);
if (AtUse != SV) {
OS << " --> ";
AtUse->print(OS);
if (!isa<SCEVCouldNotCompute>(AtUse)) {
OS << " U: ";
SE.getUnsignedRange(AtUse).print(OS);
OS << " S: ";
SE.getSignedRange(AtUse).print(OS);
}
}
if (L) {
OS << "\t\t" "Exits: ";
const SCEV *ExitValue = SE.getSCEVAtScope(SV, L->getParentLoop());
if (!SE.isLoopInvariant(ExitValue, L)) {
OS << "<<Unknown>>";
} else {
OS << ", ";
OS << *ExitValue;
}
Iter->getHeader()->printAsOperand(OS, /*PrintType=*/false);
OS << ": " << loopDispositionToStr(SE.getLoopDisposition(SV, Iter));
}
bool First = true;
for (auto *Iter = L; Iter; Iter = Iter->getParentLoop()) {
if (First) {
OS << "\t\t" "LoopDispositions: { ";
First = false;
} else {
OS << ", ";
}
for (auto *InnerL : depth_first(L)) {
if (InnerL == L)
continue;
if (First) {
OS << "\t\t" "LoopDispositions: { ";
First = false;
} else {
OS << ", ";
Iter->getHeader()->printAsOperand(OS, /*PrintType=*/false);
OS << ": " << loopDispositionToStr(SE.getLoopDisposition(SV, Iter));
}
InnerL->getHeader()->printAsOperand(OS, /*PrintType=*/false);
OS << ": " << loopDispositionToStr(SE.getLoopDisposition(SV, InnerL));
for (auto *InnerL : depth_first(L)) {
if (InnerL == L)
continue;
if (First) {
OS << "\t\t" "LoopDispositions: { ";
First = false;
} else {
OS << ", ";
}
InnerL->getHeader()->printAsOperand(OS, /*PrintType=*/false);
OS << ": " << loopDispositionToStr(SE.getLoopDisposition(SV, InnerL));
}
OS << " }";
}
OS << " }";
OS << "\n";
}
OS << "\n";
}
}
OS << "Determining loop execution counts for: ";
F.printAsOperand(OS, /*PrintType=*/false);

114
llvm/test/Analysis/ScalarEvolution/trip-count-andor.ll
View File

@ -1,18 +1,11 @@
; NOTE: Assertions have been autogenerated by utils/update_analyze_test_checks.py
; RUN: opt < %s -analyze -scalar-evolution 2>&1 | FileCheck %s
; RUN: opt < %s -analyze -scalar-evolution -scalar-evolution-classify-expressions=0 2>&1 | FileCheck %s
target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
define void @unsimplified_and1(i32 %n) {
; CHECK-LABEL: 'unsimplified_and1'
; CHECK-NEXT: Classifying expressions for: @unsimplified_and1
; CHECK-NEXT: %iv = phi i32 [ 0, %entry ], [ %iv.inc, %loop ]
; CHECK-NEXT: --> {0,+,1}<nuw><nsw><%loop> U: [0,-2147483648) S: [0,-2147483648) Exits: %n LoopDispositions: { %loop: Computable }
; CHECK-NEXT: %iv.inc = add nsw i32 %iv, 1
; CHECK-NEXT: --> {1,+,1}<nuw><%loop> U: [1,0) S: [1,0) Exits: (1 + %n) LoopDispositions: { %loop: Computable }
; CHECK-NEXT: %and = and i1 %becond, true
; CHECK-NEXT: --> %becond U: full-set S: full-set Exits: <<Unknown>> LoopDispositions: { %loop: Variant }
; CHECK-NEXT: Determining loop execution counts for: @unsimplified_and1
; CHECK-NEXT: Loop %loop: backedge-taken count is %n
; CHECK-NEXT: Loop %loop: max backedge-taken count is -1
@ -36,13 +29,6 @@ leave:
define void @unsimplified_and2(i32 %n) {
; CHECK-LABEL: 'unsimplified_and2'
; CHECK-NEXT: Classifying expressions for: @unsimplified_and2
; CHECK-NEXT: %iv = phi i32 [ 0, %entry ], [ %iv.inc, %loop ]
; CHECK-NEXT: --> {0,+,1}<nuw><nsw><%loop> U: [0,-2147483648) S: [0,-2147483648) Exits: %n LoopDispositions: { %loop: Computable }
; CHECK-NEXT: %iv.inc = add nsw i32 %iv, 1
; CHECK-NEXT: --> {1,+,1}<nuw><%loop> U: [1,0) S: [1,0) Exits: (1 + %n) LoopDispositions: { %loop: Computable }
; CHECK-NEXT: %and = and i1 true, %becond
; CHECK-NEXT: --> %and U: full-set S: full-set Exits: <<Unknown>> LoopDispositions: { %loop: Variant }
; CHECK-NEXT: Determining loop execution counts for: @unsimplified_and2
; CHECK-NEXT: Loop %loop: backedge-taken count is %n
; CHECK-NEXT: Loop %loop: max backedge-taken count is -1
@ -66,13 +52,6 @@ leave:
define void @unsimplified_and3(i32 %n) {
; CHECK-LABEL: 'unsimplified_and3'
; CHECK-NEXT: Classifying expressions for: @unsimplified_and3
; CHECK-NEXT: %iv = phi i32 [ 0, %entry ], [ %iv.inc, %loop ]
; CHECK-NEXT: --> {0,+,1}<nuw><nsw><%loop> U: [0,1) S: [0,1) Exits: 0 LoopDispositions: { %loop: Computable }
; CHECK-NEXT: %iv.inc = add nsw i32 %iv, 1
; CHECK-NEXT: --> {1,+,1}<nuw><nsw><%loop> U: [1,2) S: [1,2) Exits: 1 LoopDispositions: { %loop: Computable }
; CHECK-NEXT: %and = and i1 false, %becond
; CHECK-NEXT: --> %and U: [0,-1) S: full-set Exits: <<Unknown>> LoopDispositions: { %loop: Variant }
; CHECK-NEXT: Determining loop execution counts for: @unsimplified_and3
; CHECK-NEXT: Loop %loop: backedge-taken count is false
; CHECK-NEXT: Loop %loop: max backedge-taken count is false
@ -96,13 +75,6 @@ leave:
define void @unsimplified_and4(i32 %n) {
; CHECK-LABEL: 'unsimplified_and4'
; CHECK-NEXT: Classifying expressions for: @unsimplified_and4
; CHECK-NEXT: %iv = phi i32 [ 0, %entry ], [ %iv.inc, %loop ]
; CHECK-NEXT: --> {0,+,1}<nuw><nsw><%loop> U: [0,1) S: [0,1) Exits: 0 LoopDispositions: { %loop: Computable }
; CHECK-NEXT: %iv.inc = add nsw i32 %iv, 1
; CHECK-NEXT: --> {1,+,1}<nuw><nsw><%loop> U: [1,2) S: [1,2) Exits: 1 LoopDispositions: { %loop: Computable }
; CHECK-NEXT: %and = and i1 %becond, false
; CHECK-NEXT: --> false U: [0,-1) S: [0,-1) Exits: false LoopDispositions: { %loop: Invariant }
; CHECK-NEXT: Determining loop execution counts for: @unsimplified_and4
; CHECK-NEXT: Loop %loop: backedge-taken count is false
; CHECK-NEXT: Loop %loop: max backedge-taken count is false
@ -126,13 +98,6 @@ leave:
define void @unsimplified_or1(i32 %n) {
; CHECK-LABEL: 'unsimplified_or1'
; CHECK-NEXT: Classifying expressions for: @unsimplified_or1
; CHECK-NEXT: %iv = phi i32 [ 0, %entry ], [ %iv.inc, %loop ]
; CHECK-NEXT: --> {0,+,1}<nuw><nsw><%loop> U: [0,-2147483648) S: [0,-2147483648) Exits: <<Unknown>> LoopDispositions: { %loop: Computable }
; CHECK-NEXT: %iv.inc = add nsw i32 %iv, 1
; CHECK-NEXT: --> {1,+,1}<nuw><%loop> U: [1,0) S: [1,0) Exits: <<Unknown>> LoopDispositions: { %loop: Computable }
; CHECK-NEXT: %or = or i1 %becond, true
; CHECK-NEXT: --> %or U: [-1,0) S: full-set Exits: <<Unknown>> LoopDispositions: { %loop: Variant }
; CHECK-NEXT: Determining loop execution counts for: @unsimplified_or1
; CHECK-NEXT: Loop %loop: Unpredictable backedge-taken count.
; CHECK-NEXT: Loop %loop: Unpredictable max backedge-taken count.
@ -154,13 +119,6 @@ leave:
define void @unsimplified_or2(i32 %n) {
; CHECK-LABEL: 'unsimplified_or2'
; CHECK-NEXT: Classifying expressions for: @unsimplified_or2
; CHECK-NEXT: %iv = phi i32 [ 0, %entry ], [ %iv.inc, %loop ]
; CHECK-NEXT: --> {0,+,1}<nuw><nsw><%loop> U: [0,-2147483648) S: [0,-2147483648) Exits: <<Unknown>> LoopDispositions: { %loop: Computable }
; CHECK-NEXT: %iv.inc = add nsw i32 %iv, 1
; CHECK-NEXT: --> {1,+,1}<nuw><%loop> U: [1,0) S: [1,0) Exits: <<Unknown>> LoopDispositions: { %loop: Computable }
; CHECK-NEXT: %or = or i1 true, %becond
; CHECK-NEXT: --> %or U: [-1,0) S: full-set Exits: <<Unknown>> LoopDispositions: { %loop: Variant }
; CHECK-NEXT: Determining loop execution counts for: @unsimplified_or2
; CHECK-NEXT: Loop %loop: Unpredictable backedge-taken count.
; CHECK-NEXT: Loop %loop: Unpredictable max backedge-taken count.
@ -182,13 +140,6 @@ leave:
define void @unsimplified_or3(i32 %n) {
; CHECK-LABEL: 'unsimplified_or3'
; CHECK-NEXT: Classifying expressions for: @unsimplified_or3
; CHECK-NEXT: %iv = phi i32 [ 0, %entry ], [ %iv.inc, %loop ]
; CHECK-NEXT: --> {0,+,1}<nuw><nsw><%loop> U: [0,-2147483648) S: [0,-2147483648) Exits: %n LoopDispositions: { %loop: Computable }
; CHECK-NEXT: %iv.inc = add nsw i32 %iv, 1
; CHECK-NEXT: --> {1,+,1}<nuw><%loop> U: [1,0) S: [1,0) Exits: (1 + %n) LoopDispositions: { %loop: Computable }
; CHECK-NEXT: %or = or i1 false, %becond
; CHECK-NEXT: --> %or U: full-set S: full-set Exits: <<Unknown>> LoopDispositions: { %loop: Variant }
; CHECK-NEXT: Determining loop execution counts for: @unsimplified_or3
; CHECK-NEXT: Loop %loop: backedge-taken count is %n
; CHECK-NEXT: Loop %loop: max backedge-taken count is -1
@ -212,13 +163,6 @@ leave:
define void @unsimplified_or4(i32 %n) {
; CHECK-LABEL: 'unsimplified_or4'
; CHECK-NEXT: Classifying expressions for: @unsimplified_or4
; CHECK-NEXT: %iv = phi i32 [ 0, %entry ], [ %iv.inc, %loop ]
; CHECK-NEXT: --> {0,+,1}<nuw><nsw><%loop> U: [0,-2147483648) S: [0,-2147483648) Exits: %n LoopDispositions: { %loop: Computable }
; CHECK-NEXT: %iv.inc = add nsw i32 %iv, 1
; CHECK-NEXT: --> {1,+,1}<nuw><%loop> U: [1,0) S: [1,0) Exits: (1 + %n) LoopDispositions: { %loop: Computable }
; CHECK-NEXT: %or = or i1 %becond, false
; CHECK-NEXT: --> %becond U: full-set S: full-set Exits: <<Unknown>> LoopDispositions: { %loop: Variant }
; CHECK-NEXT: Determining loop execution counts for: @unsimplified_or4
; CHECK-NEXT: Loop %loop: backedge-taken count is %n
; CHECK-NEXT: Loop %loop: max backedge-taken count is -1
@ -242,13 +186,6 @@ leave:
define void @reversed_and1(i32 %n) {
; CHECK-LABEL: 'reversed_and1'
; CHECK-NEXT: Classifying expressions for: @reversed_and1
; CHECK-NEXT: %iv = phi i32 [ 0, %entry ], [ %iv.inc, %loop ]
; CHECK-NEXT: --> {0,+,1}<nuw><nsw><%loop> U: [0,-2147483648) S: [0,-2147483648) Exits: %n LoopDispositions: { %loop: Computable }
; CHECK-NEXT: %iv.inc = add nsw i32 %iv, 1
; CHECK-NEXT: --> {1,+,1}<nuw><%loop> U: [1,0) S: [1,0) Exits: (1 + %n) LoopDispositions: { %loop: Computable }
; CHECK-NEXT: %and = and i1 %becond, true
; CHECK-NEXT: --> %becond U: full-set S: full-set Exits: <<Unknown>> LoopDispositions: { %loop: Variant }
; CHECK-NEXT: Determining loop execution counts for: @reversed_and1
; CHECK-NEXT: Loop %loop: backedge-taken count is %n
; CHECK-NEXT: Loop %loop: max backedge-taken count is -1
@ -272,13 +209,6 @@ leave:
define void @reversed_and2(i32 %n) {
; CHECK-LABEL: 'reversed_and2'
; CHECK-NEXT: Classifying expressions for: @reversed_and2
; CHECK-NEXT: %iv = phi i32 [ 0, %entry ], [ %iv.inc, %loop ]
; CHECK-NEXT: --> {0,+,1}<nuw><nsw><%loop> U: [0,-2147483648) S: [0,-2147483648) Exits: %n LoopDispositions: { %loop: Computable }
; CHECK-NEXT: %iv.inc = add nsw i32 %iv, 1
; CHECK-NEXT: --> {1,+,1}<nuw><%loop> U: [1,0) S: [1,0) Exits: (1 + %n) LoopDispositions: { %loop: Computable }
; CHECK-NEXT: %and = and i1 true, %becond
; CHECK-NEXT: --> %and U: full-set S: full-set Exits: <<Unknown>> LoopDispositions: { %loop: Variant }
; CHECK-NEXT: Determining loop execution counts for: @reversed_and2
; CHECK-NEXT: Loop %loop: backedge-taken count is %n
; CHECK-NEXT: Loop %loop: max backedge-taken count is -1
@ -302,13 +232,6 @@ leave:
define void @reversed_and3(i32 %n) {
; CHECK-LABEL: 'reversed_and3'
; CHECK-NEXT: Classifying expressions for: @reversed_and3
; CHECK-NEXT: %iv = phi i32 [ 0, %entry ], [ %iv.inc, %loop ]
; CHECK-NEXT: --> {0,+,1}<nuw><nsw><%loop> U: [0,-2147483648) S: [0,-2147483648) Exits: <<Unknown>> LoopDispositions: { %loop: Computable }
; CHECK-NEXT: %iv.inc = add nsw i32 %iv, 1
; CHECK-NEXT: --> {1,+,1}<nuw><%loop> U: [1,0) S: [1,0) Exits: <<Unknown>> LoopDispositions: { %loop: Computable }
; CHECK-NEXT: %and = and i1 false, %becond
; CHECK-NEXT: --> %and U: [0,-1) S: full-set Exits: <<Unknown>> LoopDispositions: { %loop: Variant }
; CHECK-NEXT: Determining loop execution counts for: @reversed_and3
; CHECK-NEXT: Loop %loop: Unpredictable backedge-taken count.
; CHECK-NEXT: Loop %loop: Unpredictable max backedge-taken count.
@ -330,13 +253,6 @@ leave:
define void @reversed_and4(i32 %n) {
; CHECK-LABEL: 'reversed_and4'
; CHECK-NEXT: Classifying expressions for: @reversed_and4
; CHECK-NEXT: %iv = phi i32 [ 0, %entry ], [ %iv.inc, %loop ]
; CHECK-NEXT: --> {0,+,1}<nuw><nsw><%loop> U: [0,-2147483648) S: [0,-2147483648) Exits: <<Unknown>> LoopDispositions: { %loop: Computable }
; CHECK-NEXT: %iv.inc = add nsw i32 %iv, 1
; CHECK-NEXT: --> {1,+,1}<nuw><%loop> U: [1,0) S: [1,0) Exits: <<Unknown>> LoopDispositions: { %loop: Computable }
; CHECK-NEXT: %and = and i1 %becond, false
; CHECK-NEXT: --> false U: [0,-1) S: [0,-1) Exits: false LoopDispositions: { %loop: Invariant }
; CHECK-NEXT: Determining loop execution counts for: @reversed_and4
; CHECK-NEXT: Loop %loop: Unpredictable backedge-taken count.
; CHECK-NEXT: Loop %loop: Unpredictable max backedge-taken count.
@ -358,13 +274,6 @@ leave:
define void @reversed_or1(i32 %n) {
; CHECK-LABEL: 'reversed_or1'
; CHECK-NEXT: Classifying expressions for: @reversed_or1
; CHECK-NEXT: %iv = phi i32 [ 0, %entry ], [ %iv.inc, %loop ]
; CHECK-NEXT: --> {0,+,1}<nuw><nsw><%loop> U: [0,1) S: [0,1) Exits: 0 LoopDispositions: { %loop: Computable }
; CHECK-NEXT: %iv.inc = add nsw i32 %iv, 1
; CHECK-NEXT: --> {1,+,1}<nuw><nsw><%loop> U: [1,2) S: [1,2) Exits: 1 LoopDispositions: { %loop: Computable }
; CHECK-NEXT: %or = or i1 %becond, true
; CHECK-NEXT: --> %or U: [-1,0) S: full-set Exits: <<Unknown>> LoopDispositions: { %loop: Variant }
; CHECK-NEXT: Determining loop execution counts for: @reversed_or1
; CHECK-NEXT: Loop %loop: backedge-taken count is false
; CHECK-NEXT: Loop %loop: max backedge-taken count is false
@ -388,13 +297,6 @@ leave:
define void @reversed_or2(i32 %n) {
; CHECK-LABEL: 'reversed_or2'
; CHECK-NEXT: Classifying expressions for: @reversed_or2
; CHECK-NEXT: %iv = phi i32 [ 0, %entry ], [ %iv.inc, %loop ]
; CHECK-NEXT: --> {0,+,1}<nuw><nsw><%loop> U: [0,1) S: [0,1) Exits: 0 LoopDispositions: { %loop: Computable }
; CHECK-NEXT: %iv.inc = add nsw i32 %iv, 1
; CHECK-NEXT: --> {1,+,1}<nuw><nsw><%loop> U: [1,2) S: [1,2) Exits: 1 LoopDispositions: { %loop: Computable }
; CHECK-NEXT: %or = or i1 true, %becond
; CHECK-NEXT: --> %or U: [-1,0) S: full-set Exits: <<Unknown>> LoopDispositions: { %loop: Variant }
; CHECK-NEXT: Determining loop execution counts for: @reversed_or2
; CHECK-NEXT: Loop %loop: backedge-taken count is false
; CHECK-NEXT: Loop %loop: max backedge-taken count is false
@ -418,13 +320,6 @@ leave:
define void @reversed_or3(i32 %n) {
; CHECK-LABEL: 'reversed_or3'
; CHECK-NEXT: Classifying expressions for: @reversed_or3
; CHECK-NEXT: %iv = phi i32 [ 0, %entry ], [ %iv.inc, %loop ]
; CHECK-NEXT: --> {0,+,1}<nuw><nsw><%loop> U: [0,-2147483648) S: [0,-2147483648) Exits: %n LoopDispositions: { %loop: Computable }
; CHECK-NEXT: %iv.inc = add nsw i32 %iv, 1
; CHECK-NEXT: --> {1,+,1}<nuw><%loop> U: [1,0) S: [1,0) Exits: (1 + %n) LoopDispositions: { %loop: Computable }
; CHECK-NEXT: %or = or i1 false, %becond
; CHECK-NEXT: --> %or U: full-set S: full-set Exits: <<Unknown>> LoopDispositions: { %loop: Variant }
; CHECK-NEXT: Determining loop execution counts for: @reversed_or3
; CHECK-NEXT: Loop %loop: backedge-taken count is %n
; CHECK-NEXT: Loop %loop: max backedge-taken count is -1
@ -448,13 +343,6 @@ leave:
define void @reversed_or4(i32 %n) {
; CHECK-LABEL: 'reversed_or4'
; CHECK-NEXT: Classifying expressions for: @reversed_or4
; CHECK-NEXT: %iv = phi i32 [ 0, %entry ], [ %iv.inc, %loop ]
; CHECK-NEXT: --> {0,+,1}<nuw><nsw><%loop> U: [0,-2147483648) S: [0,-2147483648) Exits: %n LoopDispositions: { %loop: Computable }
; CHECK-NEXT: %iv.inc = add nsw i32 %iv, 1
; CHECK-NEXT: --> {1,+,1}<nuw><%loop> U: [1,0) S: [1,0) Exits: (1 + %n) LoopDispositions: { %loop: Computable }
; CHECK-NEXT: %or = or i1 %becond, false
; CHECK-NEXT: --> %becond U: full-set S: full-set Exits: <<Unknown>> LoopDispositions: { %loop: Variant }
; CHECK-NEXT: Determining loop execution counts for: @reversed_or4
; CHECK-NEXT: Loop %loop: backedge-taken count is %n
; CHECK-NEXT: Loop %loop: max backedge-taken count is -1