forked from OSchip/llvm-project
parent
33f4156663
commit
70af620709
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@ -357,6 +357,9 @@ static const TableEntry OpcodeTable[] = {
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{ X86::FpIST16m , X86::FIST16m },
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{ X86::FpIST32m , X86::FIST32m },
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{ X86::FpIST64m , X86::FISTP64m },
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{ X86::FpISTT16m , X86::FISTTP16m},
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{ X86::FpISTT32m , X86::FISTTP32m},
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{ X86::FpISTT64m , X86::FISTTP64m},
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{ X86::FpISUB16m , X86::FISUB16m },
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{ X86::FpISUB32m , X86::FISUB32m },
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{ X86::FpISUBR16m, X86::FISUBR16m},
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@ -502,12 +505,17 @@ void FPS::handleOneArgFP(MachineBasicBlock::iterator &I) {
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unsigned Reg = getFPReg(MI->getOperand(MI->getNumOperands()-1));
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bool KillsSrc = LV->KillsRegister(MI, X86::FP0+Reg);
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// FISTP64r is strange because there isn't a non-popping versions.
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// FISTP64m is strange because there isn't a non-popping versions.
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// If we have one _and_ we don't want to pop the operand, duplicate the value
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// on the stack instead of moving it. This ensure that popping the value is
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// always ok.
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// Ditto FISTTP16m, FISTTP32m, FISTTP64m.
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//
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if (MI->getOpcode() == X86::FpIST64m && !KillsSrc) {
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if (!KillsSrc &&
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(MI->getOpcode() == X86::FpIST64m ||
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MI->getOpcode() == X86::FpISTT16m ||
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MI->getOpcode() == X86::FpISTT32m ||
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MI->getOpcode() == X86::FpISTT64m)) {
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duplicateToTop(Reg, 7 /*temp register*/, I);
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} else {
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moveToTop(Reg, I); // Move to the top of the stack...
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@ -517,7 +525,10 @@ void FPS::handleOneArgFP(MachineBasicBlock::iterator &I) {
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MI->RemoveOperand(MI->getNumOperands()-1); // Remove explicit ST(0) operand
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MI->setOpcode(getConcreteOpcode(MI->getOpcode()));
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if (MI->getOpcode() == X86::FISTP64m) {
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if (MI->getOpcode() == X86::FISTP64m ||
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MI->getOpcode() == X86::FISTTP16m ||
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MI->getOpcode() == X86::FISTTP32m ||
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MI->getOpcode() == X86::FISTTP64m) {
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assert(StackTop > 0 && "Stack empty??");
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--StackTop;
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} else if (KillsSrc) { // Last use of operand?
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@ -2957,6 +2957,21 @@ def FISTP16m : FPI<0xDF, MRM3m, (ops i16mem:$dst), "fistp{s} $dst">;
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def FISTP32m : FPI<0xDB, MRM3m, (ops i32mem:$dst), "fistp{l} $dst">;
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def FISTP64m : FPI<0xDF, MRM7m, (ops i64mem:$dst), "fistp{ll} $dst">;
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// FISTTP requires SSE3 even though it's a FPStack op.
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def FpISTT16m : FpI_<(ops i16mem:$op, RFP:$src), OneArgFP,
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[(X86fp_to_i16mem RFP:$src, addr:$op)]>,
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Requires<[HasSSE3]>;
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def FpISTT32m : FpI_<(ops i32mem:$op, RFP:$src), OneArgFP,
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[(X86fp_to_i32mem RFP:$src, addr:$op)]>,
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Requires<[HasSSE3]>;
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def FpISTT64m : FpI_<(ops i64mem:$op, RFP:$src), OneArgFP,
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[(X86fp_to_i64mem RFP:$src, addr:$op)]>,
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Requires<[HasSSE3]>;
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def FISTTP16m : FPI<0xDF, MRM1m, (ops i16mem:$dst), "fisttp{s} $dst">;
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def FISTTP32m : FPI<0xDB, MRM1m, (ops i32mem:$dst), "fisttp{l} $dst">;
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def FISTTP64m : FPI<0xDD, MRM1m, (ops i64mem:$dst), "fisttp{ll} $dst">;
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// FP Stack manipulation instructions.
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def FLDrr : FPI<0xC0, AddRegFrm, (ops RST:$op), "fld $op">, D9;
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def FSTrr : FPI<0xD0, AddRegFrm, (ops RST:$op), "fst $op">, DD;
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