forked from OSchip/llvm-project
ARM: Add missing flags to TBB_[JH]T pseudo instructions
NFC except for calming down the machine verifier in some cases. llvm-svn: 304227
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@ -1413,7 +1413,8 @@ def tLEApcrelJT : tPseudoInst<(outs tGPR:$Rd),
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// Thumb-1 doesn't have the TBB or TBH instructions, but we can synthesize them
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// and make use of the same compressed jump table format as Thumb-2.
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let Size = 2 in {
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let Size = 2, isBranch = 1, isTerminator = 1, isBarrier = 1,
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isIndirectBranch = 1 in {
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def tTBB_JT : tPseudoInst<(outs),
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(ins tGPR:$base, tGPR:$index, i32imm:$jt, i32imm:$pclbl), 0, IIC_Br, []>,
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Sched<[WriteBr]>;
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@ -3494,7 +3494,8 @@ def t2B : T2I<(outs), (ins thumb_br_target:$target), IIC_Br,
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let AsmMatchConverter = "cvtThumbBranches";
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}
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let Size = 4, isNotDuplicable = 1, isIndirectBranch = 1 in {
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let Size = 4, isNotDuplicable = 1, isBranch = 1, isTerminator = 1,
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isBarrier = 1, isIndirectBranch = 1 in {
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// available in both v8-M.Baseline and Thumb2 targets
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def t2BR_JT : t2basePseudoInst<(outs),
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