forked from OSchip/llvm-project
[X86][AVX2] Enable ZERO_EXTEND_VECTOR_INREG lowering of 256-bit vectors
Some necessary yak shaving before lowering *_EXTEND_VECTOR_INREG 256-bit vectors on AVX1 targets as suggested by D52964. Differential Revision: https://reviews.llvm.org/D52970 llvm-svn: 343991
This commit is contained in:
Simon Pilgrim
parent
869e5d1fca
commit
6fc8d05565
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@ -1125,9 +1125,10 @@ X86TargetLowering::X86TargetLowering(const X86TargetMachine &TM,
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}
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if (HasInt256) {
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setOperationAction(ISD::SIGN_EXTEND_VECTOR_INREG, MVT::v4i64, Custom);
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setOperationAction(ISD::SIGN_EXTEND_VECTOR_INREG, MVT::v8i32, Custom);
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setOperationAction(ISD::SIGN_EXTEND_VECTOR_INREG, MVT::v16i16, Custom);
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for (auto VT : { MVT::v16i16, MVT::v8i32, MVT::v4i64 }) {
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setOperationAction(ISD::SIGN_EXTEND_VECTOR_INREG, VT, Custom);
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setOperationAction(ISD::ZERO_EXTEND_VECTOR_INREG, VT, Custom);
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}
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// The custom lowering for UINT_TO_FP for v8i32 becomes interesting
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// when we have a 256bit-wide blend with immediate.
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@ -19727,10 +19728,7 @@ static SDValue LowerEXTEND_VECTOR_INREG(SDValue Op,
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In = extractSubVector(In, 0, DAG, dl, std::max(InSize, 128));
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}
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assert((Op.getOpcode() != ISD::ZERO_EXTEND_VECTOR_INREG ||
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InVT == MVT::v64i8) && "Zero extend only for v64i8 input!");
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// SSE41 targets can use the pmovsx* instructions directly for 128-bit results,
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// SSE41 targets can use the pmov[sz]x* instructions directly for 128-bit results,
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// so are legal and shouldn't occur here. AVX2/AVX512 pmovsx* instructions still
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// need to be handled here for 256/512-bit results.
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if (Subtarget.hasInt256()) {
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@ -381,76 +381,67 @@ define void @avg_v48i8(<48 x i8>* %a, <48 x i8>* %b) nounwind {
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;
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; AVX2-LABEL: avg_v48i8:
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; AVX2: # %bb.0:
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; AVX2-NEXT: vmovdqa (%rdi), %ymm1
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; AVX2-NEXT: vmovdqa 32(%rdi), %ymm2
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; AVX2-NEXT: vmovdqa (%rsi), %ymm3
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; AVX2-NEXT: vmovdqa 32(%rsi), %ymm0
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; AVX2-NEXT: vextracti128 $1, %ymm1, %xmm4
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; AVX2-NEXT: vpshufd {{.*#+}} xmm5 = xmm4[2,3,0,1]
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; AVX2-NEXT: vpmovzxbd {{.*#+}} xmm5 = xmm5[0],zero,zero,zero,xmm5[1],zero,zero,zero,xmm5[2],zero,zero,zero,xmm5[3],zero,zero,zero
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; AVX2-NEXT: vpshufd {{.*#+}} xmm6 = xmm4[3,1,2,3]
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; AVX2-NEXT: vpmovzxbd {{.*#+}} xmm6 = xmm6[0],zero,zero,zero,xmm6[1],zero,zero,zero,xmm6[2],zero,zero,zero,xmm6[3],zero,zero,zero
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; AVX2-NEXT: vinserti128 $1, %xmm6, %ymm5, %ymm5
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; AVX2-NEXT: vmovdqa {{.*#+}} ymm9 = [255,0,0,0,255,0,0,0,255,0,0,0,255,0,0,0,255,0,0,0,255,0,0,0,255,0,0,0,255,0,0,0]
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; AVX2-NEXT: vpand %ymm9, %ymm5, %ymm5
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; AVX2-NEXT: vpmovzxbd {{.*#+}} ymm7 = xmm1[0],zero,zero,zero,xmm1[1],zero,zero,zero,xmm1[2],zero,zero,zero,xmm1[3],zero,zero,zero,xmm1[4],zero,zero,zero,xmm1[5],zero,zero,zero,xmm1[6],zero,zero,zero,xmm1[7],zero,zero,zero
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; AVX2-NEXT: vpshufd {{.*#+}} xmm1 = xmm1[2,3,0,1]
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; AVX2-NEXT: vpmovzxbd {{.*#+}} ymm1 = xmm1[0],zero,zero,zero,xmm1[1],zero,zero,zero,xmm1[2],zero,zero,zero,xmm1[3],zero,zero,zero,xmm1[4],zero,zero,zero,xmm1[5],zero,zero,zero,xmm1[6],zero,zero,zero,xmm1[7],zero,zero,zero
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; AVX2-NEXT: vpmovzxbd {{.*#+}} ymm11 = xmm4[0],zero,zero,zero,xmm4[1],zero,zero,zero,xmm4[2],zero,zero,zero,xmm4[3],zero,zero,zero,xmm4[4],zero,zero,zero,xmm4[5],zero,zero,zero,xmm4[6],zero,zero,zero,xmm4[7],zero,zero,zero
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; AVX2-NEXT: vpmovzxbd {{.*#+}} ymm8 = xmm2[0],zero,zero,zero,xmm2[1],zero,zero,zero,xmm2[2],zero,zero,zero,xmm2[3],zero,zero,zero,xmm2[4],zero,zero,zero,xmm2[5],zero,zero,zero,xmm2[6],zero,zero,zero,xmm2[7],zero,zero,zero
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; AVX2-NEXT: vpshufd {{.*#+}} xmm2 = xmm2[2,3,0,1]
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; AVX2-NEXT: vpmovzxbd {{.*#+}} ymm10 = xmm2[0],zero,zero,zero,xmm2[1],zero,zero,zero,xmm2[2],zero,zero,zero,xmm2[3],zero,zero,zero,xmm2[4],zero,zero,zero,xmm2[5],zero,zero,zero,xmm2[6],zero,zero,zero,xmm2[7],zero,zero,zero
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; AVX2-NEXT: vextracti128 $1, %ymm3, %xmm6
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; AVX2-NEXT: vpshufd {{.*#+}} xmm2 = xmm6[2,3,0,1]
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; AVX2-NEXT: vpmovzxbd {{.*#+}} xmm2 = xmm2[0],zero,zero,zero,xmm2[1],zero,zero,zero,xmm2[2],zero,zero,zero,xmm2[3],zero,zero,zero
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; AVX2-NEXT: vpshufd {{.*#+}} xmm4 = xmm6[3,1,2,3]
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; AVX2-NEXT: vpmovzxbd {{.*#+}} xmm4 = xmm4[0],zero,zero,zero,xmm4[1],zero,zero,zero,xmm4[2],zero,zero,zero,xmm4[3],zero,zero,zero
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; AVX2-NEXT: vinserti128 $1, %xmm4, %ymm2, %ymm2
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; AVX2-NEXT: vpand %ymm9, %ymm2, %ymm2
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; AVX2-NEXT: vpaddd %ymm2, %ymm5, %ymm2
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; AVX2-NEXT: vpmovzxbd {{.*#+}} ymm4 = xmm3[0],zero,zero,zero,xmm3[1],zero,zero,zero,xmm3[2],zero,zero,zero,xmm3[3],zero,zero,zero,xmm3[4],zero,zero,zero,xmm3[5],zero,zero,zero,xmm3[6],zero,zero,zero,xmm3[7],zero,zero,zero
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; AVX2-NEXT: vpaddd %ymm4, %ymm7, %ymm4
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; AVX2-NEXT: vpshufd {{.*#+}} xmm3 = xmm3[2,3,0,1]
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; AVX2-NEXT: vpmovzxbd {{.*#+}} ymm3 = xmm3[0],zero,zero,zero,xmm3[1],zero,zero,zero,xmm3[2],zero,zero,zero,xmm3[3],zero,zero,zero,xmm3[4],zero,zero,zero,xmm3[5],zero,zero,zero,xmm3[6],zero,zero,zero,xmm3[7],zero,zero,zero
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; AVX2-NEXT: vpaddd %ymm3, %ymm1, %ymm1
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; AVX2-NEXT: vpmovzxbd {{.*#+}} ymm3 = xmm6[0],zero,zero,zero,xmm6[1],zero,zero,zero,xmm6[2],zero,zero,zero,xmm6[3],zero,zero,zero,xmm6[4],zero,zero,zero,xmm6[5],zero,zero,zero,xmm6[6],zero,zero,zero,xmm6[7],zero,zero,zero
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; AVX2-NEXT: vpaddd %ymm3, %ymm11, %ymm3
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; AVX2-NEXT: vpmovzxbd {{.*#+}} ymm5 = xmm0[0],zero,zero,zero,xmm0[1],zero,zero,zero,xmm0[2],zero,zero,zero,xmm0[3],zero,zero,zero,xmm0[4],zero,zero,zero,xmm0[5],zero,zero,zero,xmm0[6],zero,zero,zero,xmm0[7],zero,zero,zero
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; AVX2-NEXT: vpaddd %ymm5, %ymm8, %ymm5
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; AVX2-NEXT: vmovdqa (%rdi), %ymm0
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; AVX2-NEXT: vmovdqa 32(%rdi), %ymm1
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; AVX2-NEXT: vmovdqa (%rsi), %ymm2
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; AVX2-NEXT: vmovdqa 32(%rsi), %ymm3
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; AVX2-NEXT: vextracti128 $1, %ymm0, %xmm4
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; AVX2-NEXT: vpmovzxbd {{.*#+}} ymm4 = xmm4[0],zero,zero,zero,xmm4[1],zero,zero,zero,xmm4[2],zero,zero,zero,xmm4[3],zero,zero,zero,xmm4[4],zero,zero,zero,xmm4[5],zero,zero,zero,xmm4[6],zero,zero,zero,xmm4[7],zero,zero,zero
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; AVX2-NEXT: vpermq {{.*#+}} ymm5 = ymm0[3,1,2,3]
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; AVX2-NEXT: vpmovzxbd {{.*#+}} ymm5 = xmm5[0],zero,zero,zero,xmm5[1],zero,zero,zero,xmm5[2],zero,zero,zero,xmm5[3],zero,zero,zero,xmm5[4],zero,zero,zero,xmm5[5],zero,zero,zero,xmm5[6],zero,zero,zero,xmm5[7],zero,zero,zero
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; AVX2-NEXT: vpmovzxbd {{.*#+}} ymm6 = xmm0[0],zero,zero,zero,xmm0[1],zero,zero,zero,xmm0[2],zero,zero,zero,xmm0[3],zero,zero,zero,xmm0[4],zero,zero,zero,xmm0[5],zero,zero,zero,xmm0[6],zero,zero,zero,xmm0[7],zero,zero,zero
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; AVX2-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[2,3,0,1]
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; AVX2-NEXT: vpmovzxbd {{.*#+}} ymm0 = xmm0[0],zero,zero,zero,xmm0[1],zero,zero,zero,xmm0[2],zero,zero,zero,xmm0[3],zero,zero,zero,xmm0[4],zero,zero,zero,xmm0[5],zero,zero,zero,xmm0[6],zero,zero,zero,xmm0[7],zero,zero,zero
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; AVX2-NEXT: vpaddd %ymm0, %ymm10, %ymm0
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; AVX2-NEXT: vpmovzxbd {{.*#+}} ymm7 = xmm1[0],zero,zero,zero,xmm1[1],zero,zero,zero,xmm1[2],zero,zero,zero,xmm1[3],zero,zero,zero,xmm1[4],zero,zero,zero,xmm1[5],zero,zero,zero,xmm1[6],zero,zero,zero,xmm1[7],zero,zero,zero
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; AVX2-NEXT: vpshufd {{.*#+}} xmm1 = xmm1[2,3,0,1]
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; AVX2-NEXT: vpmovzxbd {{.*#+}} ymm8 = xmm1[0],zero,zero,zero,xmm1[1],zero,zero,zero,xmm1[2],zero,zero,zero,xmm1[3],zero,zero,zero,xmm1[4],zero,zero,zero,xmm1[5],zero,zero,zero,xmm1[6],zero,zero,zero,xmm1[7],zero,zero,zero
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; AVX2-NEXT: vextracti128 $1, %ymm2, %xmm1
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; AVX2-NEXT: vpmovzxbd {{.*#+}} ymm1 = xmm1[0],zero,zero,zero,xmm1[1],zero,zero,zero,xmm1[2],zero,zero,zero,xmm1[3],zero,zero,zero,xmm1[4],zero,zero,zero,xmm1[5],zero,zero,zero,xmm1[6],zero,zero,zero,xmm1[7],zero,zero,zero
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; AVX2-NEXT: vpaddd %ymm1, %ymm4, %ymm1
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; AVX2-NEXT: vpermq {{.*#+}} ymm4 = ymm2[3,1,2,3]
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; AVX2-NEXT: vpmovzxbd {{.*#+}} ymm4 = xmm4[0],zero,zero,zero,xmm4[1],zero,zero,zero,xmm4[2],zero,zero,zero,xmm4[3],zero,zero,zero,xmm4[4],zero,zero,zero,xmm4[5],zero,zero,zero,xmm4[6],zero,zero,zero,xmm4[7],zero,zero,zero
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; AVX2-NEXT: vpaddd %ymm4, %ymm5, %ymm4
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; AVX2-NEXT: vpmovzxbd {{.*#+}} ymm5 = xmm2[0],zero,zero,zero,xmm2[1],zero,zero,zero,xmm2[2],zero,zero,zero,xmm2[3],zero,zero,zero,xmm2[4],zero,zero,zero,xmm2[5],zero,zero,zero,xmm2[6],zero,zero,zero,xmm2[7],zero,zero,zero
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; AVX2-NEXT: vpaddd %ymm5, %ymm6, %ymm5
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; AVX2-NEXT: vpshufd {{.*#+}} xmm2 = xmm2[2,3,0,1]
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; AVX2-NEXT: vpmovzxbd {{.*#+}} ymm2 = xmm2[0],zero,zero,zero,xmm2[1],zero,zero,zero,xmm2[2],zero,zero,zero,xmm2[3],zero,zero,zero,xmm2[4],zero,zero,zero,xmm2[5],zero,zero,zero,xmm2[6],zero,zero,zero,xmm2[7],zero,zero,zero
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; AVX2-NEXT: vpaddd %ymm2, %ymm0, %ymm0
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; AVX2-NEXT: vpmovzxbd {{.*#+}} ymm2 = xmm3[0],zero,zero,zero,xmm3[1],zero,zero,zero,xmm3[2],zero,zero,zero,xmm3[3],zero,zero,zero,xmm3[4],zero,zero,zero,xmm3[5],zero,zero,zero,xmm3[6],zero,zero,zero,xmm3[7],zero,zero,zero
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; AVX2-NEXT: vpaddd %ymm2, %ymm7, %ymm2
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; AVX2-NEXT: vpshufd {{.*#+}} xmm3 = xmm3[2,3,0,1]
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; AVX2-NEXT: vpmovzxbd {{.*#+}} ymm3 = xmm3[0],zero,zero,zero,xmm3[1],zero,zero,zero,xmm3[2],zero,zero,zero,xmm3[3],zero,zero,zero,xmm3[4],zero,zero,zero,xmm3[5],zero,zero,zero,xmm3[6],zero,zero,zero,xmm3[7],zero,zero,zero
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; AVX2-NEXT: vpaddd %ymm3, %ymm8, %ymm3
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; AVX2-NEXT: vpcmpeqd %ymm6, %ymm6, %ymm6
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; AVX2-NEXT: vpsubd %ymm6, %ymm2, %ymm2
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; AVX2-NEXT: vpsubd %ymm6, %ymm4, %ymm4
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; AVX2-NEXT: vpsubd %ymm6, %ymm1, %ymm1
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; AVX2-NEXT: vpsubd %ymm6, %ymm3, %ymm3
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; AVX2-NEXT: vpsubd %ymm6, %ymm4, %ymm4
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; AVX2-NEXT: vpsubd %ymm6, %ymm5, %ymm5
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; AVX2-NEXT: vpsubd %ymm6, %ymm0, %ymm0
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; AVX2-NEXT: vpsrld $1, %ymm2, %ymm2
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; AVX2-NEXT: vpsubd %ymm6, %ymm0, %ymm7
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; AVX2-NEXT: vpsubd %ymm6, %ymm2, %ymm2
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; AVX2-NEXT: vpsubd %ymm6, %ymm3, %ymm0
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; AVX2-NEXT: vpsrld $1, %ymm0, %ymm0
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; AVX2-NEXT: vpsrld $1, %ymm2, %ymm2
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; AVX2-NEXT: vpsrld $1, %ymm7, %ymm3
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; AVX2-NEXT: vpsrld $1, %ymm5, %ymm5
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; AVX2-NEXT: vpsrld $1, %ymm3, %ymm3
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; AVX2-NEXT: vpsrld $1, %ymm1, %ymm1
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; AVX2-NEXT: vpsrld $1, %ymm4, %ymm4
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; AVX2-NEXT: vextracti128 $1, %ymm4, %xmm6
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; AVX2-NEXT: vpackusdw %xmm6, %xmm4, %xmm4
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; AVX2-NEXT: vpsrld $1, %ymm1, %ymm1
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; AVX2-NEXT: vextracti128 $1, %ymm1, %xmm6
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; AVX2-NEXT: vpackusdw %xmm6, %xmm1, %xmm1
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; AVX2-NEXT: vmovdqa {{.*#+}} xmm6 = <0,2,4,6,8,10,12,14,u,u,u,u,u,u,u,u>
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; AVX2-NEXT: vpshufb %xmm6, %xmm4, %xmm4
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; AVX2-NEXT: vextracti128 $1, %ymm1, %xmm7
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; AVX2-NEXT: vpackusdw %xmm7, %xmm1, %xmm1
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; AVX2-NEXT: vpshufb %xmm6, %xmm1, %xmm1
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; AVX2-NEXT: vpunpcklqdq {{.*#+}} xmm1 = xmm4[0],xmm1[0]
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; AVX2-NEXT: vextracti128 $1, %ymm2, %xmm4
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; AVX2-NEXT: vpackusdw %xmm4, %xmm2, %xmm2
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; AVX2-NEXT: vpshufb %xmm6, %xmm2, %xmm2
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; AVX2-NEXT: vextracti128 $1, %ymm3, %xmm4
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; AVX2-NEXT: vpackusdw %xmm4, %xmm3, %xmm3
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; AVX2-NEXT: vextracti128 $1, %ymm4, %xmm7
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; AVX2-NEXT: vpackusdw %xmm7, %xmm4, %xmm4
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; AVX2-NEXT: vpshufb %xmm6, %xmm4, %xmm4
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; AVX2-NEXT: vpunpcklqdq {{.*#+}} xmm1 = xmm1[0],xmm4[0]
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; AVX2-NEXT: vextracti128 $1, %ymm5, %xmm4
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; AVX2-NEXT: vpackusdw %xmm4, %xmm5, %xmm4
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; AVX2-NEXT: vpshufb %xmm6, %xmm4, %xmm4
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; AVX2-NEXT: vextracti128 $1, %ymm3, %xmm5
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; AVX2-NEXT: vpackusdw %xmm5, %xmm3, %xmm3
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; AVX2-NEXT: vpshufb %xmm6, %xmm3, %xmm3
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; AVX2-NEXT: vpunpcklqdq {{.*#+}} xmm2 = xmm3[0],xmm2[0]
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; AVX2-NEXT: vinserti128 $1, %xmm2, %ymm1, %ymm1
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; AVX2-NEXT: vextracti128 $1, %ymm5, %xmm2
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; AVX2-NEXT: vpackusdw %xmm2, %xmm5, %xmm2
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; AVX2-NEXT: vpunpcklqdq {{.*#+}} xmm3 = xmm4[0],xmm3[0]
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; AVX2-NEXT: vinserti128 $1, %xmm1, %ymm3, %ymm1
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; AVX2-NEXT: vextracti128 $1, %ymm2, %xmm3
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; AVX2-NEXT: vpackusdw %xmm3, %xmm2, %xmm2
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; AVX2-NEXT: vpshufb %xmm6, %xmm2, %xmm2
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; AVX2-NEXT: vextracti128 $1, %ymm0, %xmm3
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; AVX2-NEXT: vpackusdw %xmm3, %xmm0, %xmm0
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@ -1,7 +1,7 @@
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; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc < %s -mtriple=x86_64-unknown -mcpu=skx | FileCheck %s
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@ac = external local_unnamed_addr global [20 x i8], align 16
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@ac = external local_unnamed_addr global [20 x i8], align 1
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@ai3 = external local_unnamed_addr global [20 x i32], align 16
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; Function Attrs: norecurse nounwind uwtable
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@ -10,6 +10,7 @@ define void @pr35443() {
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: movzbl ac+{{.*}}(%rip), %eax
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; CHECK-NEXT: vmovd %eax, %xmm0
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; CHECK-NEXT: vpmovzxbq {{.*#+}} ymm0 = xmm0[0],zero,zero,zero,zero,zero,zero,zero,xmm0[1],zero,zero,zero,zero,zero,zero,zero,xmm0[2],zero,zero,zero,zero,zero,zero,zero,xmm0[3],zero,zero,zero,zero,zero,zero,zero
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; CHECK-NEXT: vpxor %xmm1, %xmm1, %xmm1
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; CHECK-NEXT: vpsubq %ymm0, %ymm1, %ymm0
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; CHECK-NEXT: vpmovqd %ymm0, ai3+{{.*}}(%rip)
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@ -2238,17 +2238,13 @@ define <32 x i32> @zext_32i8_to_32i32(<32 x i8> %x) {
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;
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; AVX2-LABEL: zext_32i8_to_32i32:
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; AVX2: # %bb.0:
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; AVX2-NEXT: vextracti128 $1, %ymm0, %xmm1
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; AVX2-NEXT: vpshufd {{.*#+}} xmm2 = xmm1[2,3,0,1]
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; AVX2-NEXT: vpmovzxbd {{.*#+}} xmm2 = xmm2[0],zero,zero,zero,xmm2[1],zero,zero,zero,xmm2[2],zero,zero,zero,xmm2[3],zero,zero,zero
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; AVX2-NEXT: vpshufd {{.*#+}} xmm3 = xmm1[3,1,2,3]
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; AVX2-NEXT: vpmovzxbd {{.*#+}} xmm3 = xmm3[0],zero,zero,zero,xmm3[1],zero,zero,zero,xmm3[2],zero,zero,zero,xmm3[3],zero,zero,zero
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; AVX2-NEXT: vinserti128 $1, %xmm3, %ymm2, %ymm2
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; AVX2-NEXT: vpand {{.*}}(%rip), %ymm2, %ymm3
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; AVX2-NEXT: vpmovzxbd {{.*#+}} ymm4 = xmm0[0],zero,zero,zero,xmm0[1],zero,zero,zero,xmm0[2],zero,zero,zero,xmm0[3],zero,zero,zero,xmm0[4],zero,zero,zero,xmm0[5],zero,zero,zero,xmm0[6],zero,zero,zero,xmm0[7],zero,zero,zero
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; AVX2-NEXT: vextracti128 $1, %ymm0, %xmm1
|
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; AVX2-NEXT: vpmovzxbd {{.*#+}} ymm2 = xmm1[0],zero,zero,zero,xmm1[1],zero,zero,zero,xmm1[2],zero,zero,zero,xmm1[3],zero,zero,zero,xmm1[4],zero,zero,zero,xmm1[5],zero,zero,zero,xmm1[6],zero,zero,zero,xmm1[7],zero,zero,zero
|
||||
; AVX2-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[2,3,0,1]
|
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; AVX2-NEXT: vpmovzxbd {{.*#+}} ymm1 = xmm0[0],zero,zero,zero,xmm0[1],zero,zero,zero,xmm0[2],zero,zero,zero,xmm0[3],zero,zero,zero,xmm0[4],zero,zero,zero,xmm0[5],zero,zero,zero,xmm0[6],zero,zero,zero,xmm0[7],zero,zero,zero
|
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; AVX2-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[2,3,0,1]
|
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; AVX2-NEXT: vpmovzxbd {{.*#+}} ymm1 = xmm1[0],zero,zero,zero,xmm1[1],zero,zero,zero,xmm1[2],zero,zero,zero,xmm1[3],zero,zero,zero,xmm1[4],zero,zero,zero,xmm1[5],zero,zero,zero,xmm1[6],zero,zero,zero,xmm1[7],zero,zero,zero
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; AVX2-NEXT: vpermq {{.*#+}} ymm0 = ymm0[3,1,2,3]
|
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; AVX2-NEXT: vpmovzxbd {{.*#+}} ymm3 = xmm0[0],zero,zero,zero,xmm0[1],zero,zero,zero,xmm0[2],zero,zero,zero,xmm0[3],zero,zero,zero,xmm0[4],zero,zero,zero,xmm0[5],zero,zero,zero,xmm0[6],zero,zero,zero,xmm0[7],zero,zero,zero
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; AVX2-NEXT: vmovdqa %ymm4, %ymm0
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||||
; AVX2-NEXT: retq
|
||||
;
|
||||
|
|
|
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