forked from OSchip/llvm-project
[WebAssembly] Fix for 0xc call_indirect changes
Summary: Need to reorder the operands to have the callee as the last argument. Adds a pseudo-instruction, and a pass to lower it into a real call_indirect. This is the first of two options for how to fix the problem. Reviewers: dschuff, sunfish Subscribers: jfb, beanz, mgorny, llvm-commits Differential Revision: https://reviews.llvm.org/D25708 llvm-svn: 284840
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@ -12,6 +12,7 @@ add_public_tablegen_target(WebAssemblyCommonTableGen)
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add_llvm_target(WebAssemblyCodeGen
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WebAssemblyArgumentMove.cpp
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WebAssemblyAsmPrinter.cpp
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WebAssemblyCallIndirectFixup.cpp
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WebAssemblyCFGStackify.cpp
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WebAssemblyFastISel.cpp
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WebAssemblyFixIrreducibleControlFlow.cpp
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@ -48,6 +48,7 @@ FunctionPass *createWebAssemblyCFGStackify();
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FunctionPass *createWebAssemblyLowerBrUnless();
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FunctionPass *createWebAssemblyRegNumbering();
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FunctionPass *createWebAssemblyPeephole();
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FunctionPass *createWebAssemblyCallIndirectFixup();
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} // end namespace llvm
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@ -0,0 +1,117 @@
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//===-- WebAssemblyCallIndirectFixup.cpp - Fix call_indirects -------------===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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///
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/// \file
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/// \brief This file converts pseudo call_indirect instructions into real
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/// call_indirects.
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///
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/// The order of arguments for a call_indirect is the arguments to the function
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/// call, followed by the function pointer. There's no natural way to express
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/// a machineinstr with varargs followed by one more arg, so we express it as
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/// the function pointer followed by varargs, then rewrite it here.
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///
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/// We need to rewrite the order of the arguments on the machineinstrs
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/// themselves so that register stackification knows the order they'll be
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/// executed in.
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///
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//===----------------------------------------------------------------------===//
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#include "WebAssembly.h"
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#include "MCTargetDesc/WebAssemblyMCTargetDesc.h" // for WebAssembly::ARGUMENT_*
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#include "WebAssemblyMachineFunctionInfo.h"
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#include "WebAssemblySubtarget.h"
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#include "llvm/Analysis/AliasAnalysis.h"
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#include "llvm/CodeGen/LiveIntervalAnalysis.h"
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#include "llvm/CodeGen/MachineBlockFrequencyInfo.h"
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#include "llvm/CodeGen/MachineDominators.h"
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#include "llvm/CodeGen/MachineInstrBuilder.h"
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#include "llvm/CodeGen/MachineRegisterInfo.h"
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#include "llvm/CodeGen/Passes.h"
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#include "llvm/Support/Debug.h"
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#include "llvm/Support/raw_ostream.h"
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using namespace llvm;
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#define DEBUG_TYPE "wasm-call-indirect-fixup"
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namespace {
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class WebAssemblyCallIndirectFixup final : public MachineFunctionPass {
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StringRef getPassName() const override {
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return "WebAssembly CallIndirect Fixup";
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}
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bool runOnMachineFunction(MachineFunction &MF) override;
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public:
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static char ID; // Pass identification, replacement for typeid
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WebAssemblyCallIndirectFixup() : MachineFunctionPass(ID) {}
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};
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} // end anonymous namespace
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char WebAssemblyCallIndirectFixup::ID = 0;
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FunctionPass *llvm::createWebAssemblyCallIndirectFixup() {
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return new WebAssemblyCallIndirectFixup();
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}
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static unsigned GetNonPseudoCallIndirectOpcode(const MachineInstr &MI) {
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switch (MI.getOpcode()) {
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using namespace WebAssembly;
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case PCALL_INDIRECT_VOID: return CALL_INDIRECT_VOID;
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case PCALL_INDIRECT_I32: return CALL_INDIRECT_I32;
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case PCALL_INDIRECT_I64: return CALL_INDIRECT_I64;
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case PCALL_INDIRECT_F32: return CALL_INDIRECT_F32;
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case PCALL_INDIRECT_F64: return CALL_INDIRECT_F64;
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case PCALL_INDIRECT_v16i8: return CALL_INDIRECT_v16i8;
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case PCALL_INDIRECT_v8i16: return CALL_INDIRECT_v8i16;
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case PCALL_INDIRECT_v4i32: return CALL_INDIRECT_v4i32;
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case PCALL_INDIRECT_v4f32: return CALL_INDIRECT_v4f32;
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default: return INSTRUCTION_LIST_END;
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}
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}
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static bool IsPseudoCallIndirect(const MachineInstr &MI) {
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return GetNonPseudoCallIndirectOpcode(MI) !=
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WebAssembly::INSTRUCTION_LIST_END;
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}
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bool WebAssemblyCallIndirectFixup::runOnMachineFunction(MachineFunction &MF) {
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DEBUG(dbgs() << "********** Fixing up CALL_INDIRECTs **********\n"
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<< MF.getName() << '\n');
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bool Changed = false;
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const WebAssemblyInstrInfo *TII =
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MF.getSubtarget<WebAssemblySubtarget>().getInstrInfo();
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for (MachineBasicBlock &MBB : MF) {
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for (MachineInstr &MI : MBB) {
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if (IsPseudoCallIndirect(MI)) {
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DEBUG(dbgs() << "Found call_indirect: " << MI << '\n');
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// Rewrite pseudo to non-pseudo
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const MCInstrDesc &Desc = TII->get(GetNonPseudoCallIndirectOpcode(MI));
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MI.setDesc(Desc);
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// Rewrite argument order
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auto Uses = MI.explicit_uses();
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MachineInstr::mop_iterator it = Uses.begin();
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const MachineOperand MO = *it;
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unsigned num = MI.getOperandNo(it);
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MI.RemoveOperand(num);
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MI.addOperand(MF, MO);
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DEBUG(dbgs() << " After transform: " << MI);
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Changed = true;
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}
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}
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}
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DEBUG(dbgs() << "\nDone fixing up CALL_INDIRECTs\n\n");
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return Changed;
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}
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@ -668,7 +668,7 @@ bool WebAssemblyFastISel::selectCall(const Instruction *I) {
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bool IsVoid = FuncTy->getReturnType()->isVoidTy();
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unsigned ResultReg;
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if (IsVoid) {
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Opc = IsDirect ? WebAssembly::CALL_VOID : WebAssembly::CALL_INDIRECT_VOID;
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Opc = IsDirect ? WebAssembly::CALL_VOID : WebAssembly::PCALL_INDIRECT_VOID;
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} else {
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if (!Subtarget->hasSIMD128() && Call->getType()->isVectorTy())
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return false;
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@ -679,39 +679,39 @@ bool WebAssemblyFastISel::selectCall(const Instruction *I) {
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case MVT::i8:
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case MVT::i16:
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case MVT::i32:
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Opc = IsDirect ? WebAssembly::CALL_I32 : WebAssembly::CALL_INDIRECT_I32;
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Opc = IsDirect ? WebAssembly::CALL_I32 : WebAssembly::PCALL_INDIRECT_I32;
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ResultReg = createResultReg(&WebAssembly::I32RegClass);
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break;
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case MVT::i64:
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Opc = IsDirect ? WebAssembly::CALL_I64 : WebAssembly::CALL_INDIRECT_I64;
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Opc = IsDirect ? WebAssembly::CALL_I64 : WebAssembly::PCALL_INDIRECT_I64;
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ResultReg = createResultReg(&WebAssembly::I64RegClass);
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break;
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case MVT::f32:
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Opc = IsDirect ? WebAssembly::CALL_F32 : WebAssembly::CALL_INDIRECT_F32;
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Opc = IsDirect ? WebAssembly::CALL_F32 : WebAssembly::PCALL_INDIRECT_F32;
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ResultReg = createResultReg(&WebAssembly::F32RegClass);
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break;
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case MVT::f64:
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Opc = IsDirect ? WebAssembly::CALL_F64 : WebAssembly::CALL_INDIRECT_F64;
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Opc = IsDirect ? WebAssembly::CALL_F64 : WebAssembly::PCALL_INDIRECT_F64;
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ResultReg = createResultReg(&WebAssembly::F64RegClass);
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break;
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case MVT::v16i8:
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Opc =
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IsDirect ? WebAssembly::CALL_v16i8 : WebAssembly::CALL_INDIRECT_v16i8;
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IsDirect ? WebAssembly::CALL_v16i8 : WebAssembly::PCALL_INDIRECT_v16i8;
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ResultReg = createResultReg(&WebAssembly::V128RegClass);
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break;
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case MVT::v8i16:
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Opc =
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IsDirect ? WebAssembly::CALL_v8i16 : WebAssembly::CALL_INDIRECT_v8i16;
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IsDirect ? WebAssembly::CALL_v8i16 : WebAssembly::PCALL_INDIRECT_v8i16;
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ResultReg = createResultReg(&WebAssembly::V128RegClass);
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break;
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case MVT::v4i32:
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Opc =
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IsDirect ? WebAssembly::CALL_v4i32 : WebAssembly::CALL_INDIRECT_v4i32;
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IsDirect ? WebAssembly::CALL_v4i32 : WebAssembly::PCALL_INDIRECT_v4i32;
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ResultReg = createResultReg(&WebAssembly::V128RegClass);
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break;
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case MVT::v4f32:
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Opc =
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IsDirect ? WebAssembly::CALL_v4f32 : WebAssembly::CALL_INDIRECT_v4f32;
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IsDirect ? WebAssembly::CALL_v4f32 : WebAssembly::PCALL_INDIRECT_v4f32;
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ResultReg = createResultReg(&WebAssembly::V128RegClass);
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break;
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default:
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@ -29,9 +29,14 @@ multiclass CALL<WebAssemblyRegClass vt, string prefix> {
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def CALL_#vt : I<(outs vt:$dst), (ins i32imm:$callee, variable_ops),
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[(set vt:$dst, (WebAssemblycall1 (i32 imm:$callee)))],
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!strconcat(prefix, "call\t$dst, $callee")>;
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def CALL_INDIRECT_#vt : I<(outs vt:$dst), (ins I32:$callee, variable_ops),
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[(set vt:$dst, (WebAssemblycall1 I32:$callee))],
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!strconcat(prefix, "call_indirect\t$dst, $callee")>;
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let isCodeGenOnly = 1 in {
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def PCALL_INDIRECT_#vt : I<(outs vt:$dst), (ins I32:$callee, variable_ops),
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[(set vt:$dst, (WebAssemblycall1 I32:$callee))],
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"PSEUDO CALL INDIRECT\t$callee">;
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} // isCodeGenOnly = 1
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def CALL_INDIRECT_#vt : I<(outs vt:$dst), (ins variable_ops),
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[],
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!strconcat(prefix, "call_indirect\t$dst")>;
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}
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multiclass SIMD_CALL<ValueType vt, string prefix> {
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[(set (vt V128:$dst),
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(WebAssemblycall1 (i32 imm:$callee)))],
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!strconcat(prefix, "call\t$dst, $callee")>;
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let isCodeGenOnly = 1 in {
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def PCALL_INDIRECT_#vt : SIMD_I<(outs V128:$dst),
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(ins I32:$callee, variable_ops),
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[(set (vt V128:$dst),
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(WebAssemblycall1 I32:$callee))],
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"PSEUDO CALL INDIRECT\t$callee">;
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} // isCodeGenOnly = 1
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def CALL_INDIRECT_#vt : SIMD_I<(outs V128:$dst),
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(ins I32:$callee, variable_ops),
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[(set (vt V128:$dst),
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(WebAssemblycall1 I32:$callee))],
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!strconcat(prefix,
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"call_indirect\t$dst, $callee")>;
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(ins variable_ops),
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[],
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!strconcat(prefix, "call_indirect\t$dst")>;
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}
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let Uses = [SP32, SP64], isCall = 1 in {
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def CALL_VOID : I<(outs), (ins i32imm:$callee, variable_ops),
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[(WebAssemblycall0 (i32 imm:$callee))],
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"call \t$callee">;
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def CALL_INDIRECT_VOID : I<(outs), (ins I32:$callee, variable_ops),
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[(WebAssemblycall0 I32:$callee)],
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"call_indirect\t$callee">;
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let isCodeGenOnly = 1 in {
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def PCALL_INDIRECT_VOID : I<(outs), (ins I32:$callee, variable_ops),
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[(WebAssemblycall0 I32:$callee)],
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"PSEUDO CALL INDIRECT\t$callee">;
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} // isCodeGenOnly = 1
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def CALL_INDIRECT_VOID : I<(outs), (ins variable_ops),
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[],
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"call_indirect\t">;
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} // Uses = [SP32,SP64], isCall = 1
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} // Defs = [ARGUMENTS]
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// colored, and numbered with the rest of the registers.
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addPass(createWebAssemblyReplacePhysRegs());
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// Rewrite pseudo call_indirect instructions as real instructions.
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// This needs to run before register stackification, because we change the
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// order of the arguments.
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addPass(createWebAssemblyCallIndirectFixup());
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if (getOptLevel() != CodeGenOpt::None) {
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// LiveIntervals isn't commonly run this late. Re-establish preconditions.
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addPass(createWebAssemblyPrepareForLiveIntervals());
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@ -97,6 +97,24 @@ define i32 @call_indirect_i32(i32 ()* %callee) {
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ret i32 %t
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}
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; CHECK-LABEL: call_indirect_arg:
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; CHECK-NEXT: .param i32, i32{{$}}
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; CHECK-NEXT: {{^}} call_indirect $1, $0{{$}}
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; CHECK-NEXT: return{{$}}
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define void @call_indirect_arg(void (i32)* %callee, i32 %arg) {
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call void %callee(i32 %arg)
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ret void
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}
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; CHECK-LABEL: call_indirect_arg_2:
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; CHECK-NEXT: .param i32, i32, i32{{$}}
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; CHECK-NEXT: {{^}} i32.call_indirect $drop=, $1, $2, $0{{$}}
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; CHECK-NEXT: return{{$}}
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define void @call_indirect_arg_2(i32 (i32, i32)* %callee, i32 %arg, i32 %arg2) {
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call i32 %callee(i32 %arg, i32 %arg2)
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ret void
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}
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; CHECK-LABEL: tail_call_void_nullary:
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; CHECK-NEXT: {{^}} call void_nullary@FUNCTION{{$}}
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; CHECK-NEXT: return{{$}}
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@ -459,6 +459,25 @@ define i32 @stackpointer_dependency(i8* readnone) {
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ret i32 %3
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}
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; Stackify a call_indirect with respect to its ordering
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; CHECK-LABEL: call_indirect_stackify:
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; CHECK: i32.load $push[[L4:.+]]=, 0($0)
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; CHECK-NEXT: tee_local $push[[L3:.+]]=, $0=, $pop[[L4]]
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; CHECK-NEXT: i32.load $push[[L0:.+]]=, 0($0)
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; CHECK-NEXT: i32.load $push[[L1:.+]]=, 0($pop[[L0]])
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; CHECK-NEXT: i32.call_indirect $push{{.+}}=, $pop[[L3]], $1, $pop[[L1]]
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%class.call_indirect = type { i32 (...)** }
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define i32 @call_indirect_stackify(%class.call_indirect** %objptr, i32 %arg) {
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%obj = load %class.call_indirect*, %class.call_indirect** %objptr
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%addr = bitcast %class.call_indirect* %obj to i32(%class.call_indirect*, i32)***
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%vtable = load i32(%class.call_indirect*, i32)**, i32(%class.call_indirect*, i32)*** %addr
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%vfn = getelementptr inbounds i32(%class.call_indirect*, i32)*, i32(%class.call_indirect*, i32)** %vtable, i32 0
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%f = load i32(%class.call_indirect*, i32)*, i32(%class.call_indirect*, i32)** %vfn
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%ret = call i32 %f(%class.call_indirect* %obj, i32 %arg)
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ret i32 %ret
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}
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!llvm.module.flags = !{!0}
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!llvm.dbg.cu = !{!1}
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