maxjhandsome
/
llvm-project
forked from OSchip/llvm-project
1
0
Fork 0
Code Issues Pull Requests Packages Releases Wiki Activity

[X86][SSE] Add PTEST(AND(X,Y),AND(X,Y)) tests derived from PR42035 examples

This commit is contained in:
Simon Pilgrim 2020-04-07 17:10:46 +01:00
parent 47b234944d
commit 6f46e9af8a
1 changed files with 72 additions and 0 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

72
llvm/test/CodeGen/X86/combine-ptest.ll
View File

@ -148,6 +148,78 @@ define i32 @ptestnzc_256_invert0_commute(<4 x i64> %c, <4 x i64> %d, i32 %a, i32
ret i32 %t4
}
;
; testz(AND(X,Y),AND(X,Y)) -> testz(X,Y)
;
define i32 @ptestz_128_and(<2 x i64> %c, <2 x i64> %d, i32 %a, i32 %b) {
; CHECK-LABEL: ptestz_128_and:
; CHECK: # %bb.0:
; CHECK-NEXT: movl %edi, %eax
; CHECK-NEXT: vpand %xmm1, %xmm0, %xmm0
; CHECK-NEXT: vptest %xmm0, %xmm0
; CHECK-NEXT: cmovnel %esi, %eax
; CHECK-NEXT: retq
%t1 = and <2 x i64> %c, %d
%t2 = call i32 @llvm.x86.sse41.ptestz(<2 x i64> %t1, <2 x i64> %t1)
%t3 = icmp ne i32 %t2, 0
%t4 = select i1 %t3, i32 %a, i32 %b
ret i32 %t4
}
define i32 @ptestz_256_and(<4 x i64> %c, <4 x i64> %d, i32 %a, i32 %b) {
; CHECK-LABEL: ptestz_256_and:
; CHECK: # %bb.0:
; CHECK-NEXT: movl %edi, %eax
; CHECK-NEXT: vandps %ymm1, %ymm0, %ymm0
; CHECK-NEXT: vptest %ymm0, %ymm0
; CHECK-NEXT: cmovel %esi, %eax
; CHECK-NEXT: vzeroupper
; CHECK-NEXT: retq
%t1 = and <4 x i64> %c, %d
%t2 = call i32 @llvm.x86.avx.ptestz.256(<4 x i64> %t1, <4 x i64> %t1)
%t3 = icmp eq i32 %t2, 0
%t4 = select i1 %t3, i32 %a, i32 %b
ret i32 %t4
}
;
; testz(AND(~X,Y),AND(~X,Y)) -> testc(X,Y)
;
define i32 @ptestz_128_andc(<2 x i64> %c, <2 x i64> %d, i32 %a, i32 %b) {
; CHECK-LABEL: ptestz_128_andc:
; CHECK: # %bb.0:
; CHECK-NEXT: movl %edi, %eax
; CHECK-NEXT: vpandn %xmm1, %xmm0, %xmm0
; CHECK-NEXT: vptest %xmm0, %xmm0
; CHECK-NEXT: cmovnel %esi, %eax
; CHECK-NEXT: retq
%t1 = xor <2 x i64> %c, <i64 -1, i64 -1>
%t2 = and <2 x i64> %t1, %d
%t3 = call i32 @llvm.x86.sse41.ptestz(<2 x i64> %t2, <2 x i64> %t2)
%t4 = icmp ne i32 %t3, 0
%t5 = select i1 %t4, i32 %a, i32 %b
ret i32 %t5
}
define i32 @ptestz_256_andc(<4 x i64> %c, <4 x i64> %d, i32 %a, i32 %b) {
; CHECK-LABEL: ptestz_256_andc:
; CHECK: # %bb.0:
; CHECK-NEXT: movl %edi, %eax
; CHECK-NEXT: vandnps %ymm1, %ymm0, %ymm0
; CHECK-NEXT: vptest %ymm0, %ymm0
; CHECK-NEXT: cmovel %esi, %eax
; CHECK-NEXT: vzeroupper
; CHECK-NEXT: retq
%t1 = xor <4 x i64> %c, <i64 -1, i64 -1, i64 -1, i64 -1>
%t2 = and <4 x i64> %t1, %d
%t3 = call i32 @llvm.x86.avx.ptestz.256(<4 x i64> %t2, <4 x i64> %t2)
%t4 = icmp eq i32 %t3, 0
%t5 = select i1 %t4, i32 %a, i32 %b
ret i32 %t5
}
;
; testz(-1,X) -> testz(X,X)
;