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Temporarily revert "[SLP] fix miscompile on min/max reductions with extra uses (PR43948)" 

as it causes an ICE on valid. A testcase was followed up on the original thread.

This reverts commit a3e61946c5.
This commit is contained in:
Eric Christopher 2019-11-18 14:41:37 -08:00
parent 5e0a4eddac
commit 6f1cc4151a
3 changed files with 3 additions and 16 deletions
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15
llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
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@ -6778,21 +6778,8 @@ public:
VectorizedTree = VectReductionData.createOp(Builder, "op.extra", I);
}
}
// Update users. For a min/max reduction that ends with a compare and
// select, we also have to RAUW for the compare instruction feeding the
// reduction root. That's because the original compare may have extra uses
// besides the final select of the reduction.
if (ReductionData.isMinMax() && isa<SelectInst>(VectorizedTree)) {
assert(isa<SelectInst>(ReductionRoot) &&
"Expected min/max reduction to have select root instruction");
Value *ScalarCond = cast<SelectInst>(ReductionRoot)->getCondition();
Value *VectorCond = cast<SelectInst>(VectorizedTree)->getCondition();
ScalarCond->replaceAllUsesWith(VectorCond);
}
// Update users.
ReductionRoot->replaceAllUsesWith(VectorizedTree);
// Mark all scalar reduction ops for deletion, they are replaced by the
// vector reductions.
V.eraseInstructions(IgnoreList);

2
llvm/test/Transforms/SLPVectorizer/X86/reduction.ll
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@ -91,7 +91,7 @@ define i32 @horiz_max_multiple_uses([32 x i32]* %x, i32* %p) {
; CHECK-NEXT: [[TMP5:%.*]] = select i1 [[TMP4]], i32 [[TMP3]], i32 [[T4]]
; CHECK-NEXT: [[C012345:%.*]] = icmp sgt i32 [[TMP5]], [[T5]]
; CHECK-NEXT: [[T17:%.*]] = select i1 [[C012345]], i32 [[TMP5]], i32 [[T5]]
; CHECK-NEXT: [[THREE_OR_FOUR:%.*]] = select i1 [[TMP4]], i32 3, i32 4
; CHECK-NEXT: [[THREE_OR_FOUR:%.*]] = select i1 undef, i32 3, i32 4
; CHECK-NEXT: store i32 [[THREE_OR_FOUR]], i32* [[P:%.*]], align 8
; CHECK-NEXT: ret i32 [[T17]]
;

2
llvm/test/Transforms/SLPVectorizer/X86/used-reduced-op.ll
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@ -71,7 +71,7 @@ define void @n() local_unnamed_addr #0 {
; CHECK-NEXT: [[NEG_1_1:%.*]] = sub nsw i32 0, [[SUB_1_1]]
; CHECK-NEXT: [[TMP46:%.*]] = select i1 [[TMP45]], i32 [[NEG_1_1]], i32 [[SUB_1_1]]
; CHECK-NEXT: [[CMP12_1_1:%.*]] = icmp slt i32 [[TMP46]], [[OP_EXTRA]]
; CHECK-NEXT: [[NARROW:%.*]] = or i1 [[CMP12_1_1]], [[TMP44]]
; CHECK-NEXT: [[NARROW:%.*]] = or i1 [[CMP12_1_1]], undef
; CHECK-NEXT: [[SPEC_SELECT8_1_1:%.*]] = select i1 [[CMP12_1_1]], i32 [[TMP46]], i32 [[OP_EXTRA]]
; CHECK-NEXT: [[SUB_2_1:%.*]] = sub i32 [[TMP30]], [[TMP3]]
; CHECK-NEXT: [[TMP47:%.*]] = icmp slt i32 [[SUB_2_1]], 0