forked from OSchip/llvm-project
[PPC64] Use mfocrf in prologue when we only need to save 1 nonvolatile CR field
In the ELFv2 ABI, we are not required to save all CR fields. If only one nonvolatile CR field is clobbered, use mfocrf instead of mfcr to selectively save the field, because mfocrf has short latency compares to mfcr. Thanks Nemanja's invaluable hint! Reviewers: nemanjai tjablin hfinkel kbarton http://reviews.llvm.org/D17749 llvm-svn: 266038
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@ -838,11 +838,15 @@ void PPCFrameLowering::emitPrologue(MachineFunction &MF,
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// If we need to spill the CR and the LR but we don't have two separate
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// registers available, we must spill them one at a time
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if (MustSaveCR && SingleScratchReg && MustSaveLR) {
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// FIXME: In the ELFv2 ABI, we are not required to save all CR fields.
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// If only one or two CR fields are clobbered, it could be more
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// efficient to use mfocrf to selectively save just those fields.
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// In the ELFv2 ABI, we are not required to save all CR fields.
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// If only one or two CR fields are clobbered, it is more efficient to use
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// mfocrf to selectively save just those fields, because mfocrf has short
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// latency compares to mfcr.
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unsigned MfcrOpcode = PPC::MFCR8;
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if (isELFv2ABI && MustSaveCRs.size() == 1)
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MfcrOpcode = PPC::MFOCRF8;
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MachineInstrBuilder MIB =
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BuildMI(MBB, MBBI, dl, TII.get(PPC::MFCR8), TempReg);
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BuildMI(MBB, MBBI, dl, TII.get(MfcrOpcode), TempReg);
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for (unsigned i = 0, e = MustSaveCRs.size(); i != e; ++i)
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MIB.addReg(MustSaveCRs[i], RegState::ImplicitKill);
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BuildMI(MBB, MBBI, dl, TII.get(PPC::STW8))
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@ -856,11 +860,15 @@ void PPCFrameLowering::emitPrologue(MachineFunction &MF,
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if (MustSaveCR &&
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!(SingleScratchReg && MustSaveLR)) { // will only occur for PPC64
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// FIXME: In the ELFv2 ABI, we are not required to save all CR fields.
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// If only one or two CR fields are clobbered, it could be more
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// efficient to use mfocrf to selectively save just those fields.
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// In the ELFv2 ABI, we are not required to save all CR fields.
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// If only one or two CR fields are clobbered, it is more efficient to use
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// mfocrf to selectively save just those fields, because mfocrf has short
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// latency compares to mfcr.
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unsigned MfcrOpcode = PPC::MFCR8;
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if (isELFv2ABI && MustSaveCRs.size() == 1)
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MfcrOpcode = PPC::MFOCRF8;
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MachineInstrBuilder MIB =
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BuildMI(MBB, MBBI, dl, TII.get(PPC::MFCR8), TempReg);
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BuildMI(MBB, MBBI, dl, TII.get(MfcrOpcode), TempReg);
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for (unsigned i = 0, e = MustSaveCRs.size(); i != e; ++i)
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MIB.addReg(MustSaveCRs[i], RegState::ImplicitKill);
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}
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@ -1,5 +1,6 @@
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; RUN: llc -O0 -disable-fp-elim -mtriple=powerpc-unknown-linux-gnu -mcpu=g5 < %s | FileCheck %s -check-prefix=PPC32
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; RUN: llc -O0 -mtriple=powerpc64-unknown-linux-gnu -mcpu=g5 < %s | FileCheck %s -check-prefix=PPC64
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; RUN: llc -O0 -mtriple=powerpc64le-unknown-linux-gnu < %s | FileCheck %s -check-prefix=PPC64-ELFv2
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declare void @foo()
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@ -60,3 +61,22 @@ entry:
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; PPC64: mtocrf 16, 12
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; PPC64: mtocrf 8, 12
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; Generate mfocrf in prologue when we need to save 1 nonvolatile CR field
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define void @cloberOneNvCrField() {
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entry:
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tail call void asm sideeffect "# clobbers", "~{cr2}"()
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ret void
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; PPC64-ELFv2-LABEL: @cloberOneNvCrField
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; PPC64-ELFv2: mfocrf [[REG1:[0-9]+]], 32
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}
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; Generate mfcr in prologue when we need to save all nonvolatile CR field
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define void @cloberAllNvCrField() {
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entry:
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tail call void asm sideeffect "# clobbers", "~{cr2},~{cr3},~{cr4}"()
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ret void
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; PPC64-ELFv2-LABEL: @cloberAllNvCrField
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; PPC64-ELFv2: mfcr [[REG1:[0-9]+]]
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}
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@ -101,7 +101,7 @@ if.end16: ; preds = %entry, %if.end13, %
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ret i32 2
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}
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; CHECK: mfcr {{[0-9]+}}
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; CHECK: mfocrf {{[0-9]+}}
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!llvm.ident = !{!0}
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