forked from OSchip/llvm-project
PSLLWri etc. are two-address instructions.
llvm-svn: 47940
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@ -1765,7 +1765,7 @@ def MOVDQUmr_Int : I<0x7F, MRMDestMem, (outs), (ins i128mem:$dst, VR128:$src),
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[(int_x86_sse2_storeu_dq addr:$dst, VR128:$src)]>,
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XS, Requires<[HasSSE2]>;
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let isTwoAddress = 1 in {
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let Constraints = "$src1 = $dst" in {
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multiclass PDI_binop_rm_int<bits<8> opc, string OpcodeStr, Intrinsic IntId,
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bit Commutable = 0> {
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@ -1866,6 +1866,7 @@ defm PSRAW : PDI_binop_rm_int<0xE1, "psraw", int_x86_sse2_psra_w>;
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defm PSRAD : PDI_binop_rm_int<0xE2, "psrad", int_x86_sse2_psra_d>;
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// Some immediate variants need to match a bit_convert.
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let Constraints = "$src1 = $dst" in {
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def PSLLWri : PDIi8<0x71, MRM6r, (outs VR128:$dst),
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(ins VR128:$src1, i32i8imm:$src2),
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"psllw\t{$src2, $dst|$dst, $src2}",
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@ -1908,6 +1909,7 @@ def PSRADri : PDIi8<0x72, MRM4r, (outs VR128:$dst),
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"psrad\t{$src2, $dst|$dst, $src2}",
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[(set VR128:$dst, (int_x86_sse2_psra_d VR128:$src1,
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(scalar_to_vector (i32 imm:$src2))))]>;
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}
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// PSRAQ doesn't exist in SSE[1-3].
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