diff --git a/llvm/lib/Target/Sparc/SparcISelLowering.cpp b/llvm/lib/Target/Sparc/SparcISelLowering.cpp
index 05c6cce19d35..a6d440fa8aa2 100644
--- a/llvm/lib/Target/Sparc/SparcISelLowering.cpp
+++ b/llvm/lib/Target/Sparc/SparcISelLowering.cpp
@@ -3258,6 +3258,8 @@ SparcTargetLowering::getRegForInlineAsmConstraint(const TargetRegisterInfo *TRI,
     case 'r':
       if (VT == MVT::v2i32)
         return std::make_pair(0U, &SP::IntPairRegClass);
+      else if (Subtarget->is64Bit())
+        return std::make_pair(0U, &SP::I64RegsRegClass);
       else
         return std::make_pair(0U, &SP::IntRegsRegClass);
     case 'f':
diff --git a/llvm/test/CodeGen/SPARC/reg64.ll b/llvm/test/CodeGen/SPARC/reg64.ll
new file mode 100644
index 000000000000..74f4d46568f9
--- /dev/null
+++ b/llvm/test/CodeGen/SPARC/reg64.ll
@@ -0,0 +1,10 @@
+; RUN: llc < %s -march=sparcv9 | FileCheck %s
+
+define dso_local zeroext i32 @f() local_unnamed_addr {
+entry:
+  %0 = tail call i64 asm "", "=r"()
+  %shr = lshr i64 %0, 32
+  %conv = trunc i64 %shr to i32
+  ret i32 %conv
+}
+; CHECK: srlx