forked from OSchip/llvm-project
[mips][msa/dsp] Only do DSP combines if DSP is enabled.
Fixes a crash (null pointer dereferenced) when MSA is enabled. llvm-svn: 195343
This commit is contained in:
Daniel Sanders
parent
b55c7e7cc4
commit
6e664bcef3
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@ -751,6 +751,9 @@ static SDValue performDSPShiftCombine(unsigned Opc, SDNode *N, EVT Ty,
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unsigned EltSize = Ty.getVectorElementType().getSizeInBits();
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BuildVectorSDNode *BV = dyn_cast<BuildVectorSDNode>(N->getOperand(1));
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if (!Subtarget->hasDSP())
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return SDValue();
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if (!BV ||
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!BV->isConstantSplat(SplatValue, SplatUndef, SplatBitSize, HasAnyUndefs,
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EltSize, !Subtarget->isLittle()) ||
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@ -0,0 +1,141 @@
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; RUN: llc -march=mips < %s
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; RUN: llc -march=mips -mattr=+msa,+fp64 < %s
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; RUN: llc -march=mipsel < %s
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; RUN: llc -march=mipsel -mattr=+msa,+fp64 < %s
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; This test originally failed for MSA after dereferencing a null this pointer.
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; It should at least successfully build.
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define void @autogen_SD2704903805(i8*, i32*, i64*, i32, i64, i8) {
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BB:
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%A4 = alloca i32
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%A3 = alloca i32
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%A2 = alloca i8
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%A1 = alloca i32
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%A = alloca i8
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%L = load i8* %0
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store i8 %5, i8* %0
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%E = extractelement <2 x i16> zeroinitializer, i32 0
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%Shuff = shufflevector <1 x i8> <i8 -1>, <1 x i8> <i8 -1>, <1 x i32> undef
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%I = insertelement <1 x i8> <i8 -1>, i8 85, i32 0
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%B = lshr <2 x i16> zeroinitializer, zeroinitializer
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%FC = sitofp <4 x i16> zeroinitializer to <4 x float>
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%Sl = select i1 true, float 0.000000e+00, float 0x401E76A240000000
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%Cmp = icmp ule i16 -25210, %E
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br label %CF83
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CF83: ; preds = %BB
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%L5 = load i8* %0
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store i8 85, i8* %0
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%E6 = extractelement <1 x i8> <i8 -1>, i32 0
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%Shuff7 = shufflevector <2 x i16> zeroinitializer, <2 x i16> zeroinitializer, <2 x i32> <i32 1, i32 3>
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%I8 = insertelement <4 x i16> zeroinitializer, i16 %E, i32 3
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%B9 = ashr <2 x i16> %Shuff7, zeroinitializer
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%FC10 = sitofp i32 -1 to float
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%Sl11 = select i1 %Cmp, i32 -1, i32 -1
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%Cmp12 = icmp sgt i32 -1, -1
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br label %CF
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CF: ; preds = %CF, %CF81, %CF83
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%L13 = load i8* %0
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store i8 0, i8* %0
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%E14 = extractelement <2 x i64> zeroinitializer, i32 0
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%Shuff15 = shufflevector <4 x i64> <i64 -1, i64 -1, i64 -1, i64 -1>, <4 x i64> <i64 -1, i64 -1, i64 -1, i64 -1>, <4 x i32> <i32 3, i32 5, i32 7, i32 undef>
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%I16 = insertelement <4 x i64> <i64 -1, i64 -1, i64 -1, i64 -1>, i64 81222, i32 1
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%B17 = lshr <2 x i16> zeroinitializer, %B
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%Tr = trunc i32 272597 to i1
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br i1 %Tr, label %CF, label %CF80
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CF80: ; preds = %CF80, %CF
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%Sl18 = select i1 %Cmp, <2 x i64> zeroinitializer, <2 x i64> zeroinitializer
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%Cmp19 = icmp ne i1 %Cmp12, %Cmp
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br i1 %Cmp19, label %CF80, label %CF81
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CF81: ; preds = %CF80
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%L20 = load i8* %0
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store i8 85, i8* %0
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%E21 = extractelement <1 x i8> <i8 -1>, i32 0
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%Shuff22 = shufflevector <1 x i8> <i8 -1>, <1 x i8> %Shuff, <1 x i32> zeroinitializer
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%I23 = insertelement <1 x i8> <i8 -1>, i8 %L5, i32 0
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%FC24 = fptoui <4 x float> %FC to <4 x i16>
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%Sl25 = select i1 %Cmp, <2 x i32> zeroinitializer, <2 x i32> <i32 -1, i32 -1>
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%Cmp26 = icmp ult <4 x i64> %I16, %Shuff15
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%L27 = load i8* %0
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store i8 %L, i8* %0
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%E28 = extractelement <1 x i8> <i8 -1>, i32 0
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%Shuff29 = shufflevector <8 x i16> zeroinitializer, <8 x i16> zeroinitializer, <8 x i32> <i32 11, i32 undef, i32 15, i32 1, i32 3, i32 5, i32 undef, i32 9>
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%I30 = insertelement <4 x i64> <i64 -1, i64 -1, i64 -1, i64 -1>, i64 %E14, i32 1
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%B31 = mul i8 %E28, 85
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%PC = bitcast i32* %A3 to i32*
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%Sl32 = select i1 %Cmp12, float %FC10, float 0x4712BFE680000000
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%L33 = load i32* %PC
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store i32 %L33, i32* %PC
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%E34 = extractelement <2 x i16> zeroinitializer, i32 1
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%Shuff35 = shufflevector <1 x i8> %Shuff, <1 x i8> <i8 -1>, <1 x i32> zeroinitializer
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%I36 = insertelement <1 x i8> <i8 -1>, i8 %L13, i32 0
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%B37 = xor i8 %L27, %L
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%Sl38 = select i1 %Cmp, i16 %E34, i16 %E
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%Cmp39 = icmp eq i1 %Cmp19, %Cmp
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br i1 %Cmp39, label %CF, label %CF77
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CF77: ; preds = %CF77, %CF81
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%L40 = load i32* %PC
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store i32 %3, i32* %PC
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%E41 = extractelement <2 x i32> zeroinitializer, i32 0
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%Shuff42 = shufflevector <2 x i32> <i32 -1, i32 -1>, <2 x i32> zeroinitializer, <2 x i32> <i32 1, i32 3>
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%I43 = insertelement <1 x i8> <i8 -1>, i8 0, i32 0
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%B44 = or i16 %E, -25210
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%Se = sext i32 %3 to i64
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%Sl45 = select i1 true, <1 x i8> %Shuff, <1 x i8> %I43
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%Cmp46 = icmp sge <1 x i8> %I36, %Shuff
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%L47 = load i32* %PC
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store i32 %L33, i32* %PC
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%E48 = extractelement <2 x i16> zeroinitializer, i32 0
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%Shuff49 = shufflevector <1 x i8> <i8 -1>, <1 x i8> <i8 -1>, <1 x i32> <i32 1>
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%I50 = insertelement <2 x i32> %Sl25, i32 47963, i32 1
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%B51 = srem <1 x i8> %I, %Shuff22
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%FC52 = sitofp i8 %5 to double
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%Sl53 = select i1 %Cmp39, i8 %L27, i8 85
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%Cmp54 = icmp slt i16 %E34, %E34
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br i1 %Cmp54, label %CF77, label %CF78
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CF78: ; preds = %CF78, %CF77
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%L55 = load i32* %PC
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store i32 %L33, i32* %PC
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%E56 = extractelement <8 x i16> %Shuff29, i32 4
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%Shuff57 = shufflevector <1 x i8> <i8 -1>, <1 x i8> <i8 -1>, <1 x i32> <i32 1>
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%I58 = insertelement <1 x i8> %B51, i8 %Sl53, i32 0
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%ZE = fpext float %FC10 to double
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%Sl59 = select i1 %Cmp12, <2 x i16> %B9, <2 x i16> zeroinitializer
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%Cmp60 = fcmp ult double 0.000000e+00, 0.000000e+00
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br i1 %Cmp60, label %CF78, label %CF79
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CF79: ; preds = %CF79, %CF78
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%L61 = load i32* %PC
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store i32 %L33, i32* %A3
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%E62 = extractelement <4 x i64> %Shuff15, i32 1
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%Shuff63 = shufflevector <8 x i16> %Shuff29, <8 x i16> %Shuff29, <8 x i32> <i32 undef, i32 10, i32 12, i32 undef, i32 undef, i32 undef, i32 4, i32 6>
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%I64 = insertelement <2 x i64> zeroinitializer, i64 %Se, i32 0
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%B65 = shl i8 %5, 85
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%ZE66 = zext <4 x i1> %Cmp26 to <4 x i32>
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%Sl67 = select i1 %Tr, <1 x i8> %Shuff, <1 x i8> %I23
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%Cmp68 = fcmp olt float 0x4712BFE680000000, 0x4712BFE680000000
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br i1 %Cmp68, label %CF79, label %CF82
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CF82: ; preds = %CF79
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%L69 = load i32* %PC
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store i32 %L33, i32* %PC
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%E70 = extractelement <8 x i16> zeroinitializer, i32 3
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%Shuff71 = shufflevector <4 x i64> %Shuff15, <4 x i64> <i64 -1, i64 -1, i64 -1, i64 -1>, <4 x i32> <i32 6, i32 undef, i32 2, i32 4>
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%I72 = insertelement <1 x i8> <i8 -1>, i8 %L, i32 0
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%B73 = srem i64 %E62, %Se
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%ZE74 = zext <4 x i1> %Cmp26 to <4 x i32>
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%Sl75 = select i1 %Cmp, i32 463279, i32 %L61
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%Cmp76 = icmp sgt <1 x i8> %Shuff49, %Shuff22
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store i8 %B31, i8* %0
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store i8 85, i8* %0
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store i32 %L33, i32* %PC
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store i8 %B65, i8* %0
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store i8 %L5, i8* %0
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ret void
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}
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