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Add Uses=[SP] to call instructions. This fixes a miscompilation with a 

variable sized alloca.

llvm-svn: 138433
This commit is contained in:
Richard Osborne 2011-08-24 13:32:43 +00:00
parent 95589f13ff
commit 6e3c83eb1c
2 changed files with 22 additions and 2 deletions
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4
llvm/lib/Target/XCore/XCoreInstrInfo.td
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@ -739,7 +739,7 @@ def LDAP_lu10_ba : _FLU10<(outs),
let isCall=1, let isCall=1,
// All calls clobber the link register and the non-callee-saved registers: // All calls clobber the link register and the non-callee-saved registers:
Defs = [R0, R1, R2, R3, R11, LR] in { Defs = [R0, R1, R2, R3, R11, LR], Uses = [SP] in {
def BL_u10 : _FU10< def BL_u10 : _FU10<
(outs), (outs),
(ins calltarget:$target, variable_ops), (ins calltarget:$target, variable_ops),
@ -981,7 +981,7 @@ def ECALLF_1r : _F1R<(outs), (ins GRRegs:$src),
let isCall=1, let isCall=1,
// All calls clobber the link register and the non-callee-saved registers: // All calls clobber the link register and the non-callee-saved registers:
Defs = [R0, R1, R2, R3, R11, LR] in { Defs = [R0, R1, R2, R3, R11, LR], Uses = [SP] in {
def BLA_1r : _F1R<(outs), (ins GRRegs:$addr, variable_ops), def BLA_1r : _F1R<(outs), (ins GRRegs:$addr, variable_ops),
"bla $addr", "bla $addr",
[(XCoreBranchLink GRRegs:$addr)]>; [(XCoreBranchLink GRRegs:$addr)]>;

20
llvm/test/CodeGen/XCore/2011-08-01-DynamicAllocBug.ll Normal file
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@ -0,0 +1,20 @@
; RUN: llc < %s -march=xcore | FileCheck %s
declare void @g()
declare i8* @llvm.stacksave() nounwind
declare void @llvm.stackrestore(i8*) nounwind
define void @f(i32** %p, i32 %size) {
allocas:
%0 = call i8* @llvm.stacksave()
%a = alloca i32, i32 %size
store i32* %a, i32** %p
call void @g()
call void @llvm.stackrestore(i8* %0)
ret void
}
; CHECK: f:
; CHECK: ldaw [[REGISTER:r[0-9]+]], {{r[0-9]+}}[-r1]
; CHECK: set sp, [[REGISTER]]
; CHECK extsp 1
; CHECK bl g