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[RISCV] Slightly simplify coode in combineVWADD_W_VL_VWSUB_W_VL and combineMUL_VLToVWMUL_VL. NFC 

Use computeMaxSignificantBits instead of ComputeNumSignBits. Create
APInt as part of call to MaskedValueIsZero instead of creating
a named temporary.
This commit is contained in:
Craig Topper 2022-08-31 14:10:02 -07:00
parent 6e3bc83c22
commit 6e0ae7e940
1 changed files with 11 additions and 12 deletions
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23
llvm/lib/Target/RISCV/RISCVISelLowering.cpp
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@ -8744,11 +8744,11 @@ static SDValue combineVWADD_W_VL_VWSUB_W_VL(SDNode *N, SelectionDAG &DAG) {
return SDValue();
if (IsSigned) {
if (DAG.ComputeNumSignBits(Op0) <= (ScalarBits - NarrowSize))
if (DAG.ComputeMaxSignificantBits(Op0) > NarrowSize)
return SDValue();
} else {
APInt Mask = APInt::getBitsSetFrom(ScalarBits, NarrowSize);
if (!DAG.MaskedValueIsZero(Op0, Mask))
if (!DAG.MaskedValueIsZero(Op0,
APInt::getBitsSetFrom(ScalarBits, NarrowSize)))
return SDValue();
}
@ -8826,16 +8826,15 @@ static SDValue combineMUL_VLToVWMUL_VL(SDNode *N, SelectionDAG &DAG,
return SDValue();
// If the LHS is a sign extend, try to use vwmul.
if (IsSignExt && DAG.ComputeNumSignBits(Op1) > (ScalarBits - NarrowSize)) {
if (IsSignExt && DAG.ComputeMaxSignificantBits(Op1) <= NarrowSize) {
// Can use vwmul.
} else {
// Otherwise try to use vwmulu or vwmulsu.
APInt Mask = APInt::getBitsSetFrom(ScalarBits, NarrowSize);
if (DAG.MaskedValueIsZero(Op1, Mask))
IsVWMULSU = IsSignExt;
else
return SDValue();
}
} else if (DAG.MaskedValueIsZero(
Op1, APInt::getBitsSetFrom(ScalarBits, NarrowSize))) {
// Scalar is zero extended, if the vector is sign extended we can use
// vwmulsu. If the vector is zero extended we can use vwmulu.
IsVWMULSU = IsSignExt;
} else
return SDValue();
Op1 = DAG.getNode(RISCVISD::VMV_V_X_VL, DL, NarrowVT,
DAG.getUNDEF(NarrowVT), Op1, VL);