forked from OSchip/llvm-project
intrin.h: Fix up bugs in the cr3 and msr intrinsics
Don't include input and output regs in clobbers. Prefix some identifiers with __. Add a memory constraint to __readcr3 to prevent reordering. This constraint is heavy handed, but conservatively correct. Thanks to PaX Team for the suggestions. llvm-svn: 205778
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@ -997,23 +997,20 @@ __readmsr(unsigned long __register) {
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// undefined.
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unsigned long __edx;
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unsigned long __eax;
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__asm__ ("rdmsr"
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: "=d"(__edx), "=a"(__eax)
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: "c"(__register)
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: "%ecx", "%edx", "%eax");
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__asm__ ("rdmsr" : "=d"(__edx), "=a"(__eax) : "c"(__register));
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return (((unsigned __int64)__edx) << 32) | (unsigned __int64)__eax;
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}
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static __inline__ unsigned long __attribute__((always_inline, __nodebug__))
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__readcr3(void) {
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unsigned long value;
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__asm__ __volatile__("mov %%cr3, %0" : "=q"(value));
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return value;
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unsigned long __cr3_val;
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__asm__ __volatile__ ("mov %%cr3, %0" : "=q"(__cr3_val) : : "memory");
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return __cr3_val;
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}
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static __inline__ void __attribute__((always_inline, __nodebug__))
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__writecr3(unsigned int Data) {
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__asm__("mov %0, %%cr3" : : "q"(Data) : "memory");
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__writecr3(unsigned int __cr3_val) {
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__asm__ ("mov %0, %%cr3" : : "q"(__cr3_val) : "memory");
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}
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#ifdef __cplusplus
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