diff --git a/llvm/test/CodeGen/AArch64/GlobalISel/legalize-global-pic.mir b/llvm/test/CodeGen/AArch64/GlobalISel/legalize-global-pic.mir new file mode 100644 index 000000000000..3fbd0125b31f --- /dev/null +++ b/llvm/test/CodeGen/AArch64/GlobalISel/legalize-global-pic.mir @@ -0,0 +1,36 @@ +# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py +# RUN: llc -O0 -run-pass=legalizer --relocation-model=pic %s -o - | FileCheck %s --check-prefix=PIC + +--- | + target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128" + target triple = "aarch64--" + @var = external global i8 + define i8* @test_global() { ret i8* undef } +... +--- +name: test_global +registers: + - { id: 0, class: _ } +body: | + bb.0: + + ; We don't want to lower to G_ADD_LOW when we need a GOT access, or when the code + ; model isn't 'Small'. + + ; CHECK-LABEL: name: test_global + ; CHECK: [[ADRP:%[0-9]+]]:gpr64(p0) = ADRP target-flags(aarch64-page) @var + ; CHECK: [[ADD_LOW:%[0-9]+]]:_(p0) = G_ADD_LOW [[ADRP]](p0), target-flags(aarch64-pageoff, aarch64-nc) @var + ; CHECK: [[PTRTOINT:%[0-9]+]]:_(s64) = G_PTRTOINT [[ADD_LOW]](p0) + ; CHECK: $x0 = COPY [[PTRTOINT]](s64) + ; CMLARGE-LABEL: name: test_global + ; CMLARGE: [[GV:%[0-9]+]]:_(p0) = G_GLOBAL_VALUE @var + ; CMLARGE: [[PTRTOINT:%[0-9]+]]:_(s64) = G_PTRTOINT [[GV]](p0) + ; CMLARGE: $x0 = COPY [[PTRTOINT]](s64) + ; PIC-LABEL: name: test_global + ; PIC: [[GV:%[0-9]+]]:_(p0) = G_GLOBAL_VALUE @var + ; PIC: [[PTRTOINT:%[0-9]+]]:_(s64) = G_PTRTOINT [[GV]](p0) + ; PIC: $x0 = COPY [[PTRTOINT]](s64) + %0(p0) = G_GLOBAL_VALUE @var + %1:_(s64) = G_PTRTOINT %0 + $x0 = COPY %1 +... diff --git a/llvm/test/CodeGen/AArch64/GlobalISel/legalize-global.mir b/llvm/test/CodeGen/AArch64/GlobalISel/legalize-global.mir index 9078320d2c96..da84fb43ca93 100644 --- a/llvm/test/CodeGen/AArch64/GlobalISel/legalize-global.mir +++ b/llvm/test/CodeGen/AArch64/GlobalISel/legalize-global.mir @@ -1,12 +1,11 @@ # NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py # RUN: llc -O0 -run-pass=legalizer %s -o - | FileCheck %s -# RUN: llc -O0 -run-pass=legalizer --relocation-model=pic %s -o - | FileCheck %s --check-prefix=PIC # RUN: llc -O0 -run-pass=legalizer --code-model=large %s -o - | FileCheck %s --check-prefix=CMLARGE --- | target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128" target triple = "aarch64--" - @var = external global i8 + @var = external dso_local global i8 define i8* @test_global() { ret i8* undef } ... --- diff --git a/llvm/test/CodeGen/AArch64/GlobalISel/select-static.mir b/llvm/test/CodeGen/AArch64/GlobalISel/select-static.mir new file mode 100644 index 000000000000..7a024a434db3 --- /dev/null +++ b/llvm/test/CodeGen/AArch64/GlobalISel/select-static.mir @@ -0,0 +1,307 @@ +# RUN: llc -O0 -mtriple=aarch64 -run-pass=instruction-select -verify-machineinstrs %s -o - | FileCheck %s --check-prefixes=CHECK,LINUX-DEFAULT + +--- | + target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128" + + define void @frame_index() { + %ptr0 = alloca i64 + ret void + } + + define i8* @ptr_mask(i8* %in) { ret i8* undef } + + @var_local = global i8 0 + define i8* @global_local() { ret i8* undef } + + @var_got = external dso_local global i8 + define i8* @global_got() { ret i8* undef } + + define void @icmp() { ret void } + define void @fcmp() { ret void } + + define void @phi() { ret void } + + define void @select() { ret void } +... + +--- +# CHECK-LABEL: name: frame_index +name: frame_index +legalized: true +regBankSelected: true + +# CHECK: registers: +# CHECK-NEXT: - { id: 0, class: gpr64sp, preferred-register: '' } +registers: + - { id: 0, class: gpr } + +stack: + - { id: 0, name: ptr0, offset: 0, size: 8, alignment: 8 } + +# CHECK: body: +# CHECK: %0:gpr64sp = ADDXri %stack.0.ptr0, 0, 0 +body: | + bb.0: + %0(p0) = G_FRAME_INDEX %stack.0.ptr0 + $x0 = COPY %0(p0) +... + +--- + +--- +# CHECK-LABEL: name: ptr_mask +name: ptr_mask +legalized: true +regBankSelected: true + +# CHECK: body: +# CHECK: %2:gpr64sp = ANDXri %0, 8060 +body: | + bb.0: + liveins: $x0 + %0:gpr(p0) = COPY $x0 + %const:gpr(s64) = G_CONSTANT i64 -8 + %1:gpr(p0) = G_PTRMASK %0, %const + $x0 = COPY %1(p0) +... + +--- +# Global defined in the same linkage unit so no GOT is needed +# CHECK-LABEL: name: global_local +name: global_local +legalized: true +regBankSelected: true +registers: + - { id: 0, class: gpr } + +# CHECK: body: +# LINUX-DEFAULT: %0:gpr64 = MOVaddr target-flags(aarch64-page) @var_local, target-flags(aarch64-pageoff, aarch64-nc) @var_local +body: | + bb.0: + %0(p0) = G_GLOBAL_VALUE @var_local + $x0 = COPY %0(p0) +... + +--- +# CHECK-LABEL: name: global_got +name: global_got +legalized: true +regBankSelected: true +registers: + - { id: 0, class: gpr } + +# CHECK: body: +# LINUX-DEFAULT: %0:gpr64 = MOVaddr target-flags(aarch64-page) @var_got, target-flags(aarch64-pageoff, aarch64-nc) @var_got +body: | + bb.0: + %0(p0) = G_GLOBAL_VALUE @var_got + $x0 = COPY %0(p0) +... + +--- +# CHECK-LABEL: name: icmp +name: icmp +legalized: true +regBankSelected: true + +# CHECK: registers: +# CHECK-NEXT: - { id: 0, class: gpr32, preferred-register: '' } +# CHECK-NEXT: - { id: 1, class: gpr32, preferred-register: '' } +# CHECK-NEXT: - { id: 2, class: gpr64, preferred-register: '' } +# CHECK-NEXT: - { id: 3, class: gpr32, preferred-register: '' } +# CHECK-NEXT: - { id: 4, class: gpr64, preferred-register: '' } +# CHECK-NEXT: - { id: 5, class: gpr32, preferred-register: '' } +registers: + - { id: 0, class: gpr } + - { id: 1, class: gpr } + - { id: 2, class: gpr } + - { id: 3, class: gpr } + - { id: 4, class: gpr } + - { id: 5, class: gpr } + - { id: 6, class: gpr } + - { id: 7, class: gpr } + - { id: 8, class: gpr } + - { id: 9, class: gpr } + - { id: 10, class: gpr } + - { id: 11, class: gpr } + +# CHECK: body: +# CHECK: SUBSWrr %0, %0, implicit-def $nzcv +# CHECK: %1:gpr32 = CSINCWr $wzr, $wzr, 1, implicit $nzcv + +# CHECK: SUBSXrr %2, %2, implicit-def $nzcv +# CHECK: %3:gpr32 = CSINCWr $wzr, $wzr, 3, implicit $nzcv + +# CHECK: SUBSXrr %4, %4, implicit-def $nzcv +# CHECK: %5:gpr32 = CSINCWr $wzr, $wzr, 0, implicit $nzcv + +body: | + bb.0: + liveins: $w0, $x0 + + %0(s32) = COPY $w0 + %1(s32) = G_ICMP intpred(eq), %0, %0 + %6(s1) = G_TRUNC %1(s32) + %9(s32) = G_ANYEXT %6 + $w0 = COPY %9(s32) + + %2(s64) = COPY $x0 + %3(s32) = G_ICMP intpred(uge), %2, %2 + %7(s1) = G_TRUNC %3(s32) + %10(s32) = G_ANYEXT %7 + $w0 = COPY %10(s32) + + %4(p0) = COPY $x0 + %5(s32) = G_ICMP intpred(ne), %4, %4 + %8(s1) = G_TRUNC %5(s32) + %11(s32) = G_ANYEXT %8 + $w0 = COPY %11(s32) +... + +--- +# CHECK-LABEL: name: fcmp +name: fcmp +legalized: true +regBankSelected: true + +# CHECK: registers: +# CHECK-NEXT: - { id: 0, class: fpr32, preferred-register: '' } +# CHECK-NEXT: - { id: 1, class: gpr32, preferred-register: '' } +# CHECK-NEXT: - { id: 2, class: fpr64, preferred-register: '' } +# CHECK-NEXT: - { id: 3, class: gpr32, preferred-register: '' } +# CHECK-NEXT: - { id: 4, class: gpr32, preferred-register: '' } +# CHECK-NEXT: - { id: 5, class: gpr32, preferred-register: '' } +registers: + - { id: 0, class: fpr } + - { id: 1, class: gpr } + - { id: 2, class: fpr } + - { id: 3, class: gpr } + - { id: 4, class: gpr } + - { id: 5, class: gpr } + - { id: 6, class: gpr } + - { id: 7, class: gpr } + +# CHECK: body: +# CHECK: FCMPSrr %0, %0, implicit-def $nzcv +# CHECK: [[TST_MI:%[0-9]+]]:gpr32 = CSINCWr $wzr, $wzr, 5, implicit $nzcv +# CHECK: [[TST_GT:%[0-9]+]]:gpr32 = CSINCWr $wzr, $wzr, 13, implicit $nzcv +# CHECK: %1:gpr32 = ORRWrr [[TST_MI]], [[TST_GT]] + +# CHECK: FCMPDrr %2, %2, implicit-def $nzcv +# CHECK: %3:gpr32 = CSINCWr $wzr, $wzr, 4, implicit $nzcv + +body: | + bb.0: + liveins: $w0, $x0 + + %0(s32) = COPY $s0 + %1(s32) = G_FCMP floatpred(one), %0, %0 + %4(s1) = G_TRUNC %1(s32) + %6(s32) = G_ANYEXT %4 + $w0 = COPY %6(s32) + + %2(s64) = COPY $d0 + %3(s32) = G_FCMP floatpred(uge), %2, %2 + %5(s1) = G_TRUNC %3(s32) + %7(s32) = G_ANYEXT %5 + $w0 = COPY %7(s32) + +... + +--- +# CHECK-LABEL: name: phi +name: phi +legalized: true +regBankSelected: true +tracksRegLiveness: true + +# CHECK: registers: +# CHECK-NEXT: - { id: 0, class: fpr32, preferred-register: '' } +# CHECK-NEXT: - { id: 1, class: gpr, preferred-register: '' } +# CHECK-NEXT: - { id: 2, class: fpr32, preferred-register: '' } +# CHECK-NEXT: - { id: 3, class: gpr32, preferred-register: '' } +registers: + - { id: 0, class: fpr } + - { id: 1, class: gpr } + - { id: 2, class: fpr } + +# CHECK: body: +# CHECK: bb.1: +# CHECK: %2:fpr32 = PHI %0, %bb.0, %2, %bb.1 + +body: | + bb.0: + liveins: $s0, $w0 + successors: %bb.1 + %0(s32) = COPY $s0 + %3:gpr(s32) = COPY $w0 + %1(s1) = G_TRUNC %3 + + bb.1: + successors: %bb.1, %bb.2 + %2(s32) = PHI %0, %bb.0, %2, %bb.1 + G_BRCOND %1, %bb.1 + + bb.2: + $s0 = COPY %2 + RET_ReallyLR implicit $s0 +... + +--- +# CHECK-LABEL: name: select +name: select +legalized: true +regBankSelected: true +tracksRegLiveness: true + +# CHECK: registers: +# CHECK-NEXT: - { id: 0, class: gpr32, preferred-register: '' } +# CHECK-NEXT: - { id: 1, class: gpr32, preferred-register: '' } +# CHECK-NEXT: - { id: 2, class: gpr32, preferred-register: '' } +# CHECK-NEXT: - { id: 3, class: gpr32, preferred-register: '' } +# CHECK-NEXT: - { id: 4, class: gpr64, preferred-register: '' } +# CHECK-NEXT: - { id: 5, class: gpr64, preferred-register: '' } +# CHECK-NEXT: - { id: 6, class: gpr64, preferred-register: '' } +# CHECK-NEXT: - { id: 7, class: gpr64, preferred-register: '' } +# CHECK-NEXT: - { id: 8, class: gpr64, preferred-register: '' } +# CHECK-NEXT: - { id: 9, class: gpr64, preferred-register: '' } +registers: + - { id: 0, class: gpr } + - { id: 1, class: gpr } + - { id: 2, class: gpr } + - { id: 3, class: gpr } + - { id: 4, class: gpr } + - { id: 5, class: gpr } + - { id: 6, class: gpr } + - { id: 7, class: gpr } + - { id: 8, class: gpr } + - { id: 9, class: gpr } + +# CHECK: body: +# CHECK: ANDSWri %10, 0, implicit-def $nzcv +# CHECK: %3:gpr32 = CSELWr %1, %2, 1, implicit $nzcv +# CHECK: ANDSWri %10, 0, implicit-def $nzcv +# CHECK: %6:gpr64 = CSELXr %4, %5, 1, implicit $nzcv +# CHECK: ANDSWri %10, 0, implicit-def $nzcv +# CHECK: %9:gpr64 = CSELXr %7, %8, 1, implicit $nzcv +body: | + bb.0: + liveins: $w0, $w1, $w2 + %10:gpr(s32) = COPY $w0 + %0(s1) = G_TRUNC %10 + + %1(s32) = COPY $w1 + %2(s32) = COPY $w2 + %3(s32) = G_SELECT %0, %1, %2 + $w0 = COPY %3(s32) + + %4(s64) = COPY $x0 + %5(s64) = COPY $x1 + %6(s64) = G_SELECT %0, %4, %5 + $x0 = COPY %6(s64) + + %7(p0) = COPY $x0 + %8(p0) = COPY $x1 + %9(p0) = G_SELECT %0, %7, %8 + $x0 = COPY %9(p0) +... diff --git a/llvm/test/CodeGen/AArch64/GlobalISel/select.mir b/llvm/test/CodeGen/AArch64/GlobalISel/select.mir index a75d1784e1ca..f8e65c76568b 100644 --- a/llvm/test/CodeGen/AArch64/GlobalISel/select.mir +++ b/llvm/test/CodeGen/AArch64/GlobalISel/select.mir @@ -1,5 +1,4 @@ # RUN: llc -O0 -mtriple=aarch64-apple-ios -run-pass=instruction-select -verify-machineinstrs %s -o - | FileCheck %s -check-prefix=CHECK -check-prefix=IOS -# RUN: llc -O0 -mtriple=aarch64-linux-gnu -run-pass=instruction-select -verify-machineinstrs %s -o - | FileCheck %s -check-prefix=CHECK -check-prefix=LINUX-DEFAULT # RUN: llc -O0 -mtriple=aarch64-linux-gnu -relocation-model=pic -run-pass=instruction-select -verify-machineinstrs %s -o - | FileCheck %s -check-prefix=CHECK -check-prefix=LINUX-PIC --- | @@ -78,7 +77,6 @@ registers: # CHECK: body: # IOS: %0:gpr64 = MOVaddr target-flags(aarch64-page) @var_local, target-flags(aarch64-pageoff, aarch64-nc) @var_local -# LINUX-DEFAULT: %0:gpr64 = MOVaddr target-flags(aarch64-page) @var_local, target-flags(aarch64-pageoff, aarch64-nc) @var_local # LINUX-PIC: %0:gpr64 = LOADgot target-flags(aarch64-got) @var_local body: | bb.0: @@ -96,7 +94,6 @@ registers: # CHECK: body: # IOS: %0:gpr64 = LOADgot target-flags(aarch64-got) @var_got -# LINUX-DEFAULT: %0:gpr64 = MOVaddr target-flags(aarch64-page) @var_got, target-flags(aarch64-pageoff, aarch64-nc) @var_got # LINUX-PIC: %0:gpr64 = LOADgot target-flags(aarch64-got) @var_got body: | bb.0: diff --git a/llvm/test/CodeGen/AArch64/GlobalISel/widen-narrow-tbz-tbnz.mir b/llvm/test/CodeGen/AArch64/GlobalISel/widen-narrow-tbz-tbnz.mir index 0794e2a3e58a..816514977319 100644 --- a/llvm/test/CodeGen/AArch64/GlobalISel/widen-narrow-tbz-tbnz.mir +++ b/llvm/test/CodeGen/AArch64/GlobalISel/widen-narrow-tbz-tbnz.mir @@ -4,7 +4,7 @@ # Test widening and narrowing on test bit operations using subregister copies # or SUBREG_TO_REG. --- | - @glob = external unnamed_addr global i1, align 4 + @glob = external dso_local unnamed_addr global i1, align 4 define void @s1_no_copy() { ret void } define void @s16_no_copy() { ret void } define void @p0_no_copy() { ret void } diff --git a/llvm/test/CodeGen/AArch64/arm64-storebytesmerge.ll b/llvm/test/CodeGen/AArch64/arm64-storebytesmerge.ll index b3efd9ece1a7..bb65e73c4943 100644 --- a/llvm/test/CodeGen/AArch64/arm64-storebytesmerge.ll +++ b/llvm/test/CodeGen/AArch64/arm64-storebytesmerge.ll @@ -11,7 +11,7 @@ ; CHECK: stp xzr, xzr, [x8] ; CHECK: bl f -@q = external unnamed_addr global i16*, align 8 +@q = external dso_local unnamed_addr global i16*, align 8 ; Function Attrs: nounwind define void @test() local_unnamed_addr #0 { diff --git a/llvm/test/CodeGen/AArch64/elf-globals-pic.ll b/llvm/test/CodeGen/AArch64/elf-globals-pic.ll new file mode 100644 index 000000000000..9e4a5762203f --- /dev/null +++ b/llvm/test/CodeGen/AArch64/elf-globals-pic.ll @@ -0,0 +1,72 @@ +; RUN: llc -mtriple=arm64 -relocation-model=pic -o - %s -mcpu=cyclone | FileCheck %s --check-prefix=CHECK-PIC +; RUN: llc -mtriple=arm64 -O0 -fast-isel -relocation-model=pic -o - %s -mcpu=cyclone | FileCheck %s --check-prefix=CHECK-FAST-PIC + +@var8 = external global i8, align 1 +@var16 = external global i16, align 2 +@var32 = external global i32, align 4 +@var64 = external global i64, align 8 + +define i8 @test_i8(i8 %new) { + %val = load i8, i8* @var8, align 1 + store i8 %new, i8* @var8 + ret i8 %val +; CHECK-PIC-LABEL: test_i8: +; CHECK-PIC: adrp x[[HIREG:[0-9]+]], :got:var8 +; CHECK-PIC: ldr x[[VAR_ADDR:[0-9]+]], [x[[HIREG]], :got_lo12:var8] +; CHECK-PIC: ldrb {{w[0-9]+}}, [x[[VAR_ADDR]]] + +; CHECK-FAST-PIC: adrp x[[HIREG:[0-9]+]], :got:var8 +; CHECK-FAST-PIC: ldr x[[VARADDR:[0-9]+]], [x[[HIREG]], :got_lo12:var8] +; CHECK-FAST-PIC: ldr {{w[0-9]+}}, [x[[VARADDR]]] +} + +define i16 @test_i16(i16 %new) { + %val = load i16, i16* @var16, align 2 + store i16 %new, i16* @var16 + ret i16 %val +} + +define i32 @test_i32(i32 %new) { + %val = load i32, i32* @var32, align 4 + store i32 %new, i32* @var32 + ret i32 %val +} + +define i64 @test_i64(i64 %new) { + %val = load i64, i64* @var64, align 8 + store i64 %new, i64* @var64 + ret i64 %val +} + +define i64* @test_addr() { + ret i64* @var64 +} + +@hiddenvar = hidden global i32 0, align 4 +@protectedvar = protected global i32 0, align 4 + +define i32 @test_vis() { + %lhs = load i32, i32* @hiddenvar, align 4 + %rhs = load i32, i32* @protectedvar, align 4 + %ret = add i32 %lhs, %rhs + ret i32 %ret +; CHECK-PIC-LABEL: test_vis: +; CHECK-PIC: adrp {{x[0-9]+}}, hiddenvar +; CHECK-PIC: ldr {{w[0-9]+}}, [{{x[0-9]+}}, :lo12:hiddenvar] +; CHECK-PIC: adrp {{x[0-9]+}}, protectedvar +; CHECK-PIC: ldr {{w[0-9]+}}, [{{x[0-9]+}}, :lo12:protectedvar] +} + +@var_default = external global [2 x i32] + +define i32 @test_default_align() { + %addr = getelementptr [2 x i32], [2 x i32]* @var_default, i32 0, i32 0 + %val = load i32, i32* %addr + ret i32 %val +} + +define i64 @test_default_unaligned() { + %addr = bitcast [2 x i32]* @var_default to i64* + %val = load i64, i64* %addr + ret i64 %val +} diff --git a/llvm/test/CodeGen/AArch64/arm64-elf-globals.ll b/llvm/test/CodeGen/AArch64/elf-globals-static.ll similarity index 61% rename from llvm/test/CodeGen/AArch64/arm64-elf-globals.ll rename to llvm/test/CodeGen/AArch64/elf-globals-static.ll index 50064ddf5000..928ec70af0b1 100644 --- a/llvm/test/CodeGen/AArch64/arm64-elf-globals.ll +++ b/llvm/test/CodeGen/AArch64/elf-globals-static.ll @@ -1,16 +1,10 @@ -; RUN: llc -mtriple=arm64-linux-gnu -o - %s -mcpu=cyclone | FileCheck %s -; RUN: llc -mtriple=arm64-linux-gnu -o - %s -O0 -fast-isel -mcpu=cyclone | FileCheck %s --check-prefix=CHECK-FAST -; RUN: llc -mtriple=arm64-linux-gnu -relocation-model=pic -o - %s -mcpu=cyclone | FileCheck %s --check-prefix=CHECK-PIC -; RUN: llc -mtriple=arm64-linux-gnu -O0 -fast-isel -relocation-model=pic -o - %s -mcpu=cyclone | FileCheck %s --check-prefix=CHECK-FAST-PIC -; RUN: llc -mtriple=aarch64-fuchsia -o - %s -mcpu=cyclone | FileCheck %s -; RUN: llc -mtriple=aarch64-fuchsia -o - %s -O0 -fast-isel -mcpu=cyclone | FileCheck %s --check-prefix=CHECK-FAST -; RUN: llc -mtriple=aarch64-fuchsia -relocation-model=pic -o - %s -mcpu=cyclone | FileCheck %s --check-prefix=CHECK-PIC -; RUN: llc -mtriple=aarch64-fuchsia -O0 -fast-isel -relocation-model=pic -o - %s -mcpu=cyclone | FileCheck %s --check-prefix=CHECK-FAST-PIC +; RUN: llc -mtriple=arm64 -o - %s -mcpu=cyclone | FileCheck %s +; RUN: llc -mtriple=arm64 -o - %s -O0 -fast-isel -mcpu=cyclone | FileCheck %s --check-prefix=CHECK-FAST -@var8 = external global i8, align 1 -@var16 = external global i16, align 2 -@var32 = external global i32, align 4 -@var64 = external global i64, align 8 +@var8 = external dso_local global i8, align 1 +@var16 = external dso_local global i16, align 2 +@var32 = external dso_local global i32, align 4 +@var64 = external dso_local global i64, align 8 define i8 @test_i8(i8 %new) { %val = load i8, i8* @var8, align 1 @@ -21,17 +15,8 @@ define i8 @test_i8(i8 %new) { ; CHECK: ldrb {{w[0-9]+}}, [x[[HIREG]], :lo12:var8] ; CHECK: strb {{w[0-9]+}}, [x[[HIREG]], :lo12:var8] -; CHECK-PIC-LABEL: test_i8: -; CHECK-PIC: adrp x[[HIREG:[0-9]+]], :got:var8 -; CHECK-PIC: ldr x[[VAR_ADDR:[0-9]+]], [x[[HIREG]], :got_lo12:var8] -; CHECK-PIC: ldrb {{w[0-9]+}}, [x[[VAR_ADDR]]] - ; CHECK-FAST: adrp x[[HIREG:[0-9]+]], var8 ; CHECK-FAST: ldrb {{w[0-9]+}}, [x[[HIREG]], :lo12:var8] - -; CHECK-FAST-PIC: adrp x[[HIREG:[0-9]+]], :got:var8 -; CHECK-FAST-PIC: ldr x[[VARADDR:[0-9]+]], [x[[HIREG]], :got_lo12:var8] -; CHECK-FAST-PIC: ldr {{w[0-9]+}}, [x[[VARADDR]]] } define i16 @test_i16(i16 %new) { @@ -91,13 +76,9 @@ define i32 @test_vis() { %rhs = load i32, i32* @protectedvar, align 4 %ret = add i32 %lhs, %rhs ret i32 %ret -; CHECK-PIC: adrp {{x[0-9]+}}, hiddenvar -; CHECK-PIC: ldr {{w[0-9]+}}, [{{x[0-9]+}}, :lo12:hiddenvar] -; CHECK-PIC: adrp {{x[0-9]+}}, protectedvar -; CHECK-PIC: ldr {{w[0-9]+}}, [{{x[0-9]+}}, :lo12:protectedvar] } -@var_default = external global [2 x i32] +@var_default = external dso_local global [2 x i32] define i32 @test_default_align() { %addr = getelementptr [2 x i32], [2 x i32]* @var_default, i32 0, i32 0 diff --git a/llvm/test/CodeGen/ARM/fast-isel.ll b/llvm/test/CodeGen/ARM/fast-isel.ll index 3661beab5c02..272996893925 100644 --- a/llvm/test/CodeGen/ARM/fast-isel.ll +++ b/llvm/test/CodeGen/ARM/fast-isel.ll @@ -161,9 +161,9 @@ define void @test4() { ; ARM-ELF: movw [[REG:r[0-9]+]], :lower16:test4g ; ARM-ELF: movt [[REG]], :upper16:test4g -; ARM: ldr [[REG1:r[0-9]+]], {{\[}}[[REG]]] -; ARM: add [[REG2:r[0-9]+]], [[REG1]], #1 -; ARM: str [[REG2]], {{\[}}[[REG]]] +; ARM: ldr r0, [r1] +; ARM: add r0, r0, #1 +; ARM: str r0, [r1] } ; ARM: @urem_fold diff --git a/llvm/test/CodeGen/WebAssembly/address-offsets.ll b/llvm/test/CodeGen/WebAssembly/address-offsets.ll index 7fe40a1dbec6..f84b377c1a15 100644 --- a/llvm/test/CodeGen/WebAssembly/address-offsets.ll +++ b/llvm/test/CodeGen/WebAssembly/address-offsets.ll @@ -1,4 +1,3 @@ -; RUN: llc < %s -asm-verbose=false -disable-wasm-fallthrough-return-opt -wasm-disable-explicit-locals -wasm-keep-registers | FileCheck %s -check-prefixes=CHECK,NON-PIC ; RUN: llc < %s -asm-verbose=false -disable-wasm-fallthrough-return-opt -wasm-disable-explicit-locals -wasm-keep-registers -relocation-model=pic | FileCheck %s -check-prefixes=CHECK,PIC @@ -12,8 +11,6 @@ target triple = "wasm32-unknown-emscripten" ; CHECK-LABEL: load_test0: ; CHECK-NEXT: .functype load_test0 () -> (i32){{$}} -; NON-PIC-NEXT: i32.const $push0=, 0{{$}} -; NON-PIC-NEXT: i32.load $push1=, g+40($pop0){{$}} ; PIC-NEXT: global.get $push0=, g@GOT{{$}} ; PIC-NEXT: i32.load $push1=, 40($pop0){{$}} ; CHECK-NEXT: return $pop1{{$}} @@ -24,8 +21,6 @@ define i32 @load_test0() { ; CHECK-LABEL: load_test0_noinbounds: ; CHECK-NEXT: .functype load_test0_noinbounds () -> (i32){{$}} -; NON-PIC-NEXT: i32.const $push0=, 0{{$}} -; NON-PIC-NEXT: i32.load $push1=, g+40($pop0){{$}} ; PIC-NEXT: global.get $push0=, g@GOT{{$}} ; PIC-NEXT: i32.load $push1=, 40($pop0){{$}} ; CHECK-NEXT: return $pop1{{$}} @@ -142,9 +137,6 @@ define i32 @load_test8(i32 %n) { ; CHECK-LABEL: load_test9: ; CHECK-NEXT: .functype load_test9 () -> (i32){{$}} -; NON-PIC-NEXT: i32.const $push0=, 0{{$}} -; NON-PIC-NEXT: i32.load $push1=, g-40($pop0){{$}} -; NON-PIC_NEXT: return $pop1{{$}} ; PIC-NEXT: global.get $push1=, g@GOT{{$}} ; PIC-NEXT: i32.const $push0=, -40{{$}} @@ -158,12 +150,6 @@ define i32 @load_test9() { ; CHECK-LABEL: load_test10: ; CHECK-NEXT: .functype load_test10 (i32) -> (i32){{$}} -; NON-PIC-NEXT: i32.const $push0=, 2{{$}} -; NON-PIC-NEXT: i32.shl $push1=, $0, $pop0{{$}} -; NON-PIC-NEXT: i32.const $push2=, g-40{{$}} -; NON-PIC-NEXT: i32.add $push3=, $pop1, $pop2{{$}} -; NON-PIC-NEXT: i32.load $push4=, 0($pop3){{$}} -; NON-PIC-NEXT: return $pop4{{$}} ; PIC-NEXT: i32.const $push0=, 2{{$}} ; PIC-NEXT: i32.shl $push1=, $0, $pop0{{$}} @@ -356,8 +342,6 @@ define i32 @load_test21(i32* %p, i32 %n) { ; CHECK-LABEL: store_test0: ; CHECK-NEXT: .functype store_test0 (i32) -> (){{$}} -; NON-PIC-NEXT: i32.const $push0=, 0{{$}} -; NON-PIC-NEXT: i32.store g+40($pop0), $0{{$}} ; PIC-NEXT: global.get $push0=, g@GOT{{$}} ; PIC-NEXT: i32.store 40($pop0), $0 ; CHECK-NEXT: return{{$}} @@ -368,8 +352,6 @@ define void @store_test0(i32 %i) { ; CHECK-LABEL: store_test0_noinbounds: ; CHECK-NEXT: .functype store_test0_noinbounds (i32) -> (){{$}} -; NON-PIC-NEXT: i32.const $push0=, 0{{$}} -; NON-PIC-NEXT: i32.store g+40($pop0), $0{{$}} ; PIC-NEXT: global.get $push0=, g@GOT{{$}} ; PIC-NEXT: i32.store 40($pop0), $0{{$}} ; CHECK-NEXT: return{{$}} @@ -380,8 +362,6 @@ define void @store_test0_noinbounds(i32 %i) { ; CHECK-LABEL: store_test1: ; CHECK-NEXT: .functype store_test1 (i32, i32) -> (){{$}} -; NON-PIC-NEXT: i32.const $push0=, 2{{$}} -; NON-PIC-NEXT: i32.shl $push1=, $0, $pop0{{$}} ; CHECK-NEX T: i32.store g+40($pop1), $1{{$}} ; CHECK-NEX T: return{{$}} define void @store_test1(i32 %n, i32 %i) { @@ -393,8 +373,6 @@ define void @store_test1(i32 %n, i32 %i) { ; CHECK-LABEL: store_test2: ; CHECK-NEXT: .functype store_test2 (i32, i32) -> (){{$}} -; NON-PIC-NEXT: i32.const $push0=, 2{{$}} -; NON-PIC-NEXT: i32.shl $push1=, $0, $pop0{{$}} ; CHECK-NEX T: i32.store g+40($pop1), $1{{$}} ; CHECK-NEX T: return{{$}} define void @store_test2(i32 %n, i32 %i) { @@ -406,8 +384,6 @@ define void @store_test2(i32 %n, i32 %i) { ; CHECK-LABEL: store_test3: ; CHECK-NEXT: .functype store_test3 (i32, i32) -> (){{$}} -; NON-PIC-NEXT: i32.const $push0=, 2{{$}} -; NON-PIC-NEXT: i32.shl $push1=, $0, $pop0{{$}} ; CHECK-NEX T: i32.store g+40($pop1), $1{{$}} ; CHECK-NEX T: return{{$}} define void @store_test3(i32 %n, i32 %i) { @@ -419,8 +395,6 @@ define void @store_test3(i32 %n, i32 %i) { ; CHECK-LABEL: store_test4: ; CHECK-NEXT: .functype store_test4 (i32, i32) -> (){{$}} -; NON-PIC-NEXT: i32.const $push0=, 2{{$}} -; NON-PIC-NEXT: i32.shl $push1=, $0, $pop0{{$}} ; CHECK-NEX T: i32.store g+40($pop1), $1{{$}} ; CHECK-NEX T: return{{$}} define void @store_test4(i32 %n, i32 %i) { @@ -431,8 +405,6 @@ define void @store_test4(i32 %n, i32 %i) { ; CHECK-LABEL: store_test5: ; CHECK-NEXT: .functype store_test5 (i32, i32) -> (){{$}} -; NON-PIC-NEXT: i32.const $push0=, 2{{$}} -; NON-PIC-NEXT: i32.shl $push1=, $0, $pop0{{$}} ; CHECK-NEX T: i32.store g+40($pop1), $1{{$}} ; CHECK-NEX T: return{{$}} define void @store_test5(i32 %n, i32 %i) { @@ -443,8 +415,6 @@ define void @store_test5(i32 %n, i32 %i) { ; CHECK-LABEL: store_test6: ; CHECK-NEXT: .functype store_test6 (i32, i32) -> (){{$}} -; NON-PIC-NEXT: i32.const $push0=, 2{{$}} -; NON-PIC-NEXT: i32.shl $push1=, $0, $pop0{{$}} ; CHECK-NEX T: i32.store g+40($pop1), $1{{$}} ; CHECK-NEX T: return{{$}} define void @store_test6(i32 %n, i32 %i) { @@ -456,8 +426,6 @@ define void @store_test6(i32 %n, i32 %i) { ; CHECK-LABEL: store_test7: ; CHECK-NEXT: .functype store_test7 (i32, i32) -> (){{$}} -; NON-PIC-NEXT: i32.const $push0=, 2{{$}} -; NON-PIC-NEXT: i32.shl $push1=, $0, $pop0{{$}} ; CHECK-NEX T: i32.store g+40($pop1), $1{{$}} ; CHECK-NEX T: return{{$}} define void @store_test7(i32 %n, i32 %i) { @@ -469,8 +437,6 @@ define void @store_test7(i32 %n, i32 %i) { ; CHECK-LABEL: store_test8: ; CHECK-NEXT: .functype store_test8 (i32, i32) -> (){{$}} -; NON-PIC-NEXT: i32.const $push0=, 2{{$}} -; NON-PIC-NEXT: i32.shl $push1=, $0, $pop0{{$}} ; CHECK-NEX T: i32.store g+40($pop1), $1{{$}} ; CHECK-NEX T: return{{$}} define void @store_test8(i32 %n, i32 %i) { @@ -482,8 +448,6 @@ define void @store_test8(i32 %n, i32 %i) { ; CHECK-LABEL: store_test9: ; CHECK-NEXT: .functype store_test9 (i32) -> (){{$}} -; NON-PIC-NEXT: i32.const $push0=, 0{{$}} -; NON-PIC-NEXT: i32.store g-40($pop0), $0{{$}} ; PIC-NEXT: global.get $push1=, g@GOT{{$}} ; PIC-NEXT: i32.const $push0=, -40{{$}} ; PIC-NEXT: i32.add $push2=, $pop1, $pop0{{$}} @@ -496,11 +460,6 @@ define void @store_test9(i32 %i) { ; CHECK-LABEL: store_test10: ; CHECK-NEXT: .functype store_test10 (i32, i32) -> (){{$}} -; NON-PIC-NEXT: i32.const $push0=, 2{{$}} -; NON-PIC-NEXT: i32.shl $push1=, $0, $pop0{{$}} -; NON-PIC-NEXT: i32.const $push2=, g-40{{$}} -; NON-PIC-NEXT: i32.add $push3=, $pop1, $pop2{{$}} -; NON-PIC-NEXT: i32.store 0($pop3), $1{{$}} ; PIC-NEXT: i32.const $push0=, 2{{$}} ; PIC-NEXT: i32.shl $push1=, $0, $pop0{{$}} ; PIC-NEXT: global.get $push2=, g@GOT{{$}} @@ -540,13 +499,6 @@ define void @store_test11_noinbounds(i32* %p, i32 %i) { ; CHECK-LABEL: store_test12: ; CHECK-NEXT: .functype store_test12 (i32, i32, i32) -> (){{$}} -; NON-PIC-NEXT: i32.const $push0=, 2{{$}} -; NON-PIC-NEXT: i32.shl $push1=, $1, $pop0{{$}} -; NON-PIC-NEXT: i32.add $push2=, $pop1, $0{{$}} -; NON-PIC-NEXT: i32.const $push3=, 40{{$}} -; NON-PIC-NEXT: i32.add $push4=, $pop2, $pop3{{$}} -; NON-PIC-NEXT: i32.store 0($pop4), $2{{$}} -; NON-PIC-NEXT: return{{$}} define void @store_test12(i32* %p, i32 %n, i32 %i) { %add = add nsw i32 %n, 10 %arrayidx = getelementptr inbounds i32, i32* %p, i32 %add @@ -556,13 +508,6 @@ define void @store_test12(i32* %p, i32 %n, i32 %i) { ; CHECK-LABEL: store_test13: ; CHECK-NEXT: .functype store_test13 (i32, i32, i32) -> (){{$}} -; NON-PIC-NEXT: i32.const $push0=, 2{{$}} -; NON-PIC-NEXT: i32.shl $push1=, $1, $pop0{{$}} -; NON-PIC-NEXT: i32.add $push2=, $pop1, $0{{$}} -; NON-PIC-NEXT: i32.const $push3=, 40{{$}} -; NON-PIC-NEXT: i32.add $push4=, $pop2, $pop3{{$}} -; NON-PIC-NEXT: i32.store 0($pop4), $2{{$}} -; NON-PIC-NEXT: return{{$}} define void @store_test13(i32* %p, i32 %n, i32 %i) { %add = add nsw i32 10, %n %arrayidx = getelementptr inbounds i32, i32* %p, i32 %add @@ -572,11 +517,6 @@ define void @store_test13(i32* %p, i32 %n, i32 %i) { ; CHECK-LABEL: store_test14: ; CHECK-NEXT: .functype store_test14 (i32, i32, i32) -> (){{$}} -; NON-PIC-NEXT: i32.const $push0=, 2{{$}} -; NON-PIC-NEXT: i32.shl $push1=, $1, $pop0{{$}} -; NON-PIC-NEXT: i32.add $push2=, $0, $pop1{{$}} -; NON-PIC-NEXT: i32.store 40($pop2), $2{{$}} -; NON-PIC-NEXT: return{{$}} define void @store_test14(i32* %p, i32 %n, i32 %i) { %add.ptr = getelementptr inbounds i32, i32* %p, i32 %n %add.ptr1 = getelementptr inbounds i32, i32* %add.ptr, i32 10 @@ -586,13 +526,6 @@ define void @store_test14(i32* %p, i32 %n, i32 %i) { ; CHECK-LABEL: store_test15: ; CHECK-NEXT: .functype store_test15 (i32, i32, i32) -> (){{$}} -; NON-PIC-NEXT: i32.const $push0=, 2{{$}} -; NON-PIC-NEXT: i32.shl $push1=, $1, $pop0{{$}} -; NON-PIC-NEXT: i32.add $push2=, $0, $pop1{{$}} -; NON-PIC-NEXT: i32.const $push3=, 40{{$}} -; NON-PIC-NEXT: i32.add $push4=, $pop2, $pop3{{$}} -; NON-PIC-NEXT: i32.store 0($pop4), $2{{$}} -; NON-PIC-NEXT: return{{$}} define void @store_test15(i32* %p, i32 %n, i32 %i) { %add.ptr = getelementptr inbounds i32, i32* %p, i32 10 %add.ptr1 = getelementptr inbounds i32, i32* %add.ptr, i32 %n @@ -602,13 +535,6 @@ define void @store_test15(i32* %p, i32 %n, i32 %i) { ; CHECK-LABEL: store_test16: ; CHECK-NEXT: .functype store_test16 (i32, i32, i32) -> (){{$}} -; NON-PIC-NEXT: i32.const $push0=, 2{{$}} -; NON-PIC-NEXT: i32.shl $push1=, $1, $pop0{{$}} -; NON-PIC-NEXT: i32.add $push2=, $0, $pop1{{$}} -; NON-PIC-NEXT: i32.const $push3=, 40{{$}} -; NON-PIC-NEXT: i32.add $push4=, $pop2, $pop3{{$}} -; NON-PIC-NEXT: i32.store 0($pop4), $2{{$}} -; NON-PIC-NEXT: return{{$}} define void @store_test16(i32* %p, i32 %n, i32 %i) { %add.ptr = getelementptr inbounds i32, i32* %p, i32 10 %add.ptr1 = getelementptr inbounds i32, i32* %add.ptr, i32 %n @@ -618,13 +544,6 @@ define void @store_test16(i32* %p, i32 %n, i32 %i) { ; CHECK-LABEL: store_test17: ; CHECK-NEXT: .functype store_test17 (i32, i32, i32) -> (){{$}} -; NON-PIC-NEXT: i32.const $push0=, 2{{$}} -; NON-PIC-NEXT: i32.shl $push1=, $1, $pop0{{$}} -; NON-PIC-NEXT: i32.add $push2=, $pop1, $0{{$}} -; NON-PIC-NEXT: i32.const $push3=, 40{{$}} -; NON-PIC-NEXT: i32.add $push4=, $pop2, $pop3{{$}} -; NON-PIC-NEXT: i32.store 0($pop4), $2{{$}} -; NON-PIC-NEXT: return{{$}} define void @store_test17(i32* %p, i32 %n, i32 %i) { %add = add nsw i32 %n, 10 %add.ptr = getelementptr inbounds i32, i32* %p, i32 %add @@ -634,11 +553,6 @@ define void @store_test17(i32* %p, i32 %n, i32 %i) { ; CHECK-LABEL: store_test18: ; CHECK-NEXT: .functype store_test18 (i32, i32, i32) -> (){{$}} -; NON-PIC-NEXT: i32.const $push0=, 2{{$}} -; NON-PIC-NEXT: i32.shl $push1=, $1, $pop0{{$}} -; NON-PIC-NEXT: i32.add $push2=, $0, $pop1{{$}} -; NON-PIC-NEXT: i32.store 40($pop2), $2{{$}} -; NON-PIC-NEXT: return{{$}} define void @store_test18(i32* %p, i32 %n, i32 %i) { %add.ptr = getelementptr inbounds i32, i32* %p, i32 %n %add.ptr1 = getelementptr inbounds i32, i32* %add.ptr, i32 10 @@ -648,13 +562,6 @@ define void @store_test18(i32* %p, i32 %n, i32 %i) { ; CHECK-LABEL: store_test19: ; CHECK-NEXT: .functype store_test19 (i32, i32, i32) -> (){{$}} -; NON-PIC-NEXT: i32.const $push0=, 2{{$}} -; NON-PIC-NEXT: i32.shl $push1=, $1, $pop0{{$}} -; NON-PIC-NEXT: i32.add $push2=, $pop1, $0{{$}} -; NON-PIC-NEXT: i32.const $push3=, 40{{$}} -; NON-PIC-NEXT: i32.add $push4=, $pop2, $pop3{{$}} -; NON-PIC-NEXT: i32.store 0($pop4), $2{{$}} -; NON-PIC-NEXT: return{{$}} define void @store_test19(i32* %p, i32 %n, i32 %i) { %add = add nsw i32 10, %n %add.ptr = getelementptr inbounds i32, i32* %p, i32 %add @@ -664,10 +571,6 @@ define void @store_test19(i32* %p, i32 %n, i32 %i) { ; CHECK-LABEL: store_test20: ; CHECK-NEXT: .functype store_test20 (i32, i32) -> (){{$}} -; NON-PIC-NEXT: i32.const $push0=, -40{{$}} -; NON-PIC-NEXT: i32.add $push1=, $0, $pop0{{$}} -; NON-PIC-NEXT: i32.store 0($pop1), $1{{$}} -; NON-PIC-NEXT: return{{$}} define void @store_test20(i32* %p, i32 %i) { %arrayidx = getelementptr inbounds i32, i32* %p, i32 -10 store i32 %i, i32* %arrayidx, align 4 @@ -676,13 +579,6 @@ define void @store_test20(i32* %p, i32 %i) { ; CHECK-LABEL: store_test21: ; CHECK-NEXT: .functype store_test21 (i32, i32, i32) -> (){{$}} -; NON-PIC-NEXT: i32.const $push0=, 2{{$}} -; NON-PIC-NEXT: i32.shl $push1=, $1, $pop0{{$}} -; NON-PIC-NEXT: i32.add $push2=, $pop1, $0{{$}} -; NON-PIC-NEXT: i32.const $push3=, -40{{$}} -; NON-PIC-NEXT: i32.add $push4=, $pop2, $pop3{{$}} -; NON-PIC-NEXT: i32.store 0($pop4), $2{{$}} -; NON-PIC-NEXT: return{{$}} define void @store_test21(i32* %p, i32 %n, i32 %i) { %add = add nsw i32 %n, -10 %arrayidx = getelementptr inbounds i32, i32* %p, i32 %add diff --git a/llvm/test/CodeGen/WebAssembly/exception.ll b/llvm/test/CodeGen/WebAssembly/exception.ll index d6a636019838..8944649b6dc4 100644 --- a/llvm/test/CodeGen/WebAssembly/exception.ll +++ b/llvm/test/CodeGen/WebAssembly/exception.ll @@ -1,4 +1,3 @@ -; RUN: not --crash llc < %s -asm-verbose=false -disable-wasm-fallthrough-return-opt -wasm-keep-registers -exception-model=wasm ; RUN: llc < %s -asm-verbose=false -disable-wasm-fallthrough-return-opt -wasm-disable-explicit-locals -wasm-keep-registers -exception-model=wasm -mattr=+exception-handling -verify-machineinstrs | FileCheck -allow-deprecated-dag-overlap %s ; RUN: llc < %s -disable-wasm-fallthrough-return-opt -wasm-keep-registers -exception-model=wasm -mattr=+exception-handling @@ -7,7 +6,7 @@ target triple = "wasm32-unknown-unknown" %struct.Temp = type { i8 } -@_ZTIi = external constant i8* +@_ZTIi = external dso_local constant i8* ; CHECK-LABEL: test_throw: ; CHECK: throw __cpp_exception, $0 @@ -39,7 +38,7 @@ define void @test_throw(i8* %p) { ; CHECK: end_block ; CHECK: extract_exception $[[EXN:[0-9]+]]= ; CHECK-DAG: i32.store __wasm_lpad_context -; CHECK-DAG: i32.store __wasm_lpad_context+4 +; CHECK-DAG: i32.store __wasm_lpad_context{{.+}} ; CHECK: call $drop=, _Unwind_CallPersonality, $[[EXN]] ; CHECK: block ; CHECK: br_if 0