forked from OSchip/llvm-project
[RegBankSelect] Improve debug output.
Add verbose information when checking if the current and the desired register banks match. Detail what happens when we assign a register bank. llvm-svn: 265804
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@ -45,7 +45,14 @@ bool RegBankSelect::assignmentMatch(
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if (ValMapping.BreakDown.size() > 1)
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if (ValMapping.BreakDown.size() > 1)
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return false;
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return false;
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return RBI->getRegBank(Reg, *MRI, *TRI) == ValMapping.BreakDown[0].RegBank;
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const RegisterBank *CurRegBank = RBI->getRegBank(Reg, *MRI, *TRI);
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const RegisterBank *DesiredRegBrank = ValMapping.BreakDown[0].RegBank;
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DEBUG(dbgs() << "Does assignment already match: ";
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if (CurRegBank) dbgs() << *CurRegBank; else dbgs() << "none";
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dbgs() << " against ";
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assert(DesiredRegBrank && "The mapping must be valid");
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dbgs() << *DesiredRegBrank << '\n';);
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return CurRegBank == DesiredRegBrank;
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}
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}
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unsigned
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unsigned
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@ -116,6 +123,8 @@ void RegBankSelect::assignInstr(MachineInstr &MI) {
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// If that is not the case, this means the code was broken before
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// If that is not the case, this means the code was broken before
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// hands because we should have found that the assignment match.
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// hands because we should have found that the assignment match.
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// This will not hold when we will consider alternative mappings.
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// This will not hold when we will consider alternative mappings.
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DEBUG(dbgs() << "Assign: " << *ValMapping.BreakDown[0].RegBank << " to "
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<< PrintReg(Reg) << '\n');
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MRI->setRegBank(Reg, *ValMapping.BreakDown[0].RegBank);
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MRI->setRegBank(Reg, *ValMapping.BreakDown[0].RegBank);
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MO.setReg(Reg);
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MO.setReg(Reg);
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}
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}
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