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[mips] Add support for COP0's Branch-On-Cond-Likely instructions 

Reviewers: dsanders

Reviewed By: dsanders

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D5782

llvm-svn: 220036
This commit is contained in:
Vasileios Kalintiris 2014-10-17 12:38:35 +00:00
parent dd38c0b876
commit 6d1e64896d
16 changed files with 217 additions and 30 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

31
llvm/lib/Target/Mips/MipsInstrInfo.td
View File

@ -674,26 +674,26 @@ class StoreLeftRight<string opstr, SDNode OpNode, RegisterOperand RO,
// Conditional Branch
class CBranch<string opstr, DAGOperand opnd, PatFrag cond_op,
RegisterOperand RO> :
RegisterOperand RO, bit DelaySlot = 1> :
InstSE<(outs), (ins RO:$rs, RO:$rt, opnd:$offset),
!strconcat(opstr, "\t$rs, $rt, $offset"),
[(brcond (i32 (cond_op RO:$rs, RO:$rt)), bb:$offset)], IIBranch,
FrmI, opstr> {
let isBranch = 1;
let isTerminator = 1;
let hasDelaySlot = 1;
let hasDelaySlot = DelaySlot;
let Defs = [AT];
}
class CBranchZero<string opstr, DAGOperand opnd, PatFrag cond_op,
RegisterOperand RO> :
RegisterOperand RO, bit DelaySlot = 1> :
InstSE<(outs), (ins RO:$rs, opnd:$offset),
!strconcat(opstr, "\t$rs, $offset"),
[(brcond (i32 (cond_op RO:$rs, 0)), bb:$offset)], IIBranch,
FrmI, opstr> {
let isBranch = 1;
let isTerminator = 1;
let hasDelaySlot = 1;
let hasDelaySlot = DelaySlot;
let Defs = [AT];
}
@ -765,9 +765,12 @@ let isCall=1, hasDelaySlot=1, Defs = [RA] in {
InstSE<(outs RO:$rd), (ins RO:$rs), !strconcat(opstr, "\t$rd, $rs"),
[], IIBranch, FrmR>;
class BGEZAL_FT<string opstr, DAGOperand opnd, RegisterOperand RO> :
class BGEZAL_FT<string opstr, DAGOperand opnd,
RegisterOperand RO, bit DelaySlot = 1> :
InstSE<(outs), (ins RO:$rs, opnd:$offset),
!strconcat(opstr, "\t$rs, $offset"), [], IIBranch, FrmI, opstr>;
!strconcat(opstr, "\t$rs, $offset"), [], IIBranch, FrmI, opstr> {
let hasDelaySlot = DelaySlot;
}
}
@ -1194,15 +1197,27 @@ def J : MMRel, JumpFJ<jmptarget, "j", br, bb, "j">, FJ<2>,
AdditionalRequires<[RelocStatic]>, IsBranch;
def JR : MMRel, IndirectBranch<"jr", GPR32Opnd>, MTLO_FM<8>;
def BEQ : MMRel, CBranch<"beq", brtarget, seteq, GPR32Opnd>, BEQ_FM<4>;
def BEQL : MMRel, CBranch<"beql", brtarget, seteq, GPR32Opnd, 0>,
BEQ_FM<20>, ISA_MIPS2_NOT_32R6_64R6;
def BNE : MMRel, CBranch<"bne", brtarget, setne, GPR32Opnd>, BEQ_FM<5>;
def BNEL : MMRel, CBranch<"bnel", brtarget, setne, GPR32Opnd, 0>,
BEQ_FM<21>, ISA_MIPS2_NOT_32R6_64R6;
def BGEZ : MMRel, CBranchZero<"bgez", brtarget, setge, GPR32Opnd>,
BGEZ_FM<1, 1>;
def BGEZL : MMRel, CBranchZero<"bgezl", brtarget, setge, GPR32Opnd, 0>,
BGEZ_FM<1, 3>, ISA_MIPS2_NOT_32R6_64R6;
def BGTZ : MMRel, CBranchZero<"bgtz", brtarget, setgt, GPR32Opnd>,
BGEZ_FM<7, 0>;
def BGTZL : MMRel, CBranchZero<"bgtzl", brtarget, setgt, GPR32Opnd, 0>,
BGEZ_FM<23, 0>, ISA_MIPS2_NOT_32R6_64R6;
def BLEZ : MMRel, CBranchZero<"blez", brtarget, setle, GPR32Opnd>,
BGEZ_FM<6, 0>;
def BLEZL : MMRel, CBranchZero<"blezl", brtarget, setle, GPR32Opnd, 0>,
BGEZ_FM<22, 0>, ISA_MIPS2_NOT_32R6_64R6;
def BLTZ : MMRel, CBranchZero<"bltz", brtarget, setlt, GPR32Opnd>,
BGEZ_FM<1, 0>;
def BLTZL : MMRel, CBranchZero<"bltzl", brtarget, setlt, GPR32Opnd, 0>,
BGEZ_FM<1, 2>, ISA_MIPS2_NOT_32R6_64R6;
def B : UncondBranch<BEQ>;
def JAL : MMRel, JumpLink<"jal", calltarget>, FJ<3>;
@ -1215,8 +1230,12 @@ let AdditionalPredicates = [NotInMicroMips] in {
def JALX : JumpLink<"jalx", calltarget>, FJ<0x1D>, ISA_MIPS32_NOT_32R6_64R6;
def BGEZAL : MMRel, BGEZAL_FT<"bgezal", brtarget, GPR32Opnd>, BGEZAL_FM<0x11>,
ISA_MIPS1_NOT_32R6_64R6;
def BGEZALL : MMRel, BGEZAL_FT<"bgezall", brtarget, GPR32Opnd, 0>,
BGEZAL_FM<0x13>, ISA_MIPS2_NOT_32R6_64R6;
def BLTZAL : MMRel, BGEZAL_FT<"bltzal", brtarget, GPR32Opnd>, BGEZAL_FM<0x10>,
ISA_MIPS1_NOT_32R6_64R6;
def BLTZALL : MMRel, BGEZAL_FT<"bltzall", brtarget, GPR32Opnd, 0>,
BGEZAL_FM<0x12>, ISA_MIPS2_NOT_32R6_64R6;
def BAL_BR : BAL_BR_Pseudo<BGEZAL>;
def TAILCALL : TailCall<J>;
def TAILCALL_R : TailCallReg<GPR32Opnd, JR>;

104
llvm/test/MC/Mips/mips-jump-delay-slots.s Normal file
View File

@ -0,0 +1,104 @@
# Verify that every branch and jump instruction is followed by a delay slot
# except for the branch likely instructions.
#
# RUN: llvm-mc %s -triple=mips-unknown-linux -mcpu=mips32r2 | FileCheck %s
.set noat
# CHECK: b 1332
# CHECK: nop
b 1332
# CHECK: bc1f 1332
# CHECK: nop
bc1f 1332
# CHECK: bc1t 1332
# CHECK: nop
bc1t 1332
# CHECK: beq $9, $6, 1332
# CHECK: nop
beq $9,$6,1332
# CHECK: bgez $6, 1332
# CHECK: nop
bgez $6,1332
# CHECK: bgezal $6, 1332
# CHECK: nop
bgezal $6,1332
# CHECK: bgtz $6, 1332
# CHECK: nop
bgtz $6,1332
# CHECK: blez $6, 1332
# CHECK: nop
blez $6,1332
# CHECK: bltz $6, 1332
# CHECK: nop
bltz $6,1332
# CHECK: bne $9, $6, 1332
# CHECK: nop
bne $9,$6,1332
# CHECK: bltzal $6, 1332
# CHECK: nop
bltzal $6,1332
# CHECK: bal 1332
# CHECK: nop
bal 1332
# CHECK: bnez $11, 1332
# CHECK: nop
bnez $11,1332
# CHECK: beqz $11, 1332
# CHECK: nop
beqz $11,1332
# CHECK: beql $9, $6, 1332
# CHECK-NOT: nop
beql $9,$6,1332
# CHECK: bnel $9, $6, 1332
# CHECK-NOT: nop
bnel $9,$6,1332
# CHECK: bgezl $6, 1332
# CHECK-NOT: nop
bgezl $6,1332
# CHECK: bgtzl $6, 1332
# CHECK-NOT: nop
bgtzl $6,1332
# CHECK: blezl $6, 1332
# CHECK-NOT: nop
blezl $6,1332
# CHECK: bltzl $6, 1332
# CHECK-NOT: nop
bltzl $6,1332
# CHECK: bgezall $6, 1332
# CHECK-NOT: nop
bgezall $6,1332
# CHECK: bltzall $6, 1332
# CHECK-NOT: nop
bltzall $6,1332
# CHECK: j 1328
# CHECK: nop
j 1328
# CHECK: jal 1328
# CHECK: nop
jal 1328
# CHECK: jalr $6
# CHECK: nop
jalr $6
# CHECK: jalr $25
# CHECK: nop
jalr $31,$25
# CHECK: jalr $10, $11
# CHECK: nop
jalr $10,$11
# CHECK: jr $7
# CHECK: nop
jr $7
# CHECK: jr $7
# CHECK: nop
j $7
# CHECK: jalr $25
# CHECK: nop
jal $25
# CHECK: jalr $4, $25
# CHECK: nop
jal $4,$25
# CHECK: jalx lab
# CHECK: nop
jalx lab

8
llvm/test/MC/Mips/mips1/invalid-mips2.s
View File

@ -5,6 +5,14 @@
# RUN: FileCheck %s < %t1
.set noat
beql $14,$s3,12544 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
bgezall $12,7293 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
bgezl $4,-6858 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
bgtzl $10,-3738 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
blezl $6,2974 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
bltzall $6,488 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
bltzl $s1,-9964 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
bnel $gp,$s4,5107 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
ceil.w.d $f11,$f25 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
ceil.w.s $f6,$f20 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
floor.w.d $f14,$f11 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled

8
llvm/test/MC/Mips/mips2/valid.s
View File

@ -24,6 +24,14 @@
bgezal $0, 21100 # CHECK: bal 21100 # encoding: [0x04,0x11,0x14,0x9b]
bgezal $6, 21100 # CHECK: bgezal $6, 21100 # encoding: [0x04,0xd1,0x14,0x9b]
bltzal $6, 21100 # CHECK: bltzal $6, 21100 # encoding: [0x04,0xd0,0x14,0x9b]
beql $14,$s3,12544 # CHECK: beql $14, $19, 12544 # encoding: [0x51,0xd3,0x0c,0x40]
bgezall $12,7293 # CHECK: bgezall $12, 7293 # encoding: [0x05,0x93,0x07,0x1f]
bgezl $4,-6858 # CHECK: bgezl $4, -6858 # encoding: [0x04,0x83,0xf9,0x4d]
bgtzl $10,-3738 # CHECK: bgtzl $10, -3738 # encoding: [0x5d,0x40,0xfc,0x59]
blezl $6,2974 # CHECK: blezl $6, 2974 # encoding: [0x58,0xc0,0x02,0xe7]
bltzall $6,488 # CHECK: bltzall $6, 488 # encoding: [0x04,0xd2,0x00,0x7a]
bltzl $s1,-9964 # CHECK: bltzl $17, -9964 # encoding: [0x06,0x22,0xf6,0x45]
bnel $gp,$s4,5107 # CHECK: bnel $gp, $20, 5107 # encoding: [0x57,0x94,0x04,0xfc]
c.ngl.d $f29,$f29
c.ngle.d $f0,$f16
c.sf.d $f30,$f0

8
llvm/test/MC/Mips/mips3/valid.s
View File

@ -24,6 +24,14 @@
bgezal $0, 21100 # CHECK: bal 21100 # encoding: [0x04,0x11,0x14,0x9b]
bgezal $6, 21100 # CHECK: bgezal $6, 21100 # encoding: [0x04,0xd1,0x14,0x9b]
bltzal $6, 21100 # CHECK: bltzal $6, 21100 # encoding: [0x04,0xd0,0x14,0x9b]
beql $14,$s3,12544 # CHECK: beql $14, $19, 12544 # encoding: [0x51,0xd3,0x0c,0x40]
bgezall $12,7293 # CHECK: bgezall $12, 7293 # encoding: [0x05,0x93,0x07,0x1f]
bgezl $4,-6858 # CHECK: bgezl $4, -6858 # encoding: [0x04,0x83,0xf9,0x4d]
bgtzl $10,-3738 # CHECK: bgtzl $10, -3738 # encoding: [0x5d,0x40,0xfc,0x59]
blezl $6,2974 # CHECK: blezl $6, 2974 # encoding: [0x58,0xc0,0x02,0xe7]
bltzall $6,488 # CHECK: bltzall $6, 488 # encoding: [0x04,0xd2,0x00,0x7a]
bltzl $s1,-9964 # CHECK: bltzl $17, -9964 # encoding: [0x06,0x22,0xf6,0x45]
bnel $gp,$s4,5107 # CHECK: bnel $gp, $20, 5107 # encoding: [0x57,0x94,0x04,0xfc]
cache 1, 8($5) # CHECK: cache 1, 8($5) # encoding: [0xbc,0xa1,0x00,0x08]
c.ngl.d $f29,$f29
c.ngle.d $f0,$f16

8
llvm/test/MC/Mips/mips32/valid.s
View File

@ -26,6 +26,14 @@
bgezal $0, 21100 # CHECK: bal 21100 # encoding: [0x04,0x11,0x14,0x9b]
bgezal $6, 21100 # CHECK: bgezal $6, 21100 # encoding: [0x04,0xd1,0x14,0x9b]
bltzal $6, 21100 # CHECK: bltzal $6, 21100 # encoding: [0x04,0xd0,0x14,0x9b]
beql $14,$s3,12544 # CHECK: beql $14, $19, 12544 # encoding: [0x51,0xd3,0x0c,0x40]
bgezall $12,7293 # CHECK: bgezall $12, 7293 # encoding: [0x05,0x93,0x07,0x1f]
bgezl $4,-6858 # CHECK: bgezl $4, -6858 # encoding: [0x04,0x83,0xf9,0x4d]
bgtzl $10,-3738 # CHECK: bgtzl $10, -3738 # encoding: [0x5d,0x40,0xfc,0x59]
blezl $6,2974 # CHECK: blezl $6, 2974 # encoding: [0x58,0xc0,0x02,0xe7]
bltzall $6,488 # CHECK: bltzall $6, 488 # encoding: [0x04,0xd2,0x00,0x7a]
bltzl $s1,-9964 # CHECK: bltzl $17, -9964 # encoding: [0x06,0x22,0xf6,0x45]
bnel $gp,$s4,5107 # CHECK: bnel $gp, $20, 5107 # encoding: [0x57,0x94,0x04,0xfc]
cache 1, 8($5) # CHECK: cache 1, 8($5) # encoding: [0xbc,0xa1,0x00,0x08]
c.ngl.d $f29,$f29
c.ngle.d $f0,$f16

8
llvm/test/MC/Mips/mips32r2/valid.s
View File

@ -26,6 +26,14 @@
bgezal $0, 21100 # CHECK: bal 21100 # encoding: [0x04,0x11,0x14,0x9b]
bgezal $6, 21100 # CHECK: bgezal $6, 21100 # encoding: [0x04,0xd1,0x14,0x9b]
bltzal $6, 21100 # CHECK: bltzal $6, 21100 # encoding: [0x04,0xd0,0x14,0x9b]
beql $14,$s3,12544 # CHECK: beql $14, $19, 12544 # encoding: [0x51,0xd3,0x0c,0x40]
bgezall $12,7293 # CHECK: bgezall $12, 7293 # encoding: [0x05,0x93,0x07,0x1f]
bgezl $4,-6858 # CHECK: bgezl $4, -6858 # encoding: [0x04,0x83,0xf9,0x4d]
bgtzl $10,-3738 # CHECK: bgtzl $10, -3738 # encoding: [0x5d,0x40,0xfc,0x59]
blezl $6,2974 # CHECK: blezl $6, 2974 # encoding: [0x58,0xc0,0x02,0xe7]
bltzall $6,488 # CHECK: bltzall $6, 488 # encoding: [0x04,0xd2,0x00,0x7a]
bltzl $s1,-9964 # CHECK: bltzl $17, -9964 # encoding: [0x06,0x22,0xf6,0x45]
bnel $gp,$s4,5107 # CHECK: bnel $gp, $20, 5107 # encoding: [0x57,0x94,0x04,0xfc]
cache 1, 8($5) # CHECK: cache 1, 8($5) # encoding: [0xbc,0xa1,0x00,0x08]
c.ngl.d $f29,$f29
c.ngle.d $f0,$f16

8
llvm/test/MC/Mips/mips32r6/invalid-mips2-wrong-error.s
View File

@ -6,14 +6,6 @@
# RUN: FileCheck %s < %t1
.set noat
beql $1,$2,4 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction
bgezall $3,8 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction
bgezl $3,8 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction
bgtzl $4,16 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction
blezl $3,8 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction
bltzall $3,8 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction
bltzl $4,16 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction
bnel $1,$2,4 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction
bc1tl 4 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction
bc1fl 4 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction
bc2tl 4 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction

8
llvm/test/MC/Mips/mips32r6/invalid-mips2.s
View File

@ -6,6 +6,14 @@
.set noat
addi $13,$9,26322 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
beql $14,$s3,12544 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
bnel $gp,$s4,5107 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
bgezl $4,-6858 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
bgtzl $10,-3738 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
blezl $6,2974 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
bltzl $s1,-9964 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
bgezall $12,7293 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
bltzall $6,488 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
mfhi $s3 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
mfhi $sp # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
mflo $s1 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled

8
llvm/test/MC/Mips/mips32r6/invalid-mips4-wrong-error.s
View File

@ -6,14 +6,6 @@
# RUN: FileCheck %s < %t1
.set noat
beql $1,$2,4 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction
bgezall $3,8 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction
bgezl $3,8 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction
bgtzl $4,16 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction
blezl $3,8 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction
bltzall $3,8 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction
bltzl $4,16 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction
bnel $1,$2,4 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction
bc1tl 4 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction
bc1fl 4 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction
bc2tl 4 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction

8
llvm/test/MC/Mips/mips4/valid.s
View File

@ -26,6 +26,14 @@
bgezal $0, 21100 # CHECK: bal 21100 # encoding: [0x04,0x11,0x14,0x9b]
bgezal $6, 21100 # CHECK: bgezal $6, 21100 # encoding: [0x04,0xd1,0x14,0x9b]
bltzal $6, 21100 # CHECK: bltzal $6, 21100 # encoding: [0x04,0xd0,0x14,0x9b]
beql $14,$s3,12544 # CHECK: beql $14, $19, 12544 # encoding: [0x51,0xd3,0x0c,0x40]
bgezall $12,7293 # CHECK: bgezall $12, 7293 # encoding: [0x05,0x93,0x07,0x1f]
bgezl $4,-6858 # CHECK: bgezl $4, -6858 # encoding: [0x04,0x83,0xf9,0x4d]
bgtzl $10,-3738 # CHECK: bgtzl $10, -3738 # encoding: [0x5d,0x40,0xfc,0x59]
blezl $6,2974 # CHECK: blezl $6, 2974 # encoding: [0x58,0xc0,0x02,0xe7]
bltzall $6,488 # CHECK: bltzall $6, 488 # encoding: [0x04,0xd2,0x00,0x7a]
bltzl $s1,-9964 # CHECK: bltzl $17, -9964 # encoding: [0x06,0x22,0xf6,0x45]
bnel $gp,$s4,5107 # CHECK: bnel $gp, $20, 5107 # encoding: [0x57,0x94,0x04,0xfc]
cache 1, 8($5) # CHECK: cache 1, 8($5) # encoding: [0xbc,0xa1,0x00,0x08]
c.ngl.d $f29,$f29
c.ngle.d $f0,$f16

8
llvm/test/MC/Mips/mips5/valid.s
View File

@ -26,6 +26,14 @@
bgezal $0, 21100 # CHECK: bal 21100 # encoding: [0x04,0x11,0x14,0x9b]
bgezal $6, 21100 # CHECK: bgezal $6, 21100 # encoding: [0x04,0xd1,0x14,0x9b]
bltzal $6, 21100 # CHECK: bltzal $6, 21100 # encoding: [0x04,0xd0,0x14,0x9b]
beql $14,$s3,12544 # CHECK: beql $14, $19, 12544 # encoding: [0x51,0xd3,0x0c,0x40]
bgezall $12,7293 # CHECK: bgezall $12, 7293 # encoding: [0x05,0x93,0x07,0x1f]
bgezl $4,-6858 # CHECK: bgezl $4, -6858 # encoding: [0x04,0x83,0xf9,0x4d]
bgtzl $10,-3738 # CHECK: bgtzl $10, -3738 # encoding: [0x5d,0x40,0xfc,0x59]
blezl $6,2974 # CHECK: blezl $6, 2974 # encoding: [0x58,0xc0,0x02,0xe7]
bltzall $6,488 # CHECK: bltzall $6, 488 # encoding: [0x04,0xd2,0x00,0x7a]
bltzl $s1,-9964 # CHECK: bltzl $17, -9964 # encoding: [0x06,0x22,0xf6,0x45]
bnel $gp,$s4,5107 # CHECK: bnel $gp, $20, 5107 # encoding: [0x57,0x94,0x04,0xfc]
cache 1, 8($5) # CHECK: cache 1, 8($5) # encoding: [0xbc,0xa1,0x00,0x08]
c.ngl.d $f29,$f29
c.ngle.d $f0,$f16

8
llvm/test/MC/Mips/mips64/valid.s
View File

@ -26,6 +26,14 @@
bgezal $0, 21100 # CHECK: bal 21100 # encoding: [0x04,0x11,0x14,0x9b]
bgezal $6, 21100 # CHECK: bgezal $6, 21100 # encoding: [0x04,0xd1,0x14,0x9b]
bltzal $6, 21100 # CHECK: bltzal $6, 21100 # encoding: [0x04,0xd0,0x14,0x9b]
beql $14,$s3,12544 # CHECK: beql $14, $19, 12544 # encoding: [0x51,0xd3,0x0c,0x40]
bgezall $12,7293 # CHECK: bgezall $12, 7293 # encoding: [0x05,0x93,0x07,0x1f]
bgezl $4,-6858 # CHECK: bgezl $4, -6858 # encoding: [0x04,0x83,0xf9,0x4d]
bgtzl $10,-3738 # CHECK: bgtzl $10, -3738 # encoding: [0x5d,0x40,0xfc,0x59]
blezl $6,2974 # CHECK: blezl $6, 2974 # encoding: [0x58,0xc0,0x02,0xe7]
bltzall $6,488 # CHECK: bltzall $6, 488 # encoding: [0x04,0xd2,0x00,0x7a]
bltzl $s1,-9964 # CHECK: bltzl $17, -9964 # encoding: [0x06,0x22,0xf6,0x45]
bnel $gp,$s4,5107 # CHECK: bnel $gp, $20, 5107 # encoding: [0x57,0x94,0x04,0xfc]
cache 1, 8($5) # CHECK: cache 1, 8($5) # encoding: [0xbc,0xa1,0x00,0x08]
c.ngl.d $f29,$f29
c.ngle.d $f0,$f16

8
llvm/test/MC/Mips/mips64r2/valid.s
View File

@ -26,6 +26,14 @@
bgezal $0, 21100 # CHECK: bal 21100 # encoding: [0x04,0x11,0x14,0x9b]
bgezal $6, 21100 # CHECK: bgezal $6, 21100 # encoding: [0x04,0xd1,0x14,0x9b]
bltzal $6, 21100 # CHECK: bltzal $6, 21100 # encoding: [0x04,0xd0,0x14,0x9b]
beql $14,$s3,12544 # CHECK: beql $14, $19, 12544 # encoding: [0x51,0xd3,0x0c,0x40]
bgezall $12,7293 # CHECK: bgezall $12, 7293 # encoding: [0x05,0x93,0x07,0x1f]
bgezl $4,-6858 # CHECK: bgezl $4, -6858 # encoding: [0x04,0x83,0xf9,0x4d]
bgtzl $10,-3738 # CHECK: bgtzl $10, -3738 # encoding: [0x5d,0x40,0xfc,0x59]
blezl $6,2974 # CHECK: blezl $6, 2974 # encoding: [0x58,0xc0,0x02,0xe7]
bltzall $6,488 # CHECK: bltzall $6, 488 # encoding: [0x04,0xd2,0x00,0x7a]
bltzl $s1,-9964 # CHECK: bltzl $17, -9964 # encoding: [0x06,0x22,0xf6,0x45]
bnel $gp,$s4,5107 # CHECK: bnel $gp, $20, 5107 # encoding: [0x57,0x94,0x04,0xfc]
cache 1, 8($5) # CHECK: cache 1, 8($5) # encoding: [0xbc,0xa1,0x00,0x08]
c.ngl.d $f29,$f29
c.ngle.d $f0,$f16

8
llvm/test/MC/Mips/mips64r6/invalid-mips2.s
View File

@ -6,9 +6,17 @@
.set noat
addi $13,$9,26322 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
beql $14,$s3,12544 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
bgezal $0, 21100 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
bgezal $6, 21100 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
bgezall $12,7293 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
bgezl $4,-6858 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
bgtzl $10,-3738 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
blezl $6,2974 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
bltzal $6, 21100 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
bltzall $6,488 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
bltzl $s1,-9964 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
bnel $gp,$s4,5107 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
mfhi $s3 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
mfhi $sp # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
mflo $s1 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled

8
llvm/test/MC/Mips/mips64r6/invalid-mips4-wrong-error.s
View File

@ -6,14 +6,6 @@
# RUN: FileCheck %s < %t1
.set noat
beql $1,$2,4 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction
bgezall $3,8 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction
bgezl $3,8 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction
bgtzl $4,16 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction
blezl $3,8 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction
bltzall $3,8 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction
bltzl $4,16 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction
bnel $1,$2,4 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction
bc1tl 4 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction
bc1fl 4 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction
bc2tl 4 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction