forked from OSchip/llvm-project
Fix register printing in disassembling of push/pop of segment registers and in/out in Intel syntax mode. Fixes PR10960
llvm-svn: 140299
This commit is contained in:
parent
c14ee32db5
commit
6d1872b77a
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@ -67,43 +67,43 @@ def IRET64 : RI<0xcf, RawFrm, (outs), (ins), "iretq", []>,
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//
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let Defs = [AL], Uses = [DX] in
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def IN8rr : I<0xEC, RawFrm, (outs), (ins),
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"in{b}\t{%dx, %al|%AL, %DX}", []>;
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"in{b}\t{%dx, %al|AL, DX}", []>;
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let Defs = [AX], Uses = [DX] in
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def IN16rr : I<0xED, RawFrm, (outs), (ins),
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"in{w}\t{%dx, %ax|%AX, %DX}", []>, OpSize;
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"in{w}\t{%dx, %ax|AX, DX}", []>, OpSize;
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let Defs = [EAX], Uses = [DX] in
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def IN32rr : I<0xED, RawFrm, (outs), (ins),
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"in{l}\t{%dx, %eax|%EAX, %DX}", []>;
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"in{l}\t{%dx, %eax|EAX, DX}", []>;
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let Defs = [AL] in
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def IN8ri : Ii8<0xE4, RawFrm, (outs), (ins i8imm:$port),
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"in{b}\t{$port, %al|%AL, $port}", []>;
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"in{b}\t{$port, %al|AL, $port}", []>;
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let Defs = [AX] in
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def IN16ri : Ii8<0xE5, RawFrm, (outs), (ins i8imm:$port),
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"in{w}\t{$port, %ax|%AX, $port}", []>, OpSize;
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"in{w}\t{$port, %ax|AX, $port}", []>, OpSize;
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let Defs = [EAX] in
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def IN32ri : Ii8<0xE5, RawFrm, (outs), (ins i8imm:$port),
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"in{l}\t{$port, %eax|%EAX, $port}", []>;
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"in{l}\t{$port, %eax|EAX, $port}", []>;
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let Uses = [DX, AL] in
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def OUT8rr : I<0xEE, RawFrm, (outs), (ins),
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"out{b}\t{%al, %dx|%DX, %AL}", []>;
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"out{b}\t{%al, %dx|DX, AL}", []>;
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let Uses = [DX, AX] in
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def OUT16rr : I<0xEF, RawFrm, (outs), (ins),
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"out{w}\t{%ax, %dx|%DX, %AX}", []>, OpSize;
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"out{w}\t{%ax, %dx|DX, AX}", []>, OpSize;
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let Uses = [DX, EAX] in
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def OUT32rr : I<0xEF, RawFrm, (outs), (ins),
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"out{l}\t{%eax, %dx|%DX, %EAX}", []>;
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"out{l}\t{%eax, %dx|DX, EAX}", []>;
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let Uses = [AL] in
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def OUT8ir : Ii8<0xE6, RawFrm, (outs), (ins i8imm:$port),
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"out{b}\t{%al, $port|$port, %AL}", []>;
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"out{b}\t{%al, $port|$port, AL}", []>;
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let Uses = [AX] in
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def OUT16ir : Ii8<0xE7, RawFrm, (outs), (ins i8imm:$port),
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"out{w}\t{%ax, $port|$port, %AX}", []>, OpSize;
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"out{w}\t{%ax, $port|$port, AX}", []>, OpSize;
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let Uses = [EAX] in
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def OUT32ir : Ii8<0xE7, RawFrm, (outs), (ins i8imm:$port),
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"out{l}\t{%eax, $port|$port, %EAX}", []>;
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"out{l}\t{%eax, $port|$port, EAX}", []>;
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def IN8 : I<0x6C, RawFrm, (outs), (ins), "ins{b}", []>;
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def IN16 : I<0x6D, RawFrm, (outs), (ins), "ins{w}", []>, OpSize;
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@ -229,65 +229,65 @@ def LTRm : I<0x00, MRM3m, (outs), (ins i16mem:$src),
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"ltr{w}\t{$src}", []>, TB;
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def PUSHCS16 : I<0x0E, RawFrm, (outs), (ins),
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"push{w}\t%cs", []>, Requires<[In32BitMode]>, OpSize;
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"push{w}\t{%cs|CS}", []>, Requires<[In32BitMode]>, OpSize;
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def PUSHCS32 : I<0x0E, RawFrm, (outs), (ins),
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"push{l}\t%cs", []>, Requires<[In32BitMode]>;
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"push{l}\t{%cs|CS}", []>, Requires<[In32BitMode]>;
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def PUSHSS16 : I<0x16, RawFrm, (outs), (ins),
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"push{w}\t%ss", []>, Requires<[In32BitMode]>, OpSize;
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"push{w}\t{%ss|SS}", []>, Requires<[In32BitMode]>, OpSize;
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def PUSHSS32 : I<0x16, RawFrm, (outs), (ins),
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"push{l}\t%ss", []>, Requires<[In32BitMode]>;
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"push{l}\t{%ss|SS}", []>, Requires<[In32BitMode]>;
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def PUSHDS16 : I<0x1E, RawFrm, (outs), (ins),
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"push{w}\t%ds", []>, Requires<[In32BitMode]>, OpSize;
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"push{w}\t{%ds|DS}", []>, Requires<[In32BitMode]>, OpSize;
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def PUSHDS32 : I<0x1E, RawFrm, (outs), (ins),
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"push{l}\t%ds", []>, Requires<[In32BitMode]>;
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"push{l}\t{%ds|DS}", []>, Requires<[In32BitMode]>;
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def PUSHES16 : I<0x06, RawFrm, (outs), (ins),
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"push{w}\t%es", []>, Requires<[In32BitMode]>, OpSize;
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"push{w}\t{%es|ES}", []>, Requires<[In32BitMode]>, OpSize;
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def PUSHES32 : I<0x06, RawFrm, (outs), (ins),
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"push{l}\t%es", []>, Requires<[In32BitMode]>;
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"push{l}\t{%es|ES}", []>, Requires<[In32BitMode]>;
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def PUSHFS16 : I<0xa0, RawFrm, (outs), (ins),
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"push{w}\t%fs", []>, OpSize, TB;
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"push{w}\t{%fs|FS}", []>, OpSize, TB;
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def PUSHFS32 : I<0xa0, RawFrm, (outs), (ins),
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"push{l}\t%fs", []>, TB, Requires<[In32BitMode]>;
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"push{l}\t{%fs|FS}", []>, TB, Requires<[In32BitMode]>;
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def PUSHGS16 : I<0xa8, RawFrm, (outs), (ins),
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"push{w}\t%gs", []>, OpSize, TB;
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"push{w}\t{%gs|GS}", []>, OpSize, TB;
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def PUSHGS32 : I<0xa8, RawFrm, (outs), (ins),
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"push{l}\t%gs", []>, TB, Requires<[In32BitMode]>;
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"push{l}\t{%gs|GS}", []>, TB, Requires<[In32BitMode]>;
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def PUSHFS64 : I<0xa0, RawFrm, (outs), (ins),
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"push{q}\t%fs", []>, TB;
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"push{q}\t{%fs|FS}", []>, TB;
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def PUSHGS64 : I<0xa8, RawFrm, (outs), (ins),
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"push{q}\t%gs", []>, TB;
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"push{q}\t{%gs|GS}", []>, TB;
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// No "pop cs" instruction.
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def POPSS16 : I<0x17, RawFrm, (outs), (ins),
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"pop{w}\t%ss", []>, OpSize, Requires<[In32BitMode]>;
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"pop{w}\t{%ss|SS}", []>, OpSize, Requires<[In32BitMode]>;
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def POPSS32 : I<0x17, RawFrm, (outs), (ins),
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"pop{l}\t%ss", []> , Requires<[In32BitMode]>;
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"pop{l}\t{%ss|SS}", []> , Requires<[In32BitMode]>;
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def POPDS16 : I<0x1F, RawFrm, (outs), (ins),
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"pop{w}\t%ds", []>, OpSize, Requires<[In32BitMode]>;
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"pop{w}\t{%ds|DS}", []>, OpSize, Requires<[In32BitMode]>;
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def POPDS32 : I<0x1F, RawFrm, (outs), (ins),
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"pop{l}\t%ds", []> , Requires<[In32BitMode]>;
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"pop{l}\t{%ds|DS}", []> , Requires<[In32BitMode]>;
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def POPES16 : I<0x07, RawFrm, (outs), (ins),
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"pop{w}\t%es", []>, OpSize, Requires<[In32BitMode]>;
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"pop{w}\t{%es|ES}", []>, OpSize, Requires<[In32BitMode]>;
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def POPES32 : I<0x07, RawFrm, (outs), (ins),
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"pop{l}\t%es", []> , Requires<[In32BitMode]>;
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"pop{l}\t{%es|ES}", []> , Requires<[In32BitMode]>;
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def POPFS16 : I<0xa1, RawFrm, (outs), (ins),
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"pop{w}\t%fs", []>, OpSize, TB;
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"pop{w}\t{%fs|FS}", []>, OpSize, TB;
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def POPFS32 : I<0xa1, RawFrm, (outs), (ins),
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"pop{l}\t%fs", []>, TB , Requires<[In32BitMode]>;
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"pop{l}\t{%fs|FS}", []>, TB , Requires<[In32BitMode]>;
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def POPFS64 : I<0xa1, RawFrm, (outs), (ins),
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"pop{q}\t%fs", []>, TB;
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"pop{q}\t{%fs|FS}", []>, TB;
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def POPGS16 : I<0xa9, RawFrm, (outs), (ins),
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"pop{w}\t%gs", []>, OpSize, TB;
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"pop{w}\t{%gs|GS}", []>, OpSize, TB;
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def POPGS32 : I<0xa9, RawFrm, (outs), (ins),
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"pop{l}\t%gs", []>, TB , Requires<[In32BitMode]>;
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"pop{l}\t{%gs|GS}", []>, TB , Requires<[In32BitMode]>;
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def POPGS64 : I<0xa9, RawFrm, (outs), (ins),
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"pop{q}\t%gs", []>, TB;
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"pop{q}\t{%gs|GS}", []>, TB;
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def LDS16rm : I<0xc5, MRMSrcMem, (outs GR16:$dst), (ins opaque32mem:$src),
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@ -11,3 +11,15 @@
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# CHECK: movsq
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0x48 0xa5
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# CHECK: pop DS
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0x1f
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# CHECK: pop ES
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0x07
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# CHECK: pop SS
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0x17
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# CHECK: in AL, DX
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0xec
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