forked from OSchip/llvm-project
[DAG] Add helper for creating constant vector index with correct type. NFC.
This commit is contained in:
parent
546f8f4264
commit
6d0d86a64d
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@ -600,6 +600,8 @@ public:
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bool isTarget = false);
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SDValue getShiftAmountConstant(uint64_t Val, EVT VT, const SDLoc &DL,
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bool LegalTypes = true);
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SDValue getVectorIdxConstant(uint64_t Val, const SDLoc &DL,
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bool isTarget = false);
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SDValue getTargetConstant(uint64_t Val, const SDLoc &DL, EVT VT,
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bool isOpaque = false) {
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@ -10788,13 +10788,12 @@ SDValue DAGCombiner::visitTRUNCATE(SDNode *N) {
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SDValue EltNo = N0->getOperand(1);
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if (isa<ConstantSDNode>(EltNo) && isTypeLegal(NVT)) {
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int Elt = cast<ConstantSDNode>(EltNo)->getZExtValue();
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EVT IndexTy = TLI.getVectorIdxTy(DAG.getDataLayout());
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int Index = isLE ? (Elt*SizeRatio) : (Elt*SizeRatio + (SizeRatio-1));
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SDLoc DL(N);
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return DAG.getNode(ISD::EXTRACT_VECTOR_ELT, DL, TrTy,
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DAG.getBitcast(NVT, N0.getOperand(0)),
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DAG.getConstant(Index, DL, IndexTy));
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DAG.getVectorIdxConstant(Index, DL));
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}
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}
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@ -10961,10 +10960,9 @@ SDValue DAGCombiner::visitTRUNCATE(SDNode *N) {
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TLI.isOperationLegal(ISD::EXTRACT_VECTOR_ELT, VecSrcVT))) {
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SDLoc SL(N);
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EVT IdxVT = TLI.getVectorIdxTy(DAG.getDataLayout());
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unsigned Idx = isLE ? 0 : VecSrcVT.getVectorNumElements() - 1;
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return DAG.getNode(ISD::EXTRACT_VECTOR_ELT, SL, VT, VecSrc,
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DAG.getConstant(Idx, SL, IdxVT));
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DAG.getVectorIdxConstant(Idx, SL));
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}
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}
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@ -17215,9 +17213,8 @@ SDValue DAGCombiner::visitEXTRACT_VECTOR_ELT(SDNode *N) {
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// FIXME: Should really be just isOperationLegalOrCustom.
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TLI.isOperationLegal(ISD::EXTRACT_VECTOR_ELT, VecVT) ||
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TLI.isOperationExpand(ISD::VECTOR_SHUFFLE, VecVT)) {
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EVT IndexTy = TLI.getVectorIdxTy(DAG.getDataLayout());
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return DAG.getNode(ISD::EXTRACT_VECTOR_ELT, DL, ScalarVT, SVInVec,
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DAG.getConstant(OrigElt, DL, IndexTy));
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DAG.getVectorIdxConstant(OrigElt, DL));
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}
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}
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@ -17457,8 +17454,7 @@ SDValue DAGCombiner::createBuildVecShuffle(const SDLoc &DL, SDNode *N,
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ArrayRef<int> VectorMask,
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SDValue VecIn1, SDValue VecIn2,
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unsigned LeftIdx, bool DidSplitVec) {
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MVT IdxTy = TLI.getVectorIdxTy(DAG.getDataLayout());
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SDValue ZeroIdx = DAG.getConstant(0, DL, IdxTy);
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SDValue ZeroIdx = DAG.getVectorIdxConstant(0, DL);
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EVT VT = N->getValueType(0);
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EVT InVT1 = VecIn1.getValueType();
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@ -17492,7 +17488,7 @@ SDValue DAGCombiner::createBuildVecShuffle(const SDLoc &DL, SDNode *N,
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// If we only have one input vector, and it's twice the size of the
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// output, split it in two.
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VecIn2 = DAG.getNode(ISD::EXTRACT_SUBVECTOR, DL, VT, VecIn1,
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DAG.getConstant(NumElems, DL, IdxTy));
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DAG.getVectorIdxConstant(NumElems, DL));
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VecIn1 = DAG.getNode(ISD::EXTRACT_SUBVECTOR, DL, VT, VecIn1, ZeroIdx);
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// Since we now have shorter input vectors, adjust the offset of the
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// second vector's start.
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@ -17733,7 +17729,6 @@ SDValue DAGCombiner::reduceBuildVecToShuffle(SDNode *N) {
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unsigned NearestPow2 = 0;
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SDValue Vec = VecIn.back();
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EVT InVT = Vec.getValueType();
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MVT IdxTy = TLI.getVectorIdxTy(DAG.getDataLayout());
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SmallVector<unsigned, 8> IndexVec(NumElems, 0);
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for (unsigned i = 0; i < NumElems; i++) {
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@ -17752,9 +17747,9 @@ SDValue DAGCombiner::reduceBuildVecToShuffle(SDNode *N) {
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InVT.getVectorElementType(), SplitSize);
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if (TLI.isTypeLegal(SplitVT)) {
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SDValue VecIn2 = DAG.getNode(ISD::EXTRACT_SUBVECTOR, DL, SplitVT, Vec,
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DAG.getConstant(SplitSize, DL, IdxTy));
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DAG.getVectorIdxConstant(SplitSize, DL));
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SDValue VecIn1 = DAG.getNode(ISD::EXTRACT_SUBVECTOR, DL, SplitVT, Vec,
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DAG.getConstant(0, DL, IdxTy));
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DAG.getVectorIdxConstant(0, DL));
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VecIn.pop_back();
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VecIn.push_back(VecIn1);
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VecIn.push_back(VecIn2);
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@ -18412,12 +18407,11 @@ static SDValue narrowExtractedVectorBinOp(SDNode *Extract, SelectionDAG &DAG) {
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// bitcasted.
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unsigned ConcatOpNum = ExtractIndex / VT.getVectorNumElements();
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unsigned ExtBOIdx = ConcatOpNum * NarrowBVT.getVectorNumElements();
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EVT ExtBOIdxVT = Extract->getOperand(1).getValueType();
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if (TLI.isExtractSubvectorCheap(NarrowBVT, WideBVT, ExtBOIdx) &&
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BinOp.hasOneUse() && Extract->getOperand(0)->hasOneUse()) {
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// extract (binop B0, B1), N --> binop (extract B0, N), (extract B1, N)
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SDLoc DL(Extract);
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SDValue NewExtIndex = DAG.getConstant(ExtBOIdx, DL, ExtBOIdxVT);
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SDValue NewExtIndex = DAG.getVectorIdxConstant(ExtBOIdx, DL);
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SDValue X = DAG.getNode(ISD::EXTRACT_SUBVECTOR, DL, NarrowBVT,
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BinOp.getOperand(0), NewExtIndex);
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SDValue Y = DAG.getNode(ISD::EXTRACT_SUBVECTOR, DL, NarrowBVT,
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@ -18457,7 +18451,7 @@ static SDValue narrowExtractedVectorBinOp(SDNode *Extract, SelectionDAG &DAG) {
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// extract (binop (concat X1, X2), Y), N --> binop XN, (extract Y, IndexC)
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// extract (binop X, (concat Y1, Y2)), N --> binop (extract X, IndexC), YN
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SDLoc DL(Extract);
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SDValue IndexC = DAG.getConstant(ExtBOIdx, DL, ExtBOIdxVT);
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SDValue IndexC = DAG.getVectorIdxConstant(ExtBOIdx, DL);
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SDValue X = SubVecL ? DAG.getBitcast(NarrowBVT, SubVecL)
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: DAG.getNode(ISD::EXTRACT_SUBVECTOR, DL, NarrowBVT,
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BinOp.getOperand(0), IndexC);
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@ -18550,7 +18544,7 @@ SDValue DAGCombiner::visitEXTRACT_SUBVECTOR(SDNode *N) {
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if (TLI.isOperationLegalOrCustom(ISD::EXTRACT_SUBVECTOR, NewExtVT)) {
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unsigned IndexValScaled = N->getConstantOperandVal(1) * SrcDestRatio;
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SDLoc DL(N);
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SDValue NewIndex = DAG.getIntPtrConstant(IndexValScaled, DL);
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SDValue NewIndex = DAG.getVectorIdxConstant(IndexValScaled, DL);
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SDValue NewExtract = DAG.getNode(ISD::EXTRACT_SUBVECTOR, DL, NewExtVT,
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V.getOperand(0), NewIndex);
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return DAG.getBitcast(NVT, NewExtract);
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@ -18566,7 +18560,7 @@ SDValue DAGCombiner::visitEXTRACT_SUBVECTOR(SDNode *N) {
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TLI.isOperationLegalOrCustom(ISD::EXTRACT_SUBVECTOR, NewExtVT)) {
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unsigned IndexValScaled = N->getConstantOperandVal(1) / DestSrcRatio;
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SDLoc DL(N);
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SDValue NewIndex = DAG.getIntPtrConstant(IndexValScaled, DL);
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SDValue NewIndex = DAG.getVectorIdxConstant(IndexValScaled, DL);
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SDValue NewExtract = DAG.getNode(ISD::EXTRACT_SUBVECTOR, DL, NewExtVT,
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V.getOperand(0), NewIndex);
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return DAG.getBitcast(NVT, NewExtract);
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@ -18606,8 +18600,7 @@ SDValue DAGCombiner::visitEXTRACT_SUBVECTOR(SDNode *N) {
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"Trying to extract from >1 concat operand?");
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assert(NewExtIdx % ExtNumElts == 0 &&
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"Extract index is not a multiple of the input vector length.");
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MVT IdxTy = TLI.getVectorIdxTy(DAG.getDataLayout());
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SDValue NewIndexC = DAG.getConstant(NewExtIdx, DL, IdxTy);
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SDValue NewIndexC = DAG.getVectorIdxConstant(NewExtIdx, DL);
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return DAG.getNode(ISD::EXTRACT_SUBVECTOR, DL, NVT,
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V.getOperand(ConcatOpIdx), NewIndexC);
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}
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@ -19136,8 +19129,7 @@ static SDValue replaceShuffleOfInsert(ShuffleVectorSDNode *Shuf,
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// element used. Therefore, our new insert element occurs at the shuffle's
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// mask index value, not the insert's index value.
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// shuffle (insertelt v1, x, C), v2, mask --> insertelt v2, x, C'
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SDValue NewInsIndex = DAG.getConstant(ShufOp0Index, SDLoc(Shuf),
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Op0.getOperand(2).getValueType());
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SDValue NewInsIndex = DAG.getVectorIdxConstant(ShufOp0Index, SDLoc(Shuf));
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return DAG.getNode(ISD::INSERT_VECTOR_ELT, SDLoc(Shuf), Op0.getValueType(),
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Op1, Op0.getOperand(1), NewInsIndex);
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}
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@ -19234,7 +19226,7 @@ SDValue DAGCombiner::visitVECTOR_SHUFFLE(SDNode *N) {
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SDValue L = N0.getOperand(0), R = N0.getOperand(1);
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SDLoc DL(N);
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EVT EltVT = VT.getScalarType();
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SDValue Index = DAG.getIntPtrConstant(SplatIndex, DL);
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SDValue Index = DAG.getVectorIdxConstant(SplatIndex, DL);
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SDValue ExtL = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, DL, EltVT, L, Index);
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SDValue ExtR = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, DL, EltVT, R, Index);
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SDValue NewBO = DAG.getNode(N0.getOpcode(), DL, EltVT, ExtL, ExtR,
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@ -19576,11 +19568,10 @@ SDValue DAGCombiner::visitSCALAR_TO_VECTOR(SDNode *N) {
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return LegalShuffle;
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// If not we must truncate the vector.
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if (VT.getVectorNumElements() != InVecT.getVectorNumElements()) {
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MVT IdxTy = TLI.getVectorIdxTy(DAG.getDataLayout());
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SDValue ZeroIdx = DAG.getConstant(0, SDLoc(N), IdxTy);
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EVT SubVT =
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EVT::getVectorVT(*DAG.getContext(), InVecT.getVectorElementType(),
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VT.getVectorNumElements());
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SDValue ZeroIdx = DAG.getVectorIdxConstant(0, SDLoc(N));
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EVT SubVT = EVT::getVectorVT(*DAG.getContext(),
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InVecT.getVectorElementType(),
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VT.getVectorNumElements());
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return DAG.getNode(ISD::EXTRACT_SUBVECTOR, SDLoc(N), SubVT,
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LegalShuffle, ZeroIdx);
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}
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@ -19676,19 +19667,18 @@ SDValue DAGCombiner::visitINSERT_SUBVECTOR(SDNode *N) {
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EVT NewVT;
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SDLoc DL(N);
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SDValue NewIdx;
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MVT IdxVT = TLI.getVectorIdxTy(DAG.getDataLayout());
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LLVMContext &Ctx = *DAG.getContext();
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unsigned NumElts = VT.getVectorNumElements();
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unsigned EltSizeInBits = VT.getScalarSizeInBits();
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if ((EltSizeInBits % N1SrcSVT.getSizeInBits()) == 0) {
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unsigned Scale = EltSizeInBits / N1SrcSVT.getSizeInBits();
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NewVT = EVT::getVectorVT(Ctx, N1SrcSVT, NumElts * Scale);
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NewIdx = DAG.getConstant(InsIdx * Scale, DL, IdxVT);
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NewIdx = DAG.getVectorIdxConstant(InsIdx * Scale, DL);
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} else if ((N1SrcSVT.getSizeInBits() % EltSizeInBits) == 0) {
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unsigned Scale = N1SrcSVT.getSizeInBits() / EltSizeInBits;
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if ((NumElts % Scale) == 0 && (InsIdx % Scale) == 0) {
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NewVT = EVT::getVectorVT(Ctx, N1SrcSVT, NumElts / Scale);
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NewIdx = DAG.getConstant(InsIdx / Scale, DL, IdxVT);
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NewIdx = DAG.getVectorIdxConstant(InsIdx / Scale, DL);
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}
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}
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if (NewIdx && hasOperation(ISD::INSERT_SUBVECTOR, NewVT)) {
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@ -19769,9 +19759,9 @@ SDValue DAGCombiner::visitVECREDUCE(SDNode *N) {
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// VECREDUCE over 1-element vector is just an extract.
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if (VT.getVectorNumElements() == 1) {
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SDLoc dl(N);
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SDValue Res = DAG.getNode(
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ISD::EXTRACT_VECTOR_ELT, dl, VT.getVectorElementType(), N0,
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DAG.getConstant(0, dl, TLI.getVectorIdxTy(DAG.getDataLayout())));
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SDValue Res =
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DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, VT.getVectorElementType(), N0,
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DAG.getVectorIdxConstant(0, dl));
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if (Res.getValueType() != N->getValueType(0))
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Res = DAG.getNode(ISD::ANY_EXTEND, dl, N->getValueType(0), Res);
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return Res;
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@ -19904,8 +19894,7 @@ static SDValue scalarizeBinOpOfSplats(SDNode *N, SelectionDAG &DAG) {
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return SDValue();
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SDLoc DL(N);
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SDValue IndexC =
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DAG.getConstant(Index0, DL, TLI.getVectorIdxTy(DAG.getDataLayout()));
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SDValue IndexC = DAG.getVectorIdxConstant(Index0, DL);
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SDValue X = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, DL, EltVT, N0, IndexC);
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SDValue Y = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, DL, EltVT, N1, IndexC);
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SDValue ScalarBO = DAG.getNode(Opcode, DL, EltVT, X, Y, N->getFlags());
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@ -3145,14 +3145,12 @@ bool SelectionDAGLegalize::ExpandNode(SDNode *Node) {
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}
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unsigned Idx = Mask[i];
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if (Idx < NumElems)
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Ops.push_back(DAG.getNode(
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ISD::EXTRACT_VECTOR_ELT, dl, EltVT, Op0,
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DAG.getConstant(Idx, dl, TLI.getVectorIdxTy(DAG.getDataLayout()))));
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Ops.push_back(DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, EltVT, Op0,
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DAG.getVectorIdxConstant(Idx, dl)));
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else
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Ops.push_back(DAG.getNode(
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ISD::EXTRACT_VECTOR_ELT, dl, EltVT, Op1,
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DAG.getConstant(Idx - NumElems, dl,
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TLI.getVectorIdxTy(DAG.getDataLayout()))));
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Ops.push_back(
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DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, EltVT, Op1,
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DAG.getVectorIdxConstant(Idx - NumElems, dl)));
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}
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Tmp1 = DAG.getBuildVector(VT, dl, Ops);
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@ -3835,12 +3833,12 @@ bool SelectionDAGLegalize::ExpandNode(SDNode *Node) {
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SmallVector<SDValue, 8> Scalars;
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for (unsigned Idx = 0; Idx < NumElem; Idx++) {
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SDValue Ex = DAG.getNode(
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ISD::EXTRACT_VECTOR_ELT, dl, VT.getScalarType(), Node->getOperand(0),
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DAG.getConstant(Idx, dl, TLI.getVectorIdxTy(DAG.getDataLayout())));
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SDValue Sh = DAG.getNode(
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ISD::EXTRACT_VECTOR_ELT, dl, VT.getScalarType(), Node->getOperand(1),
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DAG.getConstant(Idx, dl, TLI.getVectorIdxTy(DAG.getDataLayout())));
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SDValue Ex =
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DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, VT.getScalarType(),
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Node->getOperand(0), DAG.getVectorIdxConstant(Idx, dl));
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SDValue Sh =
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DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, VT.getScalarType(),
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Node->getOperand(1), DAG.getVectorIdxConstant(Idx, dl));
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Scalars.push_back(DAG.getNode(Node->getOpcode(), dl,
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VT.getScalarType(), Ex, Sh));
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}
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@ -370,9 +370,8 @@ SDValue DAGTypeLegalizer::PromoteIntRes_BITCAST(SDNode *N) {
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OutVT.getVectorNumElements() * Scale);
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if (isTypeLegal(WideOutVT)) {
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InOp = DAG.getBitcast(WideOutVT, GetWidenedVector(InOp));
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MVT IdxTy = TLI.getVectorIdxTy(DAG.getDataLayout());
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InOp = DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, OutVT, InOp,
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DAG.getConstant(0, dl, IdxTy));
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DAG.getVectorIdxConstant(0, dl));
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return DAG.getNode(ISD::ANY_EXTEND, dl, NOutVT, InOp);
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}
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}
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@ -1048,8 +1047,7 @@ SDValue DAGTypeLegalizer::PromoteIntRes_TRUNCATE(SDNode *N) {
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SDValue WideExt = DAG.getNode(ISD::ZERO_EXTEND, dl, ExtVT, WideTrunc);
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// Extract the low NVT subvector.
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MVT IdxTy = TLI.getVectorIdxTy(DAG.getDataLayout());
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SDValue ZeroIdx = DAG.getConstant(0, dl, IdxTy);
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SDValue ZeroIdx = DAG.getVectorIdxConstant(0, dl);
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return DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, NVT, WideExt, ZeroIdx);
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}
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}
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@ -4319,9 +4317,8 @@ SDValue DAGTypeLegalizer::PromoteIntRes_CONCAT_VECTORS(SDNode *N) {
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"Unexpected number of elements");
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for (unsigned j = 0; j < NumElem; ++j) {
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SDValue Ext = DAG.getNode(
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ISD::EXTRACT_VECTOR_ELT, dl, SclrTy, Op,
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DAG.getConstant(j, dl, TLI.getVectorIdxTy(DAG.getDataLayout())));
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SDValue Ext = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, SclrTy, Op,
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DAG.getVectorIdxConstant(j, dl));
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Ops[i * NumElem + j] = DAG.getAnyExtOrTrunc(Ext, dl, OutElemTy);
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}
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}
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@ -4429,9 +4426,8 @@ SDValue DAGTypeLegalizer::PromoteIntOp_CONCAT_VECTORS(SDNode *N) {
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for (unsigned i=0; i<NumElem; ++i) {
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// Extract element from incoming vector
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SDValue Ex = DAG.getNode(
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ISD::EXTRACT_VECTOR_ELT, dl, SclrTy, Incoming,
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DAG.getConstant(i, dl, TLI.getVectorIdxTy(DAG.getDataLayout())));
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SDValue Ex = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, SclrTy, Incoming,
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DAG.getVectorIdxConstant(i, dl));
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SDValue Tr = DAG.getNode(ISD::TRUNCATE, dl, RetSclrTy, Ex);
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NewOps.push_back(Tr);
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}
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@ -119,9 +119,8 @@ void DAGTypeLegalizer::ExpandRes_BITCAST(SDNode *N, SDValue &Lo, SDValue &Hi) {
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SmallVector<SDValue, 8> Vals;
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for (unsigned i = 0; i < NumElems; ++i)
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Vals.push_back(DAG.getNode(
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ISD::EXTRACT_VECTOR_ELT, dl, ElemVT, CastInOp,
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DAG.getConstant(i, dl, TLI.getVectorIdxTy(DAG.getDataLayout()))));
|
||||
Vals.push_back(DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, ElemVT,
|
||||
CastInOp, DAG.getVectorIdxConstant(i, dl)));
|
||||
|
||||
// Build Lo, Hi pair by pairing extracted elements if needed.
|
||||
unsigned Slot = 0;
|
||||
|
|
|
@ -1087,9 +1087,8 @@ SDValue VectorLegalizer::ExpandANY_EXTEND_VECTOR_INREG(SDNode *Node) {
|
|||
NumSrcElements = VT.getSizeInBits() / SrcVT.getScalarSizeInBits();
|
||||
SrcVT = EVT::getVectorVT(*DAG.getContext(), SrcVT.getScalarType(),
|
||||
NumSrcElements);
|
||||
Src = DAG.getNode(
|
||||
ISD::INSERT_SUBVECTOR, DL, SrcVT, DAG.getUNDEF(SrcVT), Src,
|
||||
DAG.getConstant(0, DL, TLI.getVectorIdxTy(DAG.getDataLayout())));
|
||||
Src = DAG.getNode(ISD::INSERT_SUBVECTOR, DL, SrcVT, DAG.getUNDEF(SrcVT),
|
||||
Src, DAG.getVectorIdxConstant(0, DL));
|
||||
}
|
||||
|
||||
// Build a base mask of undef shuffles.
|
||||
|
@ -1147,9 +1146,8 @@ SDValue VectorLegalizer::ExpandZERO_EXTEND_VECTOR_INREG(SDNode *Node) {
|
|||
NumSrcElements = VT.getSizeInBits() / SrcVT.getScalarSizeInBits();
|
||||
SrcVT = EVT::getVectorVT(*DAG.getContext(), SrcVT.getScalarType(),
|
||||
NumSrcElements);
|
||||
Src = DAG.getNode(
|
||||
ISD::INSERT_SUBVECTOR, DL, SrcVT, DAG.getUNDEF(SrcVT), Src,
|
||||
DAG.getConstant(0, DL, TLI.getVectorIdxTy(DAG.getDataLayout())));
|
||||
Src = DAG.getNode(ISD::INSERT_SUBVECTOR, DL, SrcVT, DAG.getUNDEF(SrcVT),
|
||||
Src, DAG.getVectorIdxConstant(0, DL));
|
||||
}
|
||||
|
||||
// Build up a zero vector to blend into this one.
|
||||
|
@ -1500,8 +1498,7 @@ void VectorLegalizer::UnrollStrictFPOp(SDNode *Node,
|
|||
SmallVector<SDValue, 32> OpChains;
|
||||
for (unsigned i = 0; i < NumElems; ++i) {
|
||||
SmallVector<SDValue, 4> Opers;
|
||||
SDValue Idx = DAG.getConstant(i, dl,
|
||||
TLI.getVectorIdxTy(DAG.getDataLayout()));
|
||||
SDValue Idx = DAG.getVectorIdxConstant(i, dl);
|
||||
|
||||
// The Chain is the first operand.
|
||||
Opers.push_back(Chain);
|
||||
|
@ -1551,12 +1548,10 @@ SDValue VectorLegalizer::UnrollVSETCC(SDNode *Node) {
|
|||
SDLoc dl(Node);
|
||||
SmallVector<SDValue, 8> Ops(NumElems);
|
||||
for (unsigned i = 0; i < NumElems; ++i) {
|
||||
SDValue LHSElem = DAG.getNode(
|
||||
ISD::EXTRACT_VECTOR_ELT, dl, TmpEltVT, LHS,
|
||||
DAG.getConstant(i, dl, TLI.getVectorIdxTy(DAG.getDataLayout())));
|
||||
SDValue RHSElem = DAG.getNode(
|
||||
ISD::EXTRACT_VECTOR_ELT, dl, TmpEltVT, RHS,
|
||||
DAG.getConstant(i, dl, TLI.getVectorIdxTy(DAG.getDataLayout())));
|
||||
SDValue LHSElem = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, TmpEltVT, LHS,
|
||||
DAG.getVectorIdxConstant(i, dl));
|
||||
SDValue RHSElem = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, TmpEltVT, RHS,
|
||||
DAG.getVectorIdxConstant(i, dl));
|
||||
Ops[i] = DAG.getNode(ISD::SETCC, dl,
|
||||
TLI.getSetCCResultType(DAG.getDataLayout(),
|
||||
*DAG.getContext(), TmpEltVT),
|
||||
|
|
|
@ -357,9 +357,8 @@ SDValue DAGTypeLegalizer::ScalarizeVecRes_UnaryOp(SDNode *N) {
|
|||
Op = GetScalarizedVector(Op);
|
||||
} else {
|
||||
EVT VT = OpVT.getVectorElementType();
|
||||
Op = DAG.getNode(
|
||||
ISD::EXTRACT_VECTOR_ELT, DL, VT, Op,
|
||||
DAG.getConstant(0, DL, TLI.getVectorIdxTy(DAG.getDataLayout())));
|
||||
Op = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, DL, VT, Op,
|
||||
DAG.getVectorIdxConstant(0, DL));
|
||||
}
|
||||
return DAG.getNode(N->getOpcode(), SDLoc(N), DestVT, Op);
|
||||
}
|
||||
|
@ -383,9 +382,8 @@ SDValue DAGTypeLegalizer::ScalarizeVecRes_VecInregOp(SDNode *N) {
|
|||
if (getTypeAction(OpVT) == TargetLowering::TypeScalarizeVector) {
|
||||
Op = GetScalarizedVector(Op);
|
||||
} else {
|
||||
Op = DAG.getNode(
|
||||
ISD::EXTRACT_VECTOR_ELT, DL, OpEltVT, Op,
|
||||
DAG.getConstant(0, DL, TLI.getVectorIdxTy(DAG.getDataLayout())));
|
||||
Op = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, DL, OpEltVT, Op,
|
||||
DAG.getVectorIdxConstant(0, DL));
|
||||
}
|
||||
|
||||
switch (N->getOpcode()) {
|
||||
|
@ -421,9 +419,8 @@ SDValue DAGTypeLegalizer::ScalarizeVecRes_VSELECT(SDNode *N) {
|
|||
Cond = GetScalarizedVector(Cond);
|
||||
} else {
|
||||
EVT VT = OpVT.getVectorElementType();
|
||||
Cond = DAG.getNode(
|
||||
ISD::EXTRACT_VECTOR_ELT, DL, VT, Cond,
|
||||
DAG.getConstant(0, DL, TLI.getVectorIdxTy(DAG.getDataLayout())));
|
||||
Cond = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, DL, VT, Cond,
|
||||
DAG.getVectorIdxConstant(0, DL));
|
||||
}
|
||||
|
||||
SDValue LHS = GetScalarizedVector(N->getOperand(1));
|
||||
|
@ -523,12 +520,10 @@ SDValue DAGTypeLegalizer::ScalarizeVecRes_SETCC(SDNode *N) {
|
|||
RHS = GetScalarizedVector(RHS);
|
||||
} else {
|
||||
EVT VT = OpVT.getVectorElementType();
|
||||
LHS = DAG.getNode(
|
||||
ISD::EXTRACT_VECTOR_ELT, DL, VT, LHS,
|
||||
DAG.getConstant(0, DL, TLI.getVectorIdxTy(DAG.getDataLayout())));
|
||||
RHS = DAG.getNode(
|
||||
ISD::EXTRACT_VECTOR_ELT, DL, VT, RHS,
|
||||
DAG.getConstant(0, DL, TLI.getVectorIdxTy(DAG.getDataLayout())));
|
||||
LHS = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, DL, VT, LHS,
|
||||
DAG.getVectorIdxConstant(0, DL));
|
||||
RHS = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, DL, VT, RHS,
|
||||
DAG.getVectorIdxConstant(0, DL));
|
||||
}
|
||||
|
||||
// Turn it into a scalar SETCC.
|
||||
|
@ -1116,9 +1111,9 @@ void DAGTypeLegalizer::SplitVecRes_EXTRACT_SUBVECTOR(SDNode *N, SDValue &Lo,
|
|||
|
||||
Lo = DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, LoVT, Vec, Idx);
|
||||
uint64_t IdxVal = cast<ConstantSDNode>(Idx)->getZExtValue();
|
||||
Hi = DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, HiVT, Vec,
|
||||
DAG.getConstant(IdxVal + LoVT.getVectorNumElements(), dl,
|
||||
TLI.getVectorIdxTy(DAG.getDataLayout())));
|
||||
Hi = DAG.getNode(
|
||||
ISD::EXTRACT_SUBVECTOR, dl, HiVT, Vec,
|
||||
DAG.getVectorIdxConstant(IdxVal + LoVT.getVectorNumElements(), dl));
|
||||
}
|
||||
|
||||
void DAGTypeLegalizer::SplitVecRes_INSERT_SUBVECTOR(SDNode *N, SDValue &Lo,
|
||||
|
@ -1332,10 +1327,8 @@ SDValue DAGTypeLegalizer::UnrollVectorOp_StrictFP(SDNode *N, unsigned ResNE) {
|
|||
EVT OperandVT = Operand.getValueType();
|
||||
if (OperandVT.isVector()) {
|
||||
EVT OperandEltVT = OperandVT.getVectorElementType();
|
||||
Operands[j] =
|
||||
DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, OperandEltVT, Operand,
|
||||
DAG.getConstant(i, dl, TLI.getVectorIdxTy(
|
||||
DAG.getDataLayout())));
|
||||
Operands[j] = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, OperandEltVT,
|
||||
Operand, DAG.getVectorIdxConstant(i, dl));
|
||||
} else {
|
||||
Operands[j] = Operand;
|
||||
}
|
||||
|
@ -1417,10 +1410,8 @@ void DAGTypeLegalizer::SplitVecRes_INSERT_VECTOR_ELT(SDNode *N, SDValue &Lo,
|
|||
Lo = DAG.getNode(ISD::INSERT_VECTOR_ELT, dl,
|
||||
Lo.getValueType(), Lo, Elt, Idx);
|
||||
else
|
||||
Hi =
|
||||
DAG.getNode(ISD::INSERT_VECTOR_ELT, dl, Hi.getValueType(), Hi, Elt,
|
||||
DAG.getConstant(IdxVal - LoNumElts, dl,
|
||||
TLI.getVectorIdxTy(DAG.getDataLayout())));
|
||||
Hi = DAG.getNode(ISD::INSERT_VECTOR_ELT, dl, Hi.getValueType(), Hi, Elt,
|
||||
DAG.getVectorIdxConstant(IdxVal - LoNumElts, dl));
|
||||
return;
|
||||
}
|
||||
|
||||
|
@ -1851,9 +1842,9 @@ void DAGTypeLegalizer::SplitVecRes_VECTOR_SHUFFLE(ShuffleVectorSDNode *N,
|
|||
Idx -= Input * NewElts;
|
||||
|
||||
// Extract the vector element by hand.
|
||||
SVOps.push_back(DAG.getNode(
|
||||
ISD::EXTRACT_VECTOR_ELT, dl, EltVT, Inputs[Input],
|
||||
DAG.getConstant(Idx, dl, TLI.getVectorIdxTy(DAG.getDataLayout()))));
|
||||
SVOps.push_back(DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, EltVT,
|
||||
Inputs[Input],
|
||||
DAG.getVectorIdxConstant(Idx, dl)));
|
||||
}
|
||||
|
||||
// Construct the Lo/Hi output using a BUILD_VECTOR.
|
||||
|
@ -2160,8 +2151,7 @@ SDValue DAGTypeLegalizer::SplitVecOp_EXTRACT_SUBVECTOR(SDNode *N) {
|
|||
return DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, SubVT, Lo, Idx);
|
||||
} else {
|
||||
return DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, SubVT, Hi,
|
||||
DAG.getConstant(IdxVal - LoElts, dl,
|
||||
Idx.getValueType()));
|
||||
DAG.getVectorIdxConstant(IdxVal - LoElts, dl));
|
||||
}
|
||||
}
|
||||
|
||||
|
@ -2487,9 +2477,8 @@ SDValue DAGTypeLegalizer::SplitVecOp_CONCAT_VECTORS(SDNode *N) {
|
|||
for (const SDValue &Op : N->op_values()) {
|
||||
for (unsigned i = 0, e = Op.getValueType().getVectorNumElements();
|
||||
i != e; ++i) {
|
||||
Elts.push_back(DAG.getNode(
|
||||
ISD::EXTRACT_VECTOR_ELT, DL, EltVT, Op,
|
||||
DAG.getConstant(i, DL, TLI.getVectorIdxTy(DAG.getDataLayout()))));
|
||||
Elts.push_back(DAG.getNode(ISD::EXTRACT_VECTOR_ELT, DL, EltVT, Op,
|
||||
DAG.getVectorIdxConstant(i, DL)));
|
||||
}
|
||||
}
|
||||
|
||||
|
@ -2924,9 +2913,8 @@ static SDValue CollectOpsToWiden(SelectionDAG &DAG, const TargetLowering &TLI,
|
|||
SDValue VecOp = DAG.getUNDEF(NextVT);
|
||||
unsigned NumToInsert = ConcatEnd - Idx - 1;
|
||||
for (unsigned i = 0, OpIdx = Idx+1; i < NumToInsert; i++, OpIdx++) {
|
||||
VecOp = DAG.getNode(
|
||||
ISD::INSERT_VECTOR_ELT, dl, NextVT, VecOp, ConcatOps[OpIdx],
|
||||
DAG.getConstant(i, dl, TLI.getVectorIdxTy(DAG.getDataLayout())));
|
||||
VecOp = DAG.getNode(ISD::INSERT_VECTOR_ELT, dl, NextVT, VecOp,
|
||||
ConcatOps[OpIdx], DAG.getVectorIdxConstant(i, dl));
|
||||
}
|
||||
ConcatOps[Idx+1] = VecOp;
|
||||
ConcatEnd = Idx + 2;
|
||||
|
@ -3008,12 +2996,10 @@ SDValue DAGTypeLegalizer::WidenVecRes_BinaryCanTrap(SDNode *N) {
|
|||
// }
|
||||
while (CurNumElts != 0) {
|
||||
while (CurNumElts >= NumElts) {
|
||||
SDValue EOp1 = DAG.getNode(
|
||||
ISD::EXTRACT_SUBVECTOR, dl, VT, InOp1,
|
||||
DAG.getConstant(Idx, dl, TLI.getVectorIdxTy(DAG.getDataLayout())));
|
||||
SDValue EOp2 = DAG.getNode(
|
||||
ISD::EXTRACT_SUBVECTOR, dl, VT, InOp2,
|
||||
DAG.getConstant(Idx, dl, TLI.getVectorIdxTy(DAG.getDataLayout())));
|
||||
SDValue EOp1 = DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, VT, InOp1,
|
||||
DAG.getVectorIdxConstant(Idx, dl));
|
||||
SDValue EOp2 = DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, VT, InOp2,
|
||||
DAG.getVectorIdxConstant(Idx, dl));
|
||||
ConcatOps[ConcatEnd++] = DAG.getNode(Opcode, dl, VT, EOp1, EOp2, Flags);
|
||||
Idx += NumElts;
|
||||
CurNumElts -= NumElts;
|
||||
|
@ -3025,12 +3011,10 @@ SDValue DAGTypeLegalizer::WidenVecRes_BinaryCanTrap(SDNode *N) {
|
|||
|
||||
if (NumElts == 1) {
|
||||
for (unsigned i = 0; i != CurNumElts; ++i, ++Idx) {
|
||||
SDValue EOp1 = DAG.getNode(
|
||||
ISD::EXTRACT_VECTOR_ELT, dl, WidenEltVT, InOp1,
|
||||
DAG.getConstant(Idx, dl, TLI.getVectorIdxTy(DAG.getDataLayout())));
|
||||
SDValue EOp2 = DAG.getNode(
|
||||
ISD::EXTRACT_VECTOR_ELT, dl, WidenEltVT, InOp2,
|
||||
DAG.getConstant(Idx, dl, TLI.getVectorIdxTy(DAG.getDataLayout())));
|
||||
SDValue EOp1 = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, WidenEltVT,
|
||||
InOp1, DAG.getVectorIdxConstant(Idx, dl));
|
||||
SDValue EOp2 = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, WidenEltVT,
|
||||
InOp2, DAG.getVectorIdxConstant(Idx, dl));
|
||||
ConcatOps[ConcatEnd++] = DAG.getNode(Opcode, dl, WidenEltVT,
|
||||
EOp1, EOp2, Flags);
|
||||
}
|
||||
|
@ -3108,14 +3092,13 @@ SDValue DAGTypeLegalizer::WidenVecRes_StrictFP(SDNode *N) {
|
|||
while (CurNumElts != 0) {
|
||||
while (CurNumElts >= NumElts) {
|
||||
SmallVector<SDValue, 4> EOps;
|
||||
|
||||
|
||||
for (unsigned i = 0; i < NumOpers; ++i) {
|
||||
SDValue Op = InOps[i];
|
||||
|
||||
if (Op.getValueType().isVector())
|
||||
Op = DAG.getNode(
|
||||
ISD::EXTRACT_SUBVECTOR, dl, VT, Op,
|
||||
DAG.getConstant(Idx, dl, TLI.getVectorIdxTy(DAG.getDataLayout())));
|
||||
|
||||
if (Op.getValueType().isVector())
|
||||
Op = DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, VT, Op,
|
||||
DAG.getVectorIdxConstant(Idx, dl));
|
||||
|
||||
EOps.push_back(Op);
|
||||
}
|
||||
|
@ -3140,10 +3123,8 @@ SDValue DAGTypeLegalizer::WidenVecRes_StrictFP(SDNode *N) {
|
|||
SDValue Op = InOps[i];
|
||||
|
||||
if (Op.getValueType().isVector())
|
||||
Op = DAG.getNode(
|
||||
ISD::EXTRACT_VECTOR_ELT, dl, WidenEltVT, Op,
|
||||
DAG.getConstant(Idx, dl,
|
||||
TLI.getVectorIdxTy(DAG.getDataLayout())));
|
||||
Op = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, WidenEltVT, Op,
|
||||
DAG.getVectorIdxConstant(Idx, dl));
|
||||
|
||||
EOps.push_back(Op);
|
||||
}
|
||||
|
@ -3190,8 +3171,7 @@ SDValue DAGTypeLegalizer::WidenVecRes_OverflowOp(SDNode *N, unsigned ResNo) {
|
|||
*DAG.getContext(), ResVT.getVectorElementType(),
|
||||
WideOvVT.getVectorNumElements());
|
||||
|
||||
SDValue Zero = DAG.getConstant(
|
||||
0, DL, TLI.getVectorIdxTy(DAG.getDataLayout()));
|
||||
SDValue Zero = DAG.getVectorIdxConstant(0, DL);
|
||||
WideLHS = DAG.getNode(
|
||||
ISD::INSERT_SUBVECTOR, DL, WideResVT, DAG.getUNDEF(WideResVT),
|
||||
N->getOperand(0), Zero);
|
||||
|
@ -3210,8 +3190,7 @@ SDValue DAGTypeLegalizer::WidenVecRes_OverflowOp(SDNode *N, unsigned ResNo) {
|
|||
if (getTypeAction(OtherVT) == TargetLowering::TypeWidenVector) {
|
||||
SetWidenedVector(SDValue(N, OtherNo), SDValue(WideNode, OtherNo));
|
||||
} else {
|
||||
SDValue Zero = DAG.getConstant(
|
||||
0, DL, TLI.getVectorIdxTy(DAG.getDataLayout()));
|
||||
SDValue Zero = DAG.getVectorIdxConstant(0, DL);
|
||||
SDValue OtherVal = DAG.getNode(
|
||||
ISD::EXTRACT_SUBVECTOR, DL, OtherVT, SDValue(WideNode, OtherNo), Zero);
|
||||
ReplaceValueWith(SDValue(N, OtherNo), OtherVal);
|
||||
|
@ -3274,9 +3253,8 @@ SDValue DAGTypeLegalizer::WidenVecRes_Convert(SDNode *N) {
|
|||
}
|
||||
|
||||
if (InVTNumElts % WidenNumElts == 0) {
|
||||
SDValue InVal = DAG.getNode(
|
||||
ISD::EXTRACT_SUBVECTOR, DL, InWidenVT, InOp,
|
||||
DAG.getConstant(0, DL, TLI.getVectorIdxTy(DAG.getDataLayout())));
|
||||
SDValue InVal = DAG.getNode(ISD::EXTRACT_SUBVECTOR, DL, InWidenVT, InOp,
|
||||
DAG.getVectorIdxConstant(0, DL));
|
||||
// Extract the input and convert the shorten input vector.
|
||||
if (N->getNumOperands() == 1)
|
||||
return DAG.getNode(Opcode, DL, WidenVT, InVal);
|
||||
|
@ -3291,9 +3269,8 @@ SDValue DAGTypeLegalizer::WidenVecRes_Convert(SDNode *N) {
|
|||
// necessary.
|
||||
unsigned MinElts = N->getValueType(0).getVectorNumElements();
|
||||
for (unsigned i=0; i < MinElts; ++i) {
|
||||
SDValue Val = DAG.getNode(
|
||||
ISD::EXTRACT_VECTOR_ELT, DL, InEltVT, InOp,
|
||||
DAG.getConstant(i, DL, TLI.getVectorIdxTy(DAG.getDataLayout())));
|
||||
SDValue Val = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, DL, InEltVT, InOp,
|
||||
DAG.getVectorIdxConstant(i, DL));
|
||||
if (N->getNumOperands() == 1)
|
||||
Ops[i] = DAG.getNode(Opcode, DL, EltVT, Val);
|
||||
else
|
||||
|
@ -3328,9 +3305,8 @@ SDValue DAGTypeLegalizer::WidenVecRes_Convert_StrictFP(SDNode *N) {
|
|||
// necessary.
|
||||
unsigned MinElts = N->getValueType(0).getVectorNumElements();
|
||||
for (unsigned i=0; i < MinElts; ++i) {
|
||||
NewOps[1] = DAG.getNode(
|
||||
ISD::EXTRACT_VECTOR_ELT, DL, InEltVT, InOp,
|
||||
DAG.getConstant(i, DL, TLI.getVectorIdxTy(DAG.getDataLayout())));
|
||||
NewOps[1] = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, DL, InEltVT, InOp,
|
||||
DAG.getVectorIdxConstant(i, DL));
|
||||
Ops[i] = DAG.getNode(Opcode, DL, EltVTs, NewOps);
|
||||
OpChains.push_back(Ops[i].getValue(1));
|
||||
}
|
||||
|
@ -3370,7 +3346,7 @@ SDValue DAGTypeLegalizer::WidenVecRes_EXTEND_VECTOR_INREG(SDNode *N) {
|
|||
SmallVector<SDValue, 16> Ops;
|
||||
for (unsigned i = 0, e = std::min(InVTNumElts, WidenNumElts); i != e; ++i) {
|
||||
SDValue Val = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, DL, InSVT, InOp,
|
||||
DAG.getConstant(i, DL, TLI.getVectorIdxTy(DAG.getDataLayout())));
|
||||
DAG.getVectorIdxConstant(i, DL));
|
||||
switch (Opcode) {
|
||||
case ISD::ANY_EXTEND_VECTOR_INREG:
|
||||
Val = DAG.getNode(ISD::ANY_EXTEND, DL, WidenSVT, Val);
|
||||
|
@ -3626,10 +3602,9 @@ SDValue DAGTypeLegalizer::WidenVecRes_CONCAT_VECTORS(SDNode *N) {
|
|||
SDValue InOp = N->getOperand(i);
|
||||
if (InputWidened)
|
||||
InOp = GetWidenedVector(InOp);
|
||||
for (unsigned j=0; j < NumInElts; ++j)
|
||||
Ops[Idx++] = DAG.getNode(
|
||||
ISD::EXTRACT_VECTOR_ELT, dl, EltVT, InOp,
|
||||
DAG.getConstant(j, dl, TLI.getVectorIdxTy(DAG.getDataLayout())));
|
||||
for (unsigned j = 0; j < NumInElts; ++j)
|
||||
Ops[Idx++] = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, EltVT, InOp,
|
||||
DAG.getVectorIdxConstant(j, dl));
|
||||
}
|
||||
SDValue UndefVal = DAG.getUNDEF(EltVT);
|
||||
for (; Idx < WidenNumElts; ++Idx)
|
||||
|
@ -3666,11 +3641,9 @@ SDValue DAGTypeLegalizer::WidenVecRes_EXTRACT_SUBVECTOR(SDNode *N) {
|
|||
EVT EltVT = VT.getVectorElementType();
|
||||
unsigned NumElts = VT.getVectorNumElements();
|
||||
unsigned i;
|
||||
for (i=0; i < NumElts; ++i)
|
||||
Ops[i] =
|
||||
DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, EltVT, InOp,
|
||||
DAG.getConstant(IdxVal + i, dl,
|
||||
TLI.getVectorIdxTy(DAG.getDataLayout())));
|
||||
for (i = 0; i < NumElts; ++i)
|
||||
Ops[i] = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, EltVT, InOp,
|
||||
DAG.getVectorIdxConstant(IdxVal + i, dl));
|
||||
|
||||
SDValue UndefVal = DAG.getUNDEF(EltVT);
|
||||
for (; i < WidenNumElts; ++i)
|
||||
|
@ -3877,8 +3850,7 @@ SDValue DAGTypeLegalizer::convertMask(SDValue InMask, EVT MaskVT,
|
|||
// Adjust Mask to the right number of elements.
|
||||
unsigned CurrMaskNumEls = Mask->getValueType(0).getVectorNumElements();
|
||||
if (CurrMaskNumEls > ToMaskVT.getVectorNumElements()) {
|
||||
MVT IdxTy = TLI.getVectorIdxTy(DAG.getDataLayout());
|
||||
SDValue ZeroIdx = DAG.getConstant(0, SDLoc(Mask), IdxTy);
|
||||
SDValue ZeroIdx = DAG.getVectorIdxConstant(0, SDLoc(Mask));
|
||||
Mask = DAG.getNode(ISD::EXTRACT_SUBVECTOR, SDLoc(Mask), ToMaskVT, Mask,
|
||||
ZeroIdx);
|
||||
} else if (CurrMaskNumEls < ToMaskVT.getVectorNumElements()) {
|
||||
|
@ -4144,12 +4116,10 @@ SDValue DAGTypeLegalizer::WidenVecRes_STRICT_FSETCC(SDNode *N) {
|
|||
SmallVector<SDValue, 8> Scalars(WidenNumElts, DAG.getUNDEF(EltVT));
|
||||
SmallVector<SDValue, 8> Chains(NumElts);
|
||||
for (unsigned i = 0; i != NumElts; ++i) {
|
||||
SDValue LHSElem = DAG.getNode(
|
||||
ISD::EXTRACT_VECTOR_ELT, dl, TmpEltVT, LHS,
|
||||
DAG.getConstant(i, dl, TLI.getVectorIdxTy(DAG.getDataLayout())));
|
||||
SDValue RHSElem = DAG.getNode(
|
||||
ISD::EXTRACT_VECTOR_ELT, dl, TmpEltVT, RHS,
|
||||
DAG.getConstant(i, dl, TLI.getVectorIdxTy(DAG.getDataLayout())));
|
||||
SDValue LHSElem = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, TmpEltVT, LHS,
|
||||
DAG.getVectorIdxConstant(i, dl));
|
||||
SDValue RHSElem = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, TmpEltVT, RHS,
|
||||
DAG.getVectorIdxConstant(i, dl));
|
||||
|
||||
Scalars[i] = DAG.getNode(N->getOpcode(), dl, {MVT::i1, MVT::Other},
|
||||
{Chain, LHSElem, RHSElem, CC});
|
||||
|
@ -4288,13 +4258,12 @@ SDValue DAGTypeLegalizer::WidenVecOp_EXTEND(SDNode *N) {
|
|||
assert(FixedVT.getVectorNumElements() != InVT.getVectorNumElements() &&
|
||||
"We can't have the same type as we started with!");
|
||||
if (FixedVT.getVectorNumElements() > InVT.getVectorNumElements())
|
||||
InOp = DAG.getNode(
|
||||
ISD::INSERT_SUBVECTOR, DL, FixedVT, DAG.getUNDEF(FixedVT), InOp,
|
||||
DAG.getConstant(0, DL, TLI.getVectorIdxTy(DAG.getDataLayout())));
|
||||
InOp = DAG.getNode(ISD::INSERT_SUBVECTOR, DL, FixedVT,
|
||||
DAG.getUNDEF(FixedVT), InOp,
|
||||
DAG.getVectorIdxConstant(0, DL));
|
||||
else
|
||||
InOp = DAG.getNode(
|
||||
ISD::EXTRACT_SUBVECTOR, DL, FixedVT, InOp,
|
||||
DAG.getConstant(0, DL, TLI.getVectorIdxTy(DAG.getDataLayout())));
|
||||
InOp = DAG.getNode(ISD::EXTRACT_SUBVECTOR, DL, FixedVT, InOp,
|
||||
DAG.getVectorIdxConstant(0, DL));
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
@ -4363,9 +4332,8 @@ SDValue DAGTypeLegalizer::WidenVecOp_Convert(SDNode *N) {
|
|||
else
|
||||
Res = DAG.getNode(Opcode, dl, WideVT, InOp);
|
||||
}
|
||||
return DAG.getNode(
|
||||
ISD::EXTRACT_SUBVECTOR, dl, VT, Res,
|
||||
DAG.getConstant(0, dl, TLI.getVectorIdxTy(DAG.getDataLayout())));
|
||||
return DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, VT, Res,
|
||||
DAG.getVectorIdxConstant(0, dl));
|
||||
}
|
||||
|
||||
EVT InEltVT = InVT.getVectorElementType();
|
||||
|
@ -4376,9 +4344,8 @@ SDValue DAGTypeLegalizer::WidenVecOp_Convert(SDNode *N) {
|
|||
SmallVector<SDValue, 4> NewOps(N->op_begin(), N->op_end());
|
||||
SmallVector<SDValue, 32> OpChains;
|
||||
for (unsigned i=0; i < NumElts; ++i) {
|
||||
NewOps[1] = DAG.getNode(
|
||||
ISD::EXTRACT_VECTOR_ELT, dl, InEltVT, InOp,
|
||||
DAG.getConstant(i, dl, TLI.getVectorIdxTy(DAG.getDataLayout())));
|
||||
NewOps[1] = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, InEltVT, InOp,
|
||||
DAG.getVectorIdxConstant(i, dl));
|
||||
Ops[i] = DAG.getNode(Opcode, dl, { EltVT, MVT::Other }, NewOps);
|
||||
OpChains.push_back(Ops[i].getValue(1));
|
||||
}
|
||||
|
@ -4386,11 +4353,9 @@ SDValue DAGTypeLegalizer::WidenVecOp_Convert(SDNode *N) {
|
|||
ReplaceValueWith(SDValue(N, 1), NewChain);
|
||||
} else {
|
||||
for (unsigned i = 0; i < NumElts; ++i)
|
||||
Ops[i] = DAG.getNode(
|
||||
Opcode, dl, EltVT,
|
||||
DAG.getNode(
|
||||
ISD::EXTRACT_VECTOR_ELT, dl, InEltVT, InOp,
|
||||
DAG.getConstant(i, dl, TLI.getVectorIdxTy(DAG.getDataLayout()))));
|
||||
Ops[i] = DAG.getNode(Opcode, dl, EltVT,
|
||||
DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, InEltVT,
|
||||
InOp, DAG.getVectorIdxConstant(i, dl)));
|
||||
}
|
||||
|
||||
return DAG.getBuildVector(VT, dl, Ops);
|
||||
|
@ -4411,9 +4376,8 @@ SDValue DAGTypeLegalizer::WidenVecOp_BITCAST(SDNode *N) {
|
|||
EVT NewVT = EVT::getVectorVT(*DAG.getContext(), VT, NewNumElts);
|
||||
if (TLI.isTypeLegal(NewVT)) {
|
||||
SDValue BitOp = DAG.getNode(ISD::BITCAST, dl, NewVT, InOp);
|
||||
return DAG.getNode(
|
||||
ISD::EXTRACT_VECTOR_ELT, dl, VT, BitOp,
|
||||
DAG.getConstant(0, dl, TLI.getVectorIdxTy(DAG.getDataLayout())));
|
||||
return DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, VT, BitOp,
|
||||
DAG.getVectorIdxConstant(0, dl));
|
||||
}
|
||||
}
|
||||
|
||||
|
@ -4430,7 +4394,7 @@ SDValue DAGTypeLegalizer::WidenVecOp_BITCAST(SDNode *N) {
|
|||
if (TLI.isTypeLegal(NewVT)) {
|
||||
SDValue BitOp = DAG.getNode(ISD::BITCAST, dl, NewVT, InOp);
|
||||
return DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, VT, BitOp,
|
||||
DAG.getConstant(0, dl, TLI.getVectorIdxTy(DAG.getDataLayout())));
|
||||
DAG.getVectorIdxConstant(0, dl));
|
||||
}
|
||||
}
|
||||
}
|
||||
|
@ -4470,10 +4434,9 @@ SDValue DAGTypeLegalizer::WidenVecOp_CONCAT_VECTORS(SDNode *N) {
|
|||
TargetLowering::TypeWidenVector &&
|
||||
"Unexpected type action");
|
||||
InOp = GetWidenedVector(InOp);
|
||||
for (unsigned j=0; j < NumInElts; ++j)
|
||||
Ops[Idx++] = DAG.getNode(
|
||||
ISD::EXTRACT_VECTOR_ELT, dl, EltVT, InOp,
|
||||
DAG.getConstant(j, dl, TLI.getVectorIdxTy(DAG.getDataLayout())));
|
||||
for (unsigned j = 0; j < NumInElts; ++j)
|
||||
Ops[Idx++] = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, EltVT, InOp,
|
||||
DAG.getVectorIdxConstant(j, dl));
|
||||
}
|
||||
return DAG.getBuildVector(VT, dl, Ops);
|
||||
}
|
||||
|
@ -4630,9 +4593,8 @@ SDValue DAGTypeLegalizer::WidenVecOp_SETCC(SDNode *N) {
|
|||
EVT ResVT = EVT::getVectorVT(*DAG.getContext(),
|
||||
SVT.getVectorElementType(),
|
||||
VT.getVectorNumElements());
|
||||
SDValue CC = DAG.getNode(
|
||||
ISD::EXTRACT_SUBVECTOR, dl, ResVT, WideSETCC,
|
||||
DAG.getConstant(0, dl, TLI.getVectorIdxTy(DAG.getDataLayout())));
|
||||
SDValue CC = DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, ResVT, WideSETCC,
|
||||
DAG.getVectorIdxConstant(0, dl));
|
||||
|
||||
EVT OpVT = N->getOperand(0).getValueType();
|
||||
ISD::NodeType ExtendCode =
|
||||
|
@ -4657,12 +4619,10 @@ SDValue DAGTypeLegalizer::WidenVecOp_STRICT_FSETCC(SDNode *N) {
|
|||
SmallVector<SDValue, 8> Chains(NumElts);
|
||||
|
||||
for (unsigned i = 0; i != NumElts; ++i) {
|
||||
SDValue LHSElem = DAG.getNode(
|
||||
ISD::EXTRACT_VECTOR_ELT, dl, TmpEltVT, LHS,
|
||||
DAG.getConstant(i, dl, TLI.getVectorIdxTy(DAG.getDataLayout())));
|
||||
SDValue RHSElem = DAG.getNode(
|
||||
ISD::EXTRACT_VECTOR_ELT, dl, TmpEltVT, RHS,
|
||||
DAG.getConstant(i, dl, TLI.getVectorIdxTy(DAG.getDataLayout())));
|
||||
SDValue LHSElem = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, TmpEltVT, LHS,
|
||||
DAG.getVectorIdxConstant(i, dl));
|
||||
SDValue RHSElem = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, TmpEltVT, RHS,
|
||||
DAG.getVectorIdxConstant(i, dl));
|
||||
|
||||
Scalars[i] = DAG.getNode(N->getOpcode(), dl, {MVT::i1, MVT::Other},
|
||||
{Chain, LHSElem, RHSElem, CC});
|
||||
|
@ -4729,7 +4689,7 @@ SDValue DAGTypeLegalizer::WidenVecOp_VECREDUCE(SDNode *N) {
|
|||
unsigned WideElts = WideVT.getVectorNumElements();
|
||||
for (unsigned Idx = OrigElts; Idx < WideElts; Idx++)
|
||||
Op = DAG.getNode(ISD::INSERT_VECTOR_ELT, dl, WideVT, Op, NeutralElem,
|
||||
DAG.getConstant(Idx, dl, TLI.getVectorIdxTy(DAG.getDataLayout())));
|
||||
DAG.getVectorIdxConstant(Idx, dl));
|
||||
|
||||
return DAG.getNode(N->getOpcode(), dl, N->getValueType(0), Op, N->getFlags());
|
||||
}
|
||||
|
@ -4748,9 +4708,8 @@ SDValue DAGTypeLegalizer::WidenVecOp_VSELECT(SDNode *N) {
|
|||
|
||||
SDValue Select = DAG.getNode(N->getOpcode(), DL, LeftIn.getValueType(), Cond,
|
||||
LeftIn, RightIn);
|
||||
return DAG.getNode(
|
||||
ISD::EXTRACT_SUBVECTOR, DL, VT, Select,
|
||||
DAG.getConstant(0, DL, TLI.getVectorIdxTy(DAG.getDataLayout())));
|
||||
return DAG.getNode(ISD::EXTRACT_SUBVECTOR, DL, VT, Select,
|
||||
DAG.getVectorIdxConstant(0, DL));
|
||||
}
|
||||
|
||||
//===----------------------------------------------------------------------===//
|
||||
|
@ -4836,7 +4795,6 @@ static EVT FindMemType(SelectionDAG& DAG, const TargetLowering &TLI,
|
|||
static SDValue BuildVectorFromScalar(SelectionDAG& DAG, EVT VecTy,
|
||||
SmallVectorImpl<SDValue> &LdOps,
|
||||
unsigned Start, unsigned End) {
|
||||
const TargetLowering &TLI = DAG.getTargetLoweringInfo();
|
||||
SDLoc dl(LdOps[Start]);
|
||||
EVT LdTy = LdOps[Start].getValueType();
|
||||
unsigned Width = VecTy.getSizeInBits();
|
||||
|
@ -4856,9 +4814,8 @@ static SDValue BuildVectorFromScalar(SelectionDAG& DAG, EVT VecTy,
|
|||
Idx = Idx * LdTy.getSizeInBits() / NewLdTy.getSizeInBits();
|
||||
LdTy = NewLdTy;
|
||||
}
|
||||
VecOp = DAG.getNode(
|
||||
ISD::INSERT_VECTOR_ELT, dl, NewVecVT, VecOp, LdOps[i],
|
||||
DAG.getConstant(Idx++, dl, TLI.getVectorIdxTy(DAG.getDataLayout())));
|
||||
VecOp = DAG.getNode(ISD::INSERT_VECTOR_ELT, dl, NewVecVT, VecOp, LdOps[i],
|
||||
DAG.getVectorIdxConstant(Idx++, dl));
|
||||
}
|
||||
return DAG.getNode(ISD::BITCAST, dl, VecTy, VecOp);
|
||||
}
|
||||
|
@ -5093,9 +5050,8 @@ void DAGTypeLegalizer::GenWidenVectorStores(SmallVectorImpl<SDValue> &StChain,
|
|||
if (NewVT.isVector()) {
|
||||
unsigned NumVTElts = NewVT.getVectorNumElements();
|
||||
do {
|
||||
SDValue EOp = DAG.getNode(
|
||||
ISD::EXTRACT_SUBVECTOR, dl, NewVT, ValOp,
|
||||
DAG.getConstant(Idx, dl, TLI.getVectorIdxTy(DAG.getDataLayout())));
|
||||
SDValue EOp = DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, NewVT, ValOp,
|
||||
DAG.getVectorIdxConstant(Idx, dl));
|
||||
StChain.push_back(DAG.getStore(
|
||||
Chain, dl, EOp, BasePtr, ST->getPointerInfo().getWithOffset(Offset),
|
||||
MinAlign(Align, Offset), MMOFlags, AAInfo));
|
||||
|
@ -5113,10 +5069,8 @@ void DAGTypeLegalizer::GenWidenVectorStores(SmallVectorImpl<SDValue> &StChain,
|
|||
// Readjust index position based on new vector type.
|
||||
Idx = Idx * ValEltWidth / NewVTWidth;
|
||||
do {
|
||||
SDValue EOp = DAG.getNode(
|
||||
ISD::EXTRACT_VECTOR_ELT, dl, NewVT, VecOp,
|
||||
DAG.getConstant(Idx++, dl,
|
||||
TLI.getVectorIdxTy(DAG.getDataLayout())));
|
||||
SDValue EOp = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, NewVT, VecOp,
|
||||
DAG.getVectorIdxConstant(Idx++, dl));
|
||||
StChain.push_back(DAG.getStore(
|
||||
Chain, dl, EOp, BasePtr, ST->getPointerInfo().getWithOffset(Offset),
|
||||
MinAlign(Align, Offset), MMOFlags, AAInfo));
|
||||
|
@ -5157,18 +5111,16 @@ DAGTypeLegalizer::GenWidenVectorTruncStores(SmallVectorImpl<SDValue> &StChain,
|
|||
EVT ValEltVT = ValVT.getVectorElementType();
|
||||
unsigned Increment = ValEltVT.getSizeInBits() / 8;
|
||||
unsigned NumElts = StVT.getVectorNumElements();
|
||||
SDValue EOp = DAG.getNode(
|
||||
ISD::EXTRACT_VECTOR_ELT, dl, ValEltVT, ValOp,
|
||||
DAG.getConstant(0, dl, TLI.getVectorIdxTy(DAG.getDataLayout())));
|
||||
SDValue EOp = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, ValEltVT, ValOp,
|
||||
DAG.getVectorIdxConstant(0, dl));
|
||||
StChain.push_back(DAG.getTruncStore(Chain, dl, EOp, BasePtr,
|
||||
ST->getPointerInfo(), StEltVT, Align,
|
||||
MMOFlags, AAInfo));
|
||||
unsigned Offset = Increment;
|
||||
for (unsigned i=1; i < NumElts; ++i, Offset += Increment) {
|
||||
SDValue NewBasePtr = DAG.getObjectPtrOffset(dl, BasePtr, Offset);
|
||||
SDValue EOp = DAG.getNode(
|
||||
ISD::EXTRACT_VECTOR_ELT, dl, ValEltVT, ValOp,
|
||||
DAG.getConstant(0, dl, TLI.getVectorIdxTy(DAG.getDataLayout())));
|
||||
SDValue EOp = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, ValEltVT, ValOp,
|
||||
DAG.getVectorIdxConstant(0, dl));
|
||||
StChain.push_back(DAG.getTruncStore(
|
||||
Chain, dl, EOp, NewBasePtr, ST->getPointerInfo().getWithOffset(Offset),
|
||||
StEltVT, MinAlign(Align, Offset), MMOFlags, AAInfo));
|
||||
|
@ -5206,9 +5158,8 @@ SDValue DAGTypeLegalizer::ModifyToType(SDValue InOp, EVT NVT,
|
|||
}
|
||||
|
||||
if (WidenNumElts < InNumElts && InNumElts % WidenNumElts)
|
||||
return DAG.getNode(
|
||||
ISD::EXTRACT_SUBVECTOR, dl, NVT, InOp,
|
||||
DAG.getConstant(0, dl, TLI.getVectorIdxTy(DAG.getDataLayout())));
|
||||
return DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, NVT, InOp,
|
||||
DAG.getVectorIdxConstant(0, dl));
|
||||
|
||||
// Fall back to extract and build.
|
||||
SmallVector<SDValue, 16> Ops(WidenNumElts);
|
||||
|
@ -5216,9 +5167,8 @@ SDValue DAGTypeLegalizer::ModifyToType(SDValue InOp, EVT NVT,
|
|||
unsigned MinNumElts = std::min(WidenNumElts, InNumElts);
|
||||
unsigned Idx;
|
||||
for (Idx = 0; Idx < MinNumElts; ++Idx)
|
||||
Ops[Idx] = DAG.getNode(
|
||||
ISD::EXTRACT_VECTOR_ELT, dl, EltVT, InOp,
|
||||
DAG.getConstant(Idx, dl, TLI.getVectorIdxTy(DAG.getDataLayout())));
|
||||
Ops[Idx] = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, EltVT, InOp,
|
||||
DAG.getVectorIdxConstant(Idx, dl));
|
||||
|
||||
SDValue FillVal = FillWithZeroes ? DAG.getConstant(0, dl, EltVT) :
|
||||
DAG.getUNDEF(EltVT);
|
||||
|
|
|
@ -1336,6 +1336,11 @@ SDValue SelectionDAG::getShiftAmountConstant(uint64_t Val, EVT VT,
|
|||
return getConstant(Val, DL, ShiftVT);
|
||||
}
|
||||
|
||||
SDValue SelectionDAG::getVectorIdxConstant(uint64_t Val, const SDLoc &DL,
|
||||
bool isTarget) {
|
||||
return getConstant(Val, DL, TLI->getVectorIdxTy(getDataLayout()), isTarget);
|
||||
}
|
||||
|
||||
SDValue SelectionDAG::getConstantFP(const APFloat &V, const SDLoc &DL, EVT VT,
|
||||
bool isTarget) {
|
||||
return getConstantFP(*ConstantFP::get(*getContext(), V), DL, VT, isTarget);
|
||||
|
@ -2413,7 +2418,7 @@ SDValue SelectionDAG::getSplatValue(SDValue V) {
|
|||
if (SDValue SrcVector = getSplatSourceVector(V, SplatIdx))
|
||||
return getNode(ISD::EXTRACT_VECTOR_ELT, SDLoc(V),
|
||||
SrcVector.getValueType().getScalarType(), SrcVector,
|
||||
getIntPtrConstant(SplatIdx, SDLoc(V)));
|
||||
getVectorIdxConstant(SplatIdx, SDLoc(V)));
|
||||
return SDValue();
|
||||
}
|
||||
|
||||
|
@ -5346,8 +5351,7 @@ SDValue SelectionDAG::getNode(unsigned Opcode, const SDLoc &DL, EVT VT,
|
|||
N1.getOperand(0).getValueType().getVectorNumElements();
|
||||
return getNode(ISD::EXTRACT_VECTOR_ELT, DL, VT,
|
||||
N1.getOperand(N2C->getZExtValue() / Factor),
|
||||
getConstant(N2C->getZExtValue() % Factor, DL,
|
||||
N2.getValueType()));
|
||||
getVectorIdxConstant(N2C->getZExtValue() % Factor, DL));
|
||||
}
|
||||
|
||||
// EXTRACT_VECTOR_ELT of BUILD_VECTOR is often formed while lowering is
|
||||
|
@ -9206,9 +9210,8 @@ SelectionDAG::matchBinOpReduction(SDNode *Extract, ISD::NodeType &BinOp,
|
|||
if (!TLI->isExtractSubvectorCheap(SubVT, OpVT, 0))
|
||||
return SDValue();
|
||||
BinOp = (ISD::NodeType)CandidateBinOp;
|
||||
return getNode(
|
||||
ISD::EXTRACT_SUBVECTOR, SDLoc(Op), SubVT, Op,
|
||||
getConstant(0, SDLoc(Op), TLI->getVectorIdxTy(getDataLayout())));
|
||||
return getNode(ISD::EXTRACT_SUBVECTOR, SDLoc(Op), SubVT, Op,
|
||||
getVectorIdxConstant(0, SDLoc(Op)));
|
||||
};
|
||||
|
||||
// At each stage, we're looking for something that looks like:
|
||||
|
@ -9286,9 +9289,8 @@ SDValue SelectionDAG::UnrollVectorOp(SDNode *N, unsigned ResNE) {
|
|||
if (OperandVT.isVector()) {
|
||||
// A vector operand; extract a single element.
|
||||
EVT OperandEltVT = OperandVT.getVectorElementType();
|
||||
Operands[j] =
|
||||
getNode(ISD::EXTRACT_VECTOR_ELT, dl, OperandEltVT, Operand,
|
||||
getConstant(i, dl, TLI->getVectorIdxTy(getDataLayout())));
|
||||
Operands[j] = getNode(ISD::EXTRACT_VECTOR_ELT, dl, OperandEltVT,
|
||||
Operand, getVectorIdxConstant(i, dl));
|
||||
} else {
|
||||
// A scalar operand; just use it as is.
|
||||
Operands[j] = Operand;
|
||||
|
@ -9466,11 +9468,10 @@ SelectionDAG::SplitVector(const SDValue &N, const SDLoc &DL, const EVT &LoVT,
|
|||
N.getValueType().getVectorNumElements() &&
|
||||
"More vector elements requested than available!");
|
||||
SDValue Lo, Hi;
|
||||
Lo = getNode(ISD::EXTRACT_SUBVECTOR, DL, LoVT, N,
|
||||
getConstant(0, DL, TLI->getVectorIdxTy(getDataLayout())));
|
||||
Lo =
|
||||
getNode(ISD::EXTRACT_SUBVECTOR, DL, LoVT, N, getVectorIdxConstant(0, DL));
|
||||
Hi = getNode(ISD::EXTRACT_SUBVECTOR, DL, HiVT, N,
|
||||
getConstant(LoVT.getVectorNumElements(), DL,
|
||||
TLI->getVectorIdxTy(getDataLayout())));
|
||||
getVectorIdxConstant(LoVT.getVectorNumElements(), DL));
|
||||
return std::make_pair(Lo, Hi);
|
||||
}
|
||||
|
||||
|
@ -9480,7 +9481,7 @@ SDValue SelectionDAG::WidenVector(const SDValue &N, const SDLoc &DL) {
|
|||
EVT WideVT = EVT::getVectorVT(*getContext(), VT.getVectorElementType(),
|
||||
NextPowerOf2(VT.getVectorNumElements()));
|
||||
return getNode(ISD::INSERT_SUBVECTOR, DL, WideVT, getUNDEF(WideVT), N,
|
||||
getConstant(0, DL, TLI->getVectorIdxTy(getDataLayout())));
|
||||
getVectorIdxConstant(0, DL));
|
||||
}
|
||||
|
||||
void SelectionDAG::ExtractVectorElements(SDValue Op,
|
||||
|
@ -9491,11 +9492,10 @@ void SelectionDAG::ExtractVectorElements(SDValue Op,
|
|||
Count = VT.getVectorNumElements();
|
||||
|
||||
EVT EltVT = VT.getVectorElementType();
|
||||
EVT IdxTy = TLI->getVectorIdxTy(getDataLayout());
|
||||
SDLoc SL(Op);
|
||||
for (unsigned i = Start, e = Start + Count; i != e; ++i) {
|
||||
Args.push_back(getNode(ISD::EXTRACT_VECTOR_ELT, SL, EltVT,
|
||||
Op, getConstant(i, SL, IdxTy)));
|
||||
Args.push_back(getNode(ISD::EXTRACT_VECTOR_ELT, SL, EltVT, Op,
|
||||
getVectorIdxConstant(i, SL)));
|
||||
}
|
||||
}
|
||||
|
||||
|
|
|
@ -438,9 +438,8 @@ static SDValue getCopyFromPartsVector(SelectionDAG &DAG, const SDLoc &DL,
|
|||
if (PartEVT.getVectorElementType() == ValueVT.getVectorElementType()) {
|
||||
assert(PartEVT.getVectorNumElements() > ValueVT.getVectorNumElements() &&
|
||||
"Cannot narrow, it would be a lossy transformation");
|
||||
return DAG.getNode(
|
||||
ISD::EXTRACT_SUBVECTOR, DL, ValueVT, Val,
|
||||
DAG.getConstant(0, DL, TLI.getVectorIdxTy(DAG.getDataLayout())));
|
||||
return DAG.getNode(ISD::EXTRACT_SUBVECTOR, DL, ValueVT, Val,
|
||||
DAG.getVectorIdxConstant(0, DL));
|
||||
}
|
||||
|
||||
// Vector/Vector bitcast.
|
||||
|
@ -472,9 +471,8 @@ static SDValue getCopyFromPartsVector(SelectionDAG &DAG, const SDLoc &DL,
|
|||
EVT WiderVecType = EVT::getVectorVT(*DAG.getContext(),
|
||||
ValueVT.getVectorElementType(), Elts);
|
||||
Val = DAG.getBitcast(WiderVecType, Val);
|
||||
return DAG.getNode(
|
||||
ISD::EXTRACT_SUBVECTOR, DL, ValueVT, Val,
|
||||
DAG.getConstant(0, DL, TLI.getVectorIdxTy(DAG.getDataLayout())));
|
||||
return DAG.getNode(ISD::EXTRACT_SUBVECTOR, DL, ValueVT, Val,
|
||||
DAG.getVectorIdxConstant(0, DL));
|
||||
}
|
||||
|
||||
diagnosePossiblyInvalidConstraint(
|
||||
|
@ -686,9 +684,8 @@ static void getCopyToPartsVector(SelectionDAG &DAG, const SDLoc &DL,
|
|||
Val = DAG.getAnyExtOrTrunc(Val, DL, PartVT);
|
||||
} else {
|
||||
if (ValueVT.getVectorNumElements() == 1) {
|
||||
Val = DAG.getNode(
|
||||
ISD::EXTRACT_VECTOR_ELT, DL, PartVT, Val,
|
||||
DAG.getConstant(0, DL, TLI.getVectorIdxTy(DAG.getDataLayout())));
|
||||
Val = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, DL, PartVT, Val,
|
||||
DAG.getVectorIdxConstant(0, DL));
|
||||
} else {
|
||||
assert(PartVT.getSizeInBits() > ValueVT.getSizeInBits() &&
|
||||
"lossy conversion of vector to scalar type");
|
||||
|
@ -731,7 +728,6 @@ static void getCopyToPartsVector(SelectionDAG &DAG, const SDLoc &DL,
|
|||
|
||||
EVT BuiltVectorTy = EVT::getVectorVT(
|
||||
*DAG.getContext(), IntermediateVT.getScalarType(), DestVectorNoElts);
|
||||
MVT IdxVT = TLI.getVectorIdxTy(DAG.getDataLayout());
|
||||
if (ValueVT != BuiltVectorTy) {
|
||||
if (SDValue Widened = widenVectorToPartType(DAG, Val, DL, BuiltVectorTy))
|
||||
Val = Widened;
|
||||
|
@ -743,12 +739,12 @@ static void getCopyToPartsVector(SelectionDAG &DAG, const SDLoc &DL,
|
|||
SmallVector<SDValue, 8> Ops(NumIntermediates);
|
||||
for (unsigned i = 0; i != NumIntermediates; ++i) {
|
||||
if (IntermediateVT.isVector()) {
|
||||
Ops[i] = DAG.getNode(ISD::EXTRACT_SUBVECTOR, DL, IntermediateVT, Val,
|
||||
DAG.getConstant(i * IntermediateNumElts, DL, IdxVT));
|
||||
Ops[i] =
|
||||
DAG.getNode(ISD::EXTRACT_SUBVECTOR, DL, IntermediateVT, Val,
|
||||
DAG.getVectorIdxConstant(i * IntermediateNumElts, DL));
|
||||
} else {
|
||||
Ops[i] = DAG.getNode(
|
||||
ISD::EXTRACT_VECTOR_ELT, DL, IntermediateVT, Val,
|
||||
DAG.getConstant(i, DL, IdxVT));
|
||||
Ops[i] = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, DL, IntermediateVT, Val,
|
||||
DAG.getVectorIdxConstant(i, DL));
|
||||
}
|
||||
}
|
||||
|
||||
|
@ -3586,10 +3582,9 @@ void SelectionDAGBuilder::visitShuffleVector(const User &I) {
|
|||
|
||||
if (MaskV->isNullValue() && VT.isScalableVector()) {
|
||||
// Canonical splat form of first element of first input vector.
|
||||
SDValue FirstElt = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, DL,
|
||||
SrcVT.getScalarType(), Src1,
|
||||
DAG.getConstant(0, DL,
|
||||
TLI.getVectorIdxTy(DAG.getDataLayout())));
|
||||
SDValue FirstElt =
|
||||
DAG.getNode(ISD::EXTRACT_VECTOR_ELT, DL, SrcVT.getScalarType(), Src1,
|
||||
DAG.getVectorIdxConstant(0, DL));
|
||||
setValue(&I, DAG.getNode(ISD::SPLAT_VECTOR, DL, VT, FirstElt));
|
||||
return;
|
||||
}
|
||||
|
@ -3683,9 +3678,8 @@ void SelectionDAGBuilder::visitShuffleVector(const User &I) {
|
|||
// If the concatenated vector was padded, extract a subvector with the
|
||||
// correct number of elements.
|
||||
if (MaskNumElts != PaddedMaskNumElts)
|
||||
Result = DAG.getNode(
|
||||
ISD::EXTRACT_SUBVECTOR, DL, VT, Result,
|
||||
DAG.getConstant(0, DL, TLI.getVectorIdxTy(DAG.getDataLayout())));
|
||||
Result = DAG.getNode(ISD::EXTRACT_SUBVECTOR, DL, VT, Result,
|
||||
DAG.getVectorIdxConstant(0, DL));
|
||||
|
||||
setValue(&I, Result);
|
||||
return;
|
||||
|
@ -3729,10 +3723,8 @@ void SelectionDAGBuilder::visitShuffleVector(const User &I) {
|
|||
if (StartIdx[Input] < 0)
|
||||
Src = DAG.getUNDEF(VT);
|
||||
else {
|
||||
Src = DAG.getNode(
|
||||
ISD::EXTRACT_SUBVECTOR, DL, VT, Src,
|
||||
DAG.getConstant(StartIdx[Input], DL,
|
||||
TLI.getVectorIdxTy(DAG.getDataLayout())));
|
||||
Src = DAG.getNode(ISD::EXTRACT_SUBVECTOR, DL, VT, Src,
|
||||
DAG.getVectorIdxConstant(StartIdx[Input], DL));
|
||||
}
|
||||
}
|
||||
|
||||
|
@ -3754,7 +3746,6 @@ void SelectionDAGBuilder::visitShuffleVector(const User &I) {
|
|||
// replacing the shuffle with extract and build vector.
|
||||
// to insert and build vector.
|
||||
EVT EltVT = VT.getVectorElementType();
|
||||
EVT IdxVT = TLI.getVectorIdxTy(DAG.getDataLayout());
|
||||
SmallVector<SDValue,8> Ops;
|
||||
for (int Idx : Mask) {
|
||||
SDValue Res;
|
||||
|
@ -3765,8 +3756,8 @@ void SelectionDAGBuilder::visitShuffleVector(const User &I) {
|
|||
SDValue &Src = Idx < (int)SrcNumElts ? Src1 : Src2;
|
||||
if (Idx >= (int)SrcNumElts) Idx -= SrcNumElts;
|
||||
|
||||
Res = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, DL,
|
||||
EltVT, Src, DAG.getConstant(Idx, DL, IdxVT));
|
||||
Res = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, DL, EltVT, Src,
|
||||
DAG.getVectorIdxConstant(Idx, DL));
|
||||
}
|
||||
|
||||
Ops.push_back(Res);
|
||||
|
|
|
@ -6548,7 +6548,6 @@ SDValue TargetLowering::scalarizeVectorStore(StoreSDNode *ST,
|
|||
// The type of data as saved in memory.
|
||||
EVT MemSclVT = StVT.getScalarType();
|
||||
|
||||
EVT IdxVT = getVectorIdxTy(DAG.getDataLayout());
|
||||
unsigned NumElem = StVT.getVectorNumElements();
|
||||
|
||||
// A vector must always be stored in memory as-is, i.e. without any padding
|
||||
|
@ -6565,7 +6564,7 @@ SDValue TargetLowering::scalarizeVectorStore(StoreSDNode *ST,
|
|||
|
||||
for (unsigned Idx = 0; Idx < NumElem; ++Idx) {
|
||||
SDValue Elt = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, SL, RegSclVT, Value,
|
||||
DAG.getConstant(Idx, SL, IdxVT));
|
||||
DAG.getVectorIdxConstant(Idx, SL));
|
||||
SDValue Trunc = DAG.getNode(ISD::TRUNCATE, SL, MemSclVT, Elt);
|
||||
SDValue ExtElt = DAG.getNode(ISD::ZERO_EXTEND, SL, IntVT, Trunc);
|
||||
unsigned ShiftIntoIdx =
|
||||
|
@ -6590,7 +6589,7 @@ SDValue TargetLowering::scalarizeVectorStore(StoreSDNode *ST,
|
|||
SmallVector<SDValue, 8> Stores;
|
||||
for (unsigned Idx = 0; Idx < NumElem; ++Idx) {
|
||||
SDValue Elt = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, SL, RegSclVT, Value,
|
||||
DAG.getConstant(Idx, SL, IdxVT));
|
||||
DAG.getVectorIdxConstant(Idx, SL));
|
||||
|
||||
SDValue Ptr = DAG.getObjectPtrOffset(SL, BasePtr, Idx * Stride);
|
||||
|
||||
|
|
|
@ -1383,12 +1383,11 @@ AMDGPUTargetLowering::splitVector(const SDValue &N, const SDLoc &DL,
|
|||
(HiVT.isVector() ? HiVT.getVectorNumElements() : 1) <=
|
||||
N.getValueType().getVectorNumElements() &&
|
||||
"More vector elements requested than available!");
|
||||
auto IdxTy = getVectorIdxTy(DAG.getDataLayout());
|
||||
SDValue Lo = DAG.getNode(ISD::EXTRACT_SUBVECTOR, DL, LoVT, N,
|
||||
DAG.getConstant(0, DL, IdxTy));
|
||||
DAG.getVectorIdxConstant(0, DL));
|
||||
SDValue Hi = DAG.getNode(
|
||||
HiVT.isVector() ? ISD::EXTRACT_SUBVECTOR : ISD::EXTRACT_VECTOR_ELT, DL,
|
||||
HiVT, N, DAG.getConstant(LoVT.getVectorNumElements(), DL, IdxTy));
|
||||
HiVT, N, DAG.getVectorIdxConstant(LoVT.getVectorNumElements(), DL));
|
||||
return std::make_pair(Lo, Hi);
|
||||
}
|
||||
|
||||
|
@ -1433,18 +1432,17 @@ SDValue AMDGPUTargetLowering::SplitVectorLoad(const SDValue Op,
|
|||
HiPtr, SrcValue.getWithOffset(LoMemVT.getStoreSize()),
|
||||
HiMemVT, HiAlign, Load->getMemOperand()->getFlags());
|
||||
|
||||
auto IdxTy = getVectorIdxTy(DAG.getDataLayout());
|
||||
SDValue Join;
|
||||
if (LoVT == HiVT) {
|
||||
// This is the case that the vector is power of two so was evenly split.
|
||||
Join = DAG.getNode(ISD::CONCAT_VECTORS, SL, VT, LoLoad, HiLoad);
|
||||
} else {
|
||||
Join = DAG.getNode(ISD::INSERT_SUBVECTOR, SL, VT, DAG.getUNDEF(VT), LoLoad,
|
||||
DAG.getConstant(0, SL, IdxTy));
|
||||
Join = DAG.getNode(HiVT.isVector() ? ISD::INSERT_SUBVECTOR
|
||||
: ISD::INSERT_VECTOR_ELT,
|
||||
SL, VT, Join, HiLoad,
|
||||
DAG.getConstant(LoVT.getVectorNumElements(), SL, IdxTy));
|
||||
DAG.getVectorIdxConstant(0, SL));
|
||||
Join = DAG.getNode(
|
||||
HiVT.isVector() ? ISD::INSERT_SUBVECTOR : ISD::INSERT_VECTOR_ELT, SL,
|
||||
VT, Join, HiLoad,
|
||||
DAG.getVectorIdxConstant(LoVT.getVectorNumElements(), SL));
|
||||
}
|
||||
|
||||
SDValue Ops[] = {Join, DAG.getNode(ISD::TokenFactor, SL, MVT::Other,
|
||||
|
@ -1474,7 +1472,7 @@ SDValue AMDGPUTargetLowering::WidenVectorLoad(SDValue Op,
|
|||
WideMemVT, BaseAlign, Load->getMemOperand()->getFlags());
|
||||
return DAG.getMergeValues(
|
||||
{DAG.getNode(ISD::EXTRACT_SUBVECTOR, SL, VT, WideLoad,
|
||||
DAG.getConstant(0, SL, getVectorIdxTy(DAG.getDataLayout()))),
|
||||
DAG.getVectorIdxConstant(0, SL)),
|
||||
WideLoad.getValue(1)},
|
||||
SL);
|
||||
}
|
||||
|
|
|
@ -699,9 +699,8 @@ SDValue R600TargetLowering::vectorToVerticalVector(SelectionDAG &DAG,
|
|||
SmallVector<SDValue, 8> Args;
|
||||
|
||||
for (unsigned i = 0, e = VecVT.getVectorNumElements(); i != e; ++i) {
|
||||
Args.push_back(DAG.getNode(
|
||||
ISD::EXTRACT_VECTOR_ELT, DL, EltVT, Vector,
|
||||
DAG.getConstant(i, DL, getVectorIdxTy(DAG.getDataLayout()))));
|
||||
Args.push_back(DAG.getNode(ISD::EXTRACT_VECTOR_ELT, DL, EltVT, Vector,
|
||||
DAG.getVectorIdxConstant(i, DL)));
|
||||
}
|
||||
|
||||
return DAG.getNode(AMDGPUISD::BUILD_VERTICAL_VECTOR, DL, VecVT, Args);
|
||||
|
|
|
@ -5687,9 +5687,8 @@ SDValue SITargetLowering::lowerSBuffer(EVT VT, SDLoc DL, SDValue Rsrc,
|
|||
auto WidenedOp = DAG.getMemIntrinsicNode(
|
||||
AMDGPUISD::SBUFFER_LOAD, DL, DAG.getVTList(WidenedVT), Ops, WidenedVT,
|
||||
MF.getMachineMemOperand(MMO, 0, WidenedVT.getStoreSize()));
|
||||
auto Subvector = DAG.getNode(
|
||||
ISD::EXTRACT_SUBVECTOR, DL, VT, WidenedOp,
|
||||
DAG.getConstant(0, DL, getVectorIdxTy(DAG.getDataLayout())));
|
||||
auto Subvector = DAG.getNode(ISD::EXTRACT_SUBVECTOR, DL, VT, WidenedOp,
|
||||
DAG.getVectorIdxConstant(0, DL));
|
||||
return Subvector;
|
||||
}
|
||||
|
||||
|
@ -6743,9 +6742,8 @@ SDValue SITargetLowering::getMemIntrinsicNode(unsigned Opcode, const SDLoc &DL,
|
|||
auto NewOp = DAG.getMemIntrinsicNode(Opcode, DL, WidenedVTList, Ops,
|
||||
WidenedMemVT, MMO);
|
||||
if (WidenedVT != VT) {
|
||||
auto Extract = DAG.getNode(
|
||||
ISD::EXTRACT_SUBVECTOR, DL, VT, NewOp,
|
||||
DAG.getConstant(0, DL, getVectorIdxTy(DAG.getDataLayout())));
|
||||
auto Extract = DAG.getNode(ISD::EXTRACT_SUBVECTOR, DL, VT, NewOp,
|
||||
DAG.getVectorIdxConstant(0, DL));
|
||||
NewOp = DAG.getMergeValues({ Extract, SDValue(NewOp.getNode(), 1) }, DL);
|
||||
}
|
||||
return NewOp;
|
||||
|
@ -9316,10 +9314,9 @@ SDValue SITargetLowering::performExtractVectorEltCombine(
|
|||
!isa<ConstantSDNode>(N->getOperand(1))) {
|
||||
SDLoc SL(N);
|
||||
SDValue Idx = N->getOperand(1);
|
||||
EVT IdxVT = Idx.getValueType();
|
||||
SDValue V;
|
||||
for (unsigned I = 0, E = VecVT.getVectorNumElements(); I < E; ++I) {
|
||||
SDValue IC = DAG.getConstant(I, SL, IdxVT);
|
||||
SDValue IC = DAG.getVectorIdxConstant(I, SL);
|
||||
SDValue Elt = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, SL, EltVT, Vec, IC);
|
||||
if (I == 0)
|
||||
V = Elt;
|
||||
|
|
|
@ -10145,9 +10145,8 @@ SDValue PPCTargetLowering::LowerVectorStore(SDValue Op,
|
|||
|
||||
SDValue Stores[4];
|
||||
for (unsigned Idx = 0; Idx < 4; ++Idx) {
|
||||
SDValue Ex = DAG.getNode(
|
||||
ISD::EXTRACT_VECTOR_ELT, dl, ScalarVT, Value,
|
||||
DAG.getConstant(Idx, dl, getVectorIdxTy(DAG.getDataLayout())));
|
||||
SDValue Ex = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, ScalarVT, Value,
|
||||
DAG.getVectorIdxConstant(Idx, dl));
|
||||
SDValue Store;
|
||||
if (ScalarVT != ScalarMemVT)
|
||||
Store =
|
||||
|
|
|
@ -9929,7 +9929,7 @@ X86TargetLowering::LowerBUILD_VECTOR(SDValue Op, SelectionDAG &DAG) const {
|
|||
assert(!VarElt.getNode() && !InsIndex.getNode() &&
|
||||
"Expected one variable element in this vector");
|
||||
VarElt = Elt;
|
||||
InsIndex = DAG.getConstant(i, dl, getVectorIdxTy(DAG.getDataLayout()));
|
||||
InsIndex = DAG.getVectorIdxConstant(i, dl);
|
||||
}
|
||||
}
|
||||
Constant *CV = ConstantVector::get(ConstVecOps);
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||||
|
@ -43843,11 +43843,9 @@ static SDValue combineVectorSizedSetCCEquality(SDNode *SetCC, SelectionDAG &DAG,
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X = DAG.getBitcast(TmpCastVT, X);
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||||
if (!NeedZExt && !TmpZext)
|
||||
return X;
|
||||
const TargetLowering &TLI = DAG.getTargetLoweringInfo();
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||||
MVT VecIdxVT = TLI.getVectorIdxTy(DAG.getDataLayout());
|
||||
return DAG.getNode(ISD::INSERT_SUBVECTOR, DL, VecVT,
|
||||
DAG.getConstant(0, DL, VecVT), X,
|
||||
DAG.getConstant(0, DL, VecIdxVT));
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||||
DAG.getVectorIdxConstant(0, DL));
|
||||
};
|
||||
|
||||
SDValue Cmp;
|
||||
|
|
Loading…
Reference in New Issue