forked from OSchip/llvm-project
[OPENMP 4.5] Additional codegen for statically scheduled loops with
'simd' modifier. Runtime library defines new schedule constant kmp_sch_static_balanced_chunked = 45 for static loop-based directives static with chunk adjustment (e.g., simd). Added codegen for this kind of schedule. llvm-svn: 271204
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@ -488,6 +488,8 @@ enum OpenMPSchedType {
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OMP_sch_guided_chunked = 36,
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OMP_sch_runtime = 37,
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OMP_sch_auto = 38,
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/// static with chunk adjustment (e.g., simd)
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OMP_sch_static_balanced_chunked = 45,
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/// \brief Lower bound for 'ordered' versions.
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OMP_ord_lower = 64,
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OMP_ord_static_chunked = 65,
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@ -2409,27 +2411,38 @@ bool CGOpenMPRuntime::isDynamic(OpenMPScheduleClauseKind ScheduleKind) const {
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static int addMonoNonMonoModifier(OpenMPSchedType Schedule,
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OpenMPScheduleClauseModifier M1,
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OpenMPScheduleClauseModifier M2) {
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int Modifier = 0;
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switch (M1) {
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case OMPC_SCHEDULE_MODIFIER_monotonic:
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return Schedule | OMP_sch_modifier_monotonic;
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Modifier = OMP_sch_modifier_monotonic;
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break;
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case OMPC_SCHEDULE_MODIFIER_nonmonotonic:
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return Schedule | OMP_sch_modifier_nonmonotonic;
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Modifier = OMP_sch_modifier_nonmonotonic;
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break;
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case OMPC_SCHEDULE_MODIFIER_simd:
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if (Schedule == OMP_sch_static_chunked)
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Schedule = OMP_sch_static_balanced_chunked;
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break;
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case OMPC_SCHEDULE_MODIFIER_last:
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case OMPC_SCHEDULE_MODIFIER_unknown:
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break;
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}
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switch (M2) {
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case OMPC_SCHEDULE_MODIFIER_monotonic:
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return Schedule | OMP_sch_modifier_monotonic;
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Modifier = OMP_sch_modifier_monotonic;
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break;
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case OMPC_SCHEDULE_MODIFIER_nonmonotonic:
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return Schedule | OMP_sch_modifier_nonmonotonic;
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Modifier = OMP_sch_modifier_nonmonotonic;
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break;
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case OMPC_SCHEDULE_MODIFIER_simd:
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if (Schedule == OMP_sch_static_chunked)
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Schedule = OMP_sch_static_balanced_chunked;
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break;
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case OMPC_SCHEDULE_MODIFIER_last:
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case OMPC_SCHEDULE_MODIFIER_unknown:
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break;
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}
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return Schedule;
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return Schedule | Modifier;
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}
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void CGOpenMPRuntime::emitForDispatchInit(CodeGenFunction &CGF,
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@ -2444,7 +2457,8 @@ void CGOpenMPRuntime::emitForDispatchInit(CodeGenFunction &CGF,
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getRuntimeSchedule(ScheduleKind.Schedule, Chunk != nullptr, Ordered);
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assert(Ordered ||
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(Schedule != OMP_sch_static && Schedule != OMP_sch_static_chunked &&
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Schedule != OMP_ord_static && Schedule != OMP_ord_static_chunked));
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Schedule != OMP_ord_static && Schedule != OMP_ord_static_chunked &&
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Schedule != OMP_sch_static_balanced_chunked));
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// Call __kmpc_dispatch_init(
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// ident_t *loc, kmp_int32 tid, kmp_int32 schedule,
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// kmp_int[32|64] lower, kmp_int[32|64] upper,
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@ -2476,6 +2490,7 @@ static void emitForStaticInitCall(
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assert(!Ordered);
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assert(Schedule == OMP_sch_static || Schedule == OMP_sch_static_chunked ||
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Schedule == OMP_sch_static_balanced_chunked ||
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Schedule == OMP_ord_static || Schedule == OMP_ord_static_chunked ||
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Schedule == OMP_dist_sch_static ||
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Schedule == OMP_dist_sch_static_chunked);
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@ -2493,6 +2508,7 @@ static void emitForStaticInitCall(
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Chunk = CGF.Builder.getIntN(IVSize, 1);
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} else {
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assert((Schedule == OMP_sch_static_chunked ||
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Schedule == OMP_sch_static_balanced_chunked ||
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Schedule == OMP_ord_static_chunked ||
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Schedule == OMP_dist_sch_static_chunked) &&
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"expected static chunked schedule");
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@ -362,7 +362,7 @@ template <class T, unsigned K> T tfoo(T a) { return a + K; }
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template <typename T, unsigned N>
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int templ1(T a, T *z) {
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#pragma omp for simd collapse(N)
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#pragma omp for simd collapse(N) schedule(simd: static, N)
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for (int i = 0; i < N * 2; i++) {
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for (long long j = 0; j < (N + N + N + N); j += 2) {
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z[i + j] = a + tfoo<T, N>(i + j);
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@ -373,7 +373,7 @@ int templ1(T a, T *z) {
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// Instatiation templ1<float,2>
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// CHECK-LABEL: define {{.*i32}} @{{.*}}templ1{{.*}}(float {{.+}}, float* {{.+}})
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// CHECK: call void @__kmpc_for_static_init_8(%ident_t* {{[^,]+}}, i32 %{{[^,]+}}, i32 34, i32* %{{[^,]+}}, i64* [[LB:%[^,]+]], i64* [[UB:%[^,]+]], i64* [[STRIDE:%[^,]+]], i64 1, i64 1)
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// CHECK: call void @__kmpc_for_static_init_8(%ident_t* {{[^,]+}}, i32 %{{[^,]+}}, i32 45, i32* %{{[^,]+}}, i64* [[LB:%[^,]+]], i64* [[UB:%[^,]+]], i64* [[STRIDE:%[^,]+]], i64 1, i64 2)
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// CHECK: [[UB_VAL:%.+]] = load i64, i64* [[UB]],
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// CHECK: [[CMP:%.+]] = icmp sgt i64 [[UB_VAL]], 15
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// CHECK: br i1 [[CMP]], label %[[TRUE:.+]], label %[[FALSE:[^,]+]]
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@ -389,6 +389,7 @@ int templ1(T a, T *z) {
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// CHECK: store i64 [[LB_VAL]], i64* [[T1_OMP_IV:%[^,]+]],
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// ...
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// CHECK: icmp sle i64
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// CHECK: [[IV:%.+]] = load i64, i64* [[T1_OMP_IV]]
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// CHECK-NEXT: [[UB_VAL:%.+]] = load i64, i64* [[UB]]
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// CHECK-NEXT: [[CMP1:%.+]] = icmp sle i64 [[IV]], [[UB_VAL]]
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