forked from OSchip/llvm-project
Fixed a few 64 bit cases in X86InstrInfo::commuteInstruction
llvm-svn: 69417
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751f045e32
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6c8bcf9da1
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@ -1368,19 +1368,19 @@ X86InstrInfo::commuteInstruction(MachineInstr *MI, bool NewMI) const {
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case X86::CMOVG64rr: Opc = X86::CMOVLE64rr; break;
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case X86::CMOVS16rr: Opc = X86::CMOVNS16rr; break;
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case X86::CMOVS32rr: Opc = X86::CMOVNS32rr; break;
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case X86::CMOVS64rr: Opc = X86::CMOVNS32rr; break;
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case X86::CMOVS64rr: Opc = X86::CMOVNS64rr; break;
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case X86::CMOVNS16rr: Opc = X86::CMOVS16rr; break;
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case X86::CMOVNS32rr: Opc = X86::CMOVS32rr; break;
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case X86::CMOVNS64rr: Opc = X86::CMOVS64rr; break;
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case X86::CMOVP16rr: Opc = X86::CMOVNP16rr; break;
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case X86::CMOVP32rr: Opc = X86::CMOVNP32rr; break;
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case X86::CMOVP64rr: Opc = X86::CMOVNP32rr; break;
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case X86::CMOVP64rr: Opc = X86::CMOVNP64rr; break;
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case X86::CMOVNP16rr: Opc = X86::CMOVP16rr; break;
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case X86::CMOVNP32rr: Opc = X86::CMOVP32rr; break;
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case X86::CMOVNP64rr: Opc = X86::CMOVP64rr; break;
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case X86::CMOVO16rr: Opc = X86::CMOVNO16rr; break;
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case X86::CMOVO32rr: Opc = X86::CMOVNO32rr; break;
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case X86::CMOVO64rr: Opc = X86::CMOVNO32rr; break;
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case X86::CMOVO64rr: Opc = X86::CMOVNO64rr; break;
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case X86::CMOVNO16rr: Opc = X86::CMOVO16rr; break;
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case X86::CMOVNO32rr: Opc = X86::CMOVO32rr; break;
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case X86::CMOVNO64rr: Opc = X86::CMOVO64rr; break;
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