forked from OSchip/llvm-project
Update isl to isl-0.15-35-ga1e44f0
This fixes a memory leak with in the sioimath backend. llvm-svn: 241247
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f519a288d5
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6c78048b76
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@ -1 +1 @@
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isl-0.15-30-g3518765
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isl-0.15-35-ga1e44f0
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@ -2555,10 +2555,11 @@ static int foreach_iteration(__isl_take isl_set *domain,
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int (*fn)(__isl_take isl_basic_set *bset, void *user), void *user)
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{
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int i, n;
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int empty;
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int depth;
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isl_multi_aff *expansion;
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isl_basic_map *bmap;
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isl_aff *lower;
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isl_aff *lower = NULL;
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isl_ast_build *stride_build;
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depth = isl_ast_build_get_depth(build);
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@ -2577,10 +2578,17 @@ static int foreach_iteration(__isl_take isl_set *domain,
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bmap = isl_basic_map_from_multi_aff(expansion);
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lower = find_unroll_lower_bound(build, domain, depth, bmap, &n);
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if (!lower)
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empty = isl_set_is_empty(domain);
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if (empty < 0) {
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n = -1;
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else if (init && init(n, user) < 0)
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} else if (empty) {
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n = 0;
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} else {
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lower = find_unroll_lower_bound(build, domain, depth, bmap, &n);
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if (!lower)
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n = -1;
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}
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if (n >= 0 && init && init(n, user) < 0)
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n = -1;
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for (i = 0; i < n; ++i) {
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isl_set *set;
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@ -3263,18 +3271,76 @@ error:
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return NULL;
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}
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/* Extract out the disjunction imposed by "domain" on the outer
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* schedule dimensions.
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*
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* In particular, remove all inner dimensions from "domain" (including
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* the current dimension) and then remove the constraints that are shared
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* by all disjuncts in the result.
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*/
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static __isl_give isl_set *extract_disjunction(__isl_take isl_set *domain,
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__isl_keep isl_ast_build *build)
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{
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isl_set *hull;
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int depth, dim;
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domain = isl_ast_build_specialize(build, domain);
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depth = isl_ast_build_get_depth(build);
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dim = isl_set_dim(domain, isl_dim_set);
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domain = isl_set_eliminate(domain, isl_dim_set, depth, dim - depth);
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domain = isl_set_remove_unknown_divs(domain);
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hull = isl_set_copy(domain);
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hull = isl_set_from_basic_set(isl_set_unshifted_simple_hull(hull));
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domain = isl_set_gist(domain, hull);
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return domain;
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}
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/* Add "guard" to the grafts in "list".
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* "build" is the outer AST build, while "sub_build" includes "guard"
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* in its generated domain.
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*
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* First combine the grafts into a single graft and then add the guard.
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* If the list is empty, or if some error occurred, then simply return
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* the list.
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*/
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static __isl_give isl_ast_graft_list *list_add_guard(
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__isl_take isl_ast_graft_list *list, __isl_keep isl_set *guard,
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__isl_keep isl_ast_build *build, __isl_keep isl_ast_build *sub_build)
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{
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isl_ast_graft *graft;
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list = isl_ast_graft_list_fuse(list, sub_build);
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if (isl_ast_graft_list_n_ast_graft(list) != 1)
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return list;
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graft = isl_ast_graft_list_get_ast_graft(list, 0);
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graft = isl_ast_graft_add_guard(graft, isl_set_copy(guard), build);
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list = isl_ast_graft_list_set_ast_graft(list, 0, graft);
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return list;
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}
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/* Generate code for a single component, after shifting (if any)
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* has been applied, in case the schedule was specified as a schedule tree.
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* In particular, do so for the specified subset of the schedule domain.
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*
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* If we are outside of the isolated part, then "domain" may include
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* a disjunction. Explicitly generate this disjunction at this point
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* instead of relying on the disjunction getting hoisted back up
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* to this level.
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*/
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static __isl_give isl_ast_graft_list *generate_shifted_component_tree_part(
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__isl_keep isl_union_map *executed, __isl_take isl_set *domain,
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__isl_keep isl_ast_build *build, int isolated)
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{
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isl_union_set *uset;
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isl_ast_graft_list *list;
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isl_ast_build *sub_build;
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int empty;
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uset = isl_union_set_from_set(domain);
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uset = isl_union_set_from_set(isl_set_copy(domain));
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executed = isl_union_map_copy(executed);
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executed = isl_union_map_intersect_domain(executed, uset);
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empty = isl_union_map_is_empty(executed);
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@ -3283,14 +3349,27 @@ static __isl_give isl_ast_graft_list *generate_shifted_component_tree_part(
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if (empty) {
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isl_ctx *ctx;
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isl_union_map_free(executed);
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isl_set_free(domain);
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ctx = isl_ast_build_get_ctx(build);
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return isl_ast_graft_list_alloc(ctx, 0);
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}
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build = isl_ast_build_copy(build);
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return generate_shifted_component_tree_base(executed, build, isolated);
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sub_build = isl_ast_build_copy(build);
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if (!isolated) {
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domain = extract_disjunction(domain, build);
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sub_build = isl_ast_build_restrict_generated(sub_build,
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isl_set_copy(domain));
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}
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list = generate_shifted_component_tree_base(executed,
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isl_ast_build_copy(sub_build), isolated);
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if (!isolated)
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list = list_add_guard(list, domain, build, sub_build);
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isl_ast_build_free(sub_build);
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isl_set_free(domain);
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return list;
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error:
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isl_union_map_free(executed);
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isl_set_free(domain);
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return NULL;
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}
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@ -5080,6 +5159,7 @@ static __isl_give isl_ast_graft_list *build_ast_from_extension(
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isl_set *set;
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set = isl_ast_build_get_generated(build);
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set = isl_set_from_basic_set(isl_set_simple_hull(set));
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schedule_domain = isl_union_set_from_set(set);
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extension = isl_schedule_node_extension_get_extension(node);
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@ -719,7 +719,7 @@ static __isl_give isl_ast_node_list *extract_node_list(
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/* Look for shared enforced constraints by all the elements in "list"
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* on outer loops (with respect to the current depth) and return the result.
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*
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* We assume that the number of children is at least one.
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* If there are no elements in "list", then return the empty set.
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*/
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__isl_give isl_basic_set *isl_ast_graft_list_extract_shared_enforced(
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__isl_keep isl_ast_graft_list *list,
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@ -733,16 +733,11 @@ __isl_give isl_basic_set *isl_ast_graft_list_extract_shared_enforced(
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if (!list)
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return NULL;
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n = isl_ast_graft_list_n_ast_graft(list);
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if (n == 0)
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isl_die(isl_ast_graft_list_get_ctx(list), isl_error_invalid,
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"for node should have at least one child",
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return NULL);
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space = isl_ast_build_get_space(build, 1);
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enforced = isl_basic_set_empty(space);
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depth = isl_ast_build_get_depth(build);
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n = isl_ast_graft_list_n_ast_graft(list);
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for (i = 0; i < n; ++i) {
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isl_ast_graft *graft;
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@ -616,21 +616,21 @@ static int min_is_manifestly_unbounded(struct isl_tab *tab,
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return 1;
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}
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static int row_cmp(struct isl_tab *tab, int r1, int r2, int c, isl_int t)
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static int row_cmp(struct isl_tab *tab, int r1, int r2, int c, isl_int *t)
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{
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unsigned off = 2 + tab->M;
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if (tab->M) {
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int s;
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isl_int_mul(t, tab->mat->row[r1][2], tab->mat->row[r2][off+c]);
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isl_int_submul(t, tab->mat->row[r2][2], tab->mat->row[r1][off+c]);
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s = isl_int_sgn(t);
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isl_int_mul(*t, tab->mat->row[r1][2], tab->mat->row[r2][off+c]);
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isl_int_submul(*t, tab->mat->row[r2][2], tab->mat->row[r1][off+c]);
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s = isl_int_sgn(*t);
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if (s)
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return s;
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}
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isl_int_mul(t, tab->mat->row[r1][1], tab->mat->row[r2][off + c]);
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isl_int_submul(t, tab->mat->row[r2][1], tab->mat->row[r1][off + c]);
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return isl_int_sgn(t);
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isl_int_mul(*t, tab->mat->row[r1][1], tab->mat->row[r2][off + c]);
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isl_int_submul(*t, tab->mat->row[r2][1], tab->mat->row[r1][off + c]);
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return isl_int_sgn(*t);
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}
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/* Given the index of a column "c", return the index of a row
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r = j;
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continue;
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}
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tsgn = sgn * row_cmp(tab, r, j, c, t);
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tsgn = sgn * row_cmp(tab, r, j, c, &t);
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if (tsgn < 0 || (tsgn == 0 &&
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tab->row_var[j] < tab->row_var[r]))
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r = j;
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@ -2,10 +2,12 @@ for (int c0 = 0; c0 <= 99; c0 += 1) {
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if (c0 >= 4 && c0 <= 6) {
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for (int c1 = 0; c1 <= 99; c1 += 1)
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A(c0, c1);
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} else if (c0 >= 7) {
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for (int c1 = 0; c1 <= 99; c1 += 1)
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A(c0, c1);
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} else
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for (int c1 = 0; c1 <= 99; c1 += 1)
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A(c0, c1);
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} else if (c0 >= 7 || c0 <= 3) {
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if (c0 >= 7) {
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for (int c1 = 0; c1 <= 99; c1 += 1)
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A(c0, c1);
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} else
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for (int c1 = 0; c1 <= 99; c1 += 1)
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A(c0, c1);
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}
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}
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