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Support for half intrinsics. Pushes MMX into slower encoding path. 

llvm-svn: 172159
This commit is contained in:
Michael Ilseman 2013-01-11 01:45:05 +00:00
parent 9f08be0272
commit 6c6d715c15
5 changed files with 45 additions and 36 deletions
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2
llvm/include/llvm/IR/Intrinsics.h
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@ -79,7 +79,7 @@ namespace Intrinsic {
/// getIntrinsicInfoTableEntries. /// getIntrinsicInfoTableEntries.
struct IITDescriptor { struct IITDescriptor {
enum IITDescriptorKind { enum IITDescriptorKind {
Void, MMX, Metadata, Float, Double, Void, MMX, Metadata, Half, Float, Double,
Integer, Vector, Pointer, Struct, Integer, Vector, Pointer, Struct,
Argument, ExtendVecArgument, TruncVecArgument Argument, ExtendVecArgument, TruncVecArgument
} Kind; } Kind;

1
llvm/include/llvm/IR/Intrinsics.td
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@ -106,6 +106,7 @@ def llvm_i8_ty : LLVMType<i8>;
def llvm_i16_ty : LLVMType<i16>; def llvm_i16_ty : LLVMType<i16>;
def llvm_i32_ty : LLVMType<i32>; def llvm_i32_ty : LLVMType<i32>;
def llvm_i64_ty : LLVMType<i64>; def llvm_i64_ty : LLVMType<i64>;
def llvm_half_ty : LLVMType<f16>;
def llvm_float_ty : LLVMType<f32>; def llvm_float_ty : LLVMType<f32>;
def llvm_double_ty : LLVMType<f64>; def llvm_double_ty : LLVMType<f64>;
def llvm_f80_ty : LLVMType<f80>; def llvm_f80_ty : LLVMType<f80>;

39
llvm/lib/IR/Function.cpp
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@ -372,27 +372,28 @@ enum IIT_Info {
IIT_I16 = 3, IIT_I16 = 3,
IIT_I32 = 4, IIT_I32 = 4,
IIT_I64 = 5, IIT_I64 = 5,
IIT_F32 = 6, IIT_F16 = 6,
IIT_F64 = 7, IIT_F32 = 7,
IIT_V2 = 8, IIT_F64 = 8,
IIT_V4 = 9, IIT_V2 = 9,
IIT_V8 = 10, IIT_V4 = 10,
IIT_V16 = 11, IIT_V8 = 11,
IIT_V32 = 12, IIT_V16 = 12,
IIT_MMX = 13, IIT_V32 = 13,
IIT_PTR = 14, IIT_PTR = 14,
IIT_ARG = 15, IIT_ARG = 15,
// Values from 16+ are only encodable with the inefficient encoding. // Values from 16+ are only encodable with the inefficient encoding.
IIT_METADATA = 16, IIT_MMX = 16,
IIT_EMPTYSTRUCT = 17, IIT_METADATA = 17,
IIT_STRUCT2 = 18, IIT_EMPTYSTRUCT = 18,
IIT_STRUCT3 = 19, IIT_STRUCT2 = 19,
IIT_STRUCT4 = 20, IIT_STRUCT3 = 20,
IIT_STRUCT5 = 21, IIT_STRUCT4 = 21,
IIT_EXTEND_VEC_ARG = 22, IIT_STRUCT5 = 22,
IIT_TRUNC_VEC_ARG = 23, IIT_EXTEND_VEC_ARG = 23,
IIT_ANYPTR = 24 IIT_TRUNC_VEC_ARG = 24,
IIT_ANYPTR = 25
}; };
@ -412,6 +413,9 @@ static void DecodeIITType(unsigned &NextElt, ArrayRef<unsigned char> Infos,
case IIT_METADATA: case IIT_METADATA:
OutputTable.push_back(IITDescriptor::get(IITDescriptor::Metadata, 0)); OutputTable.push_back(IITDescriptor::get(IITDescriptor::Metadata, 0));
return; return;
case IIT_F16:
OutputTable.push_back(IITDescriptor::get(IITDescriptor::Half, 0));
return;
case IIT_F32: case IIT_F32:
OutputTable.push_back(IITDescriptor::get(IITDescriptor::Float, 0)); OutputTable.push_back(IITDescriptor::get(IITDescriptor::Float, 0));
return; return;
@ -546,6 +550,7 @@ static Type *DecodeFixedType(ArrayRef<Intrinsic::IITDescriptor> &Infos,
case IITDescriptor::Void: return Type::getVoidTy(Context); case IITDescriptor::Void: return Type::getVoidTy(Context);
case IITDescriptor::MMX: return Type::getX86_MMXTy(Context); case IITDescriptor::MMX: return Type::getX86_MMXTy(Context);
case IITDescriptor::Metadata: return Type::getMetadataTy(Context); case IITDescriptor::Metadata: return Type::getMetadataTy(Context);
case IITDescriptor::Half: return Type::getHalfTy(Context);
case IITDescriptor::Float: return Type::getFloatTy(Context); case IITDescriptor::Float: return Type::getFloatTy(Context);
case IITDescriptor::Double: return Type::getDoubleTy(Context); case IITDescriptor::Double: return Type::getDoubleTy(Context);

1
llvm/lib/IR/Verifier.cpp
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@ -1800,6 +1800,7 @@ bool Verifier::VerifyIntrinsicType(Type *Ty,
case IITDescriptor::Void: return !Ty->isVoidTy(); case IITDescriptor::Void: return !Ty->isVoidTy();
case IITDescriptor::MMX: return !Ty->isX86_MMXTy(); case IITDescriptor::MMX: return !Ty->isX86_MMXTy();
case IITDescriptor::Metadata: return !Ty->isMetadataTy(); case IITDescriptor::Metadata: return !Ty->isMetadataTy();
case IITDescriptor::Half: return !Ty->isHalfTy();
case IITDescriptor::Float: return !Ty->isFloatTy(); case IITDescriptor::Float: return !Ty->isFloatTy();
case IITDescriptor::Double: return !Ty->isDoubleTy(); case IITDescriptor::Double: return !Ty->isDoubleTy();
case IITDescriptor::Integer: return !Ty->isIntegerTy(D.Integer_Width); case IITDescriptor::Integer: return !Ty->isIntegerTy(D.Integer_Width);

38
llvm/utils/TableGen/IntrinsicEmitter.cpp
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@ -221,27 +221,28 @@ enum IIT_Info {
IIT_I16 = 3, IIT_I16 = 3,
IIT_I32 = 4, IIT_I32 = 4,
IIT_I64 = 5, IIT_I64 = 5,
IIT_F32 = 6, IIT_F16 = 6,
IIT_F64 = 7, IIT_F32 = 7,
IIT_V2 = 8, IIT_F64 = 8,
IIT_V4 = 9, IIT_V2 = 9,
IIT_V8 = 10, IIT_V4 = 10,
IIT_V16 = 11, IIT_V8 = 11,
IIT_V32 = 12, IIT_V16 = 12,
IIT_MMX = 13, IIT_V32 = 13,
IIT_PTR = 14, IIT_PTR = 14,
IIT_ARG = 15, IIT_ARG = 15,
// Values from 16+ are only encodable with the inefficient encoding. // Values from 16+ are only encodable with the inefficient encoding.
IIT_METADATA = 16, IIT_MMX = 16,
IIT_EMPTYSTRUCT = 17, IIT_METADATA = 17,
IIT_STRUCT2 = 18, IIT_EMPTYSTRUCT = 18,
IIT_STRUCT3 = 19, IIT_STRUCT2 = 19,
IIT_STRUCT4 = 20, IIT_STRUCT3 = 20,
IIT_STRUCT5 = 21, IIT_STRUCT4 = 21,
IIT_EXTEND_VEC_ARG = 22, IIT_STRUCT5 = 22,
IIT_TRUNC_VEC_ARG = 23, IIT_EXTEND_VEC_ARG = 23,
IIT_ANYPTR = 24 IIT_TRUNC_VEC_ARG = 24,
IIT_ANYPTR = 25
}; };
@ -261,6 +262,7 @@ static void EncodeFixedValueType(MVT::SimpleValueType VT,
switch (VT) { switch (VT) {
default: PrintFatalError("unhandled MVT in intrinsic!"); default: PrintFatalError("unhandled MVT in intrinsic!");
case MVT::f16: return Sig.push_back(IIT_F16);
case MVT::f32: return Sig.push_back(IIT_F32); case MVT::f32: return Sig.push_back(IIT_F32);
case MVT::f64: return Sig.push_back(IIT_F64); case MVT::f64: return Sig.push_back(IIT_F64);
case MVT::Metadata: return Sig.push_back(IIT_METADATA); case MVT::Metadata: return Sig.push_back(IIT_METADATA);