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Revert "[MachineVerifier] Diagnose invalid INSERT_SUBREGs" 

This reverts commit dd57ba1a17.

It broke some tests: http://45.33.8.238/linux/51314/step_12.txt
This commit is contained in:
Jon Roelofs 2021-07-16 09:53:16 -07:00
parent 52cd0c5a8d
commit 6c40abb6fe
3 changed files with 3 additions and 41 deletions
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9
llvm/lib/CodeGen/MachineVerifier.cpp
View File

@ -1782,15 +1782,6 @@ void MachineVerifier::visitMachineInstrBefore(const MachineInstr *MI) {
// TODO: verify we have properly encoded deopt arguments // TODO: verify we have properly encoded deopt arguments
} break; } break;
case TargetOpcode::INSERT_SUBREG: {
unsigned InsertedSize =
TRI->getRegSizeInBits(MI->getOperand(2).getReg(), *MRI);
unsigned SubRegSize = TRI->getSubRegIdxSize(MI->getOperand(3).getImm());
if (InsertedSize != SubRegSize) {
report("INSERT_SUBREG expected matching subreg size for operand 2", MI);
break;
}
} break;
} }
} }

6
llvm/test/CodeGen/X86/domain-reassignment.mir
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@ -190,7 +190,7 @@ body: |
%2 = PHI %1, %bb.2, %0, %bb.1 %2 = PHI %1, %bb.2, %0, %bb.1
%17 = IMPLICIT_DEF %17 = IMPLICIT_DEF
%16 = INSERT_SUBREG %17, %2, %subreg.sub_8bit_hi %16 = INSERT_SUBREG %17, %2, 1
%18 = COPY %16 %18 = COPY %16
%19 = COPY %6 %19 = COPY %6
%21 = IMPLICIT_DEF %21 = IMPLICIT_DEF
@ -305,7 +305,7 @@ body: |
%18 = ADD8rr %17, %14, implicit-def dead $eflags %18 = ADD8rr %17, %14, implicit-def dead $eflags
%8 = IMPLICIT_DEF %8 = IMPLICIT_DEF
%9 = INSERT_SUBREG %8, %18, %subreg.sub_8bit_hi %9 = INSERT_SUBREG %8, %18, 1
%10 = COPY %9 %10 = COPY %9
%11 = VMOVAPDZrrk %2, killed %10, %1 %11 = VMOVAPDZrrk %2, killed %10, %1
VMOVAPDZmr %0, 1, $noreg, 0, $noreg, killed %11 VMOVAPDZmr %0, 1, $noreg, 0, $noreg, killed %11
@ -423,7 +423,7 @@ body: |
%17 = XOR16rr %16, %12, implicit-def dead $eflags %17 = XOR16rr %16, %12, implicit-def dead $eflags
%8 = IMPLICIT_DEF %8 = IMPLICIT_DEF
%9 = INSERT_SUBREG %8, %17, %subreg.sub_16bit %9 = INSERT_SUBREG %8, %17, 3
%10 = COPY %9 %10 = COPY %9
%11 = VMOVAPSZrrk %2, killed %10, %1 %11 = VMOVAPSZrrk %2, killed %10, %1
VMOVAPSZmr %0, 1, $noreg, 0, $noreg, killed %11 VMOVAPSZmr %0, 1, $noreg, 0, $noreg, killed %11

29
llvm/test/MachineVerifier/test_insert_subreg.mir
View File

@ -1,29 +0,0 @@
#RUN: not --crash llc -march=aarch64 -o - -run-pass=none -verify-machineinstrs %s 2>&1 | FileCheck %s
# REQUIRES: aarch64-registered-target
---
name: test_insert_subreg
legalized: true
regBankSelected: false
selected: false
tracksRegLiveness: true
liveins:
body: |
bb.0:
liveins: $s0, $h1
%0:fpr32 = COPY $s0
; CHECK: *** Bad machine code: INSERT_SUBREG expected matching subreg size for operand 2 ***
%1:fpr128 = IMPLICIT_DEF
%2:fpr128 = INSERT_SUBREG %1:fpr128, %0:fpr32, %subreg.hsub
; CHECK: *** Bad machine code: INSERT_SUBREG expected matching subreg size for operand 2 ***
%3:fpr128 = IMPLICIT_DEF
%4:fpr128 = INSERT_SUBREG %3:fpr128, %0:fpr32, %subreg.dsub
; CHECK-NOT: *** Bad machine code:
%7:fpr128 = IMPLICIT_DEF
%8:fpr128 = INSERT_SUBREG %7:fpr128, %0:fpr32, %subreg.ssub
...