forked from OSchip/llvm-project
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c89d2aad4c
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6c275bc5a2
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@ -9843,7 +9843,7 @@ static SDValue PerformVZEXT_MOVLCombine(SDNode *N, SelectionDAG &DAG) {
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// On X86 and X86-64, atomic operations are lowered to locked instructions.
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// Locked instructions, in turn, have implicit fence semantics (all memory
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// operations are flushed before issuing the locked instruction, and the
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// operations are flushed before issuing the locked instruction, and they
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// are not buffered), so we can fold away the common pattern of
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// fence-atomic-fence.
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static SDValue PerformMEMBARRIERCombine(SDNode* N, SelectionDAG &DAG) {
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