forked from OSchip/llvm-project
AArch64: use __clear_cache under GCCish environments
AArch64 is going to need some kind of cache-invalidation in order to successfully JIT since it has a weak memory-model. This is provided by a __clear_cache builtin in libgcc, which acts very much like the 32-bit ARM equivalent (on platforms where it exists). llvm-svn: 181129
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@ -325,7 +325,7 @@ void Memory::InvalidateInstructionCache(const void *Addr,
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for (intptr_t Line = StartLine; Line < EndLine; Line += LineSize)
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asm volatile("icbi 0, %0" : : "r"(Line));
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asm volatile("isync");
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# elif defined(__arm__) && defined(__GNUC__)
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# elif (defined(__arm__) || defined(__aarch64__)) && defined(__GNUC__)
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// FIXME: Can we safely always call this for __GNUC__ everywhere?
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const char *Start = static_cast<const char *>(Addr);
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const char *End = Start + Len;
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