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Add storeRegTo{StackSlot|Addr} and loadRegFrom{StackSlot|Addr} descriptions. 

llvm-svn: 58164
This commit is contained in:
Evan Cheng 2008-10-25 23:08:22 +00:00
parent 3773bbce54
commit 6be78004a5
1 changed files with 17 additions and 0 deletions
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17
llvm/include/llvm/Target/TargetInstrInfo.h
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@ -232,6 +232,11 @@ public:
return false;
}
/// storeRegToStackSlot - Store the specified register of the given register
/// class to the specified stack frame index. The store instruction is to be
/// added to the given machine basic block before the specified machine
/// instruction. If isKill is true, the register operand is the last use and
/// must be marked kill.
virtual void storeRegToStackSlot(MachineBasicBlock &MBB,
MachineBasicBlock::iterator MI,
unsigned SrcReg, bool isKill, int FrameIndex,
@ -239,6 +244,11 @@ public:
assert(0 && "Target didn't implement TargetInstrInfo::storeRegToStackSlot!");
}
/// storeRegToAddr - Store the specified register of the given register class
/// to the specified address. The store instruction is to be added to the
/// given machine basic block before the specified machine instruction. If
/// isKill is true, the register operand is the last use and must be marked
/// kill.
virtual void storeRegToAddr(MachineFunction &MF, unsigned SrcReg, bool isKill,
SmallVectorImpl<MachineOperand> &Addr,
const TargetRegisterClass *RC,
@ -246,6 +256,10 @@ public:
assert(0 && "Target didn't implement TargetInstrInfo::storeRegToAddr!");
}
/// loadRegFromStackSlot - Load the specified register of the given register
/// class from the specified stack frame index. The load instruction is to be
/// added to the given machine basic block before the specified machine
/// instruction.
virtual void loadRegFromStackSlot(MachineBasicBlock &MBB,
MachineBasicBlock::iterator MI,
unsigned DestReg, int FrameIndex,
@ -253,6 +267,9 @@ public:
assert(0 && "Target didn't implement TargetInstrInfo::loadRegFromStackSlot!");
}
/// loadRegFromAddr - Load the specified register of the given register class
/// class from the specified address. The load instruction is to be added to
/// the given machine basic block before the specified machine instruction.
virtual void loadRegFromAddr(MachineFunction &MF, unsigned DestReg,
SmallVectorImpl<MachineOperand> &Addr,
const TargetRegisterClass *RC,