forked from OSchip/llvm-project
[X86][SLM] Fix PBLENDVB uops and throughput
SLM PBLENDVB is just as bad as BLENDVPD/PS - so model it as such, fixing the rr vs rm uops diff as well. The Intel AoM appears to have a copy+paste typo with PBLENDW, it doesn't match Agner or InstLatX64. Noticed while investigating some of the weird discrepancies reported by the D103695 helper script (SLM had much better vector shift throughputs than it should).
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@ -62,7 +62,7 @@ def : ReadAdvance<ReadInt2Fpu, 0>;
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multiclass SLMWriteResPair<X86FoldableSchedWrite SchedRW,
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multiclass SLMWriteResPair<X86FoldableSchedWrite SchedRW,
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list<ProcResourceKind> ExePorts,
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list<ProcResourceKind> ExePorts,
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int Lat, list<int> Res = [1], int UOps = 1,
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int Lat, list<int> Res = [1], int UOps = 1,
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int LoadLat = 3> {
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int LoadLat = 3, int LoadUOps = 0> {
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// Register variant is using a single cycle on ExePort.
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// Register variant is using a single cycle on ExePort.
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def : WriteRes<SchedRW, ExePorts> {
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def : WriteRes<SchedRW, ExePorts> {
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let Latency = Lat;
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let Latency = Lat;
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@ -75,7 +75,7 @@ multiclass SLMWriteResPair<X86FoldableSchedWrite SchedRW,
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def : WriteRes<SchedRW.Folded, !listconcat([SLM_MEC_RSV], ExePorts)> {
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def : WriteRes<SchedRW.Folded, !listconcat([SLM_MEC_RSV], ExePorts)> {
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let Latency = !add(Lat, LoadLat);
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let Latency = !add(Lat, LoadLat);
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let ResourceCycles = !listconcat([1], Res);
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let ResourceCycles = !listconcat([1], Res);
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let NumMicroOps = UOps;
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let NumMicroOps = !add(UOps, LoadUOps);
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}
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}
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}
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}
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@ -280,7 +280,7 @@ defm : X86WriteResPairUnsupported<WriteFVarShuffleZ>;
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defm : SLMWriteResPair<WriteFBlend, [SLM_FPC_RSV0], 1>;
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defm : SLMWriteResPair<WriteFBlend, [SLM_FPC_RSV0], 1>;
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defm : X86WriteResPairUnsupported<WriteFBlendY>;
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defm : X86WriteResPairUnsupported<WriteFBlendY>;
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defm : X86WriteResPairUnsupported<WriteFBlendZ>;
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defm : X86WriteResPairUnsupported<WriteFBlendZ>;
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defm : SLMWriteResPair<WriteFVarBlend, [SLM_FPC_RSV0], 4, [4], 3>;
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defm : SLMWriteResPair<WriteFVarBlend, [SLM_FPC_RSV0], 4, [4], 2, 3, 1>;
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defm : X86WriteResPairUnsupported<WriteFVarBlendY>;
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defm : X86WriteResPairUnsupported<WriteFVarBlendY>;
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defm : X86WriteResPairUnsupported<WriteFVarBlendZ>;
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defm : X86WriteResPairUnsupported<WriteFVarBlendZ>;
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defm : X86WriteResPairUnsupported<WriteFShuffle256>;
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defm : X86WriteResPairUnsupported<WriteFShuffle256>;
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@ -391,7 +391,7 @@ defm : X86WriteResPairUnsupported<WriteVarShuffleZ>;
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defm : SLMWriteResPair<WriteBlend, [SLM_FPC_RSV0], 1>;
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defm : SLMWriteResPair<WriteBlend, [SLM_FPC_RSV0], 1>;
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defm : SLMWriteResPair<WriteBlendY, [SLM_FPC_RSV0], 1>;
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defm : SLMWriteResPair<WriteBlendY, [SLM_FPC_RSV0], 1>;
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defm : X86WriteResPairUnsupported<WriteBlendZ>;
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defm : X86WriteResPairUnsupported<WriteBlendZ>;
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defm : SLMWriteResPair<WriteVarBlend, [SLM_FPC_RSV0], 1>;
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defm : SLMWriteResPair<WriteVarBlend, [SLM_FPC_RSV0], 4, [4], 2, 3, 1>;
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defm : X86WriteResPairUnsupported<WriteVarBlendY>;
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defm : X86WriteResPairUnsupported<WriteVarBlendY>;
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defm : X86WriteResPairUnsupported<WriteVarBlendZ>;
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defm : X86WriteResPairUnsupported<WriteVarBlendZ>;
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defm : SLMWriteResPair<WriteMPSAD, [SLM_FPC_RSV0], 7>;
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defm : SLMWriteResPair<WriteMPSAD, [SLM_FPC_RSV0], 7>;
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@ -159,9 +159,9 @@ roundss $1, (%rax), %xmm2
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# CHECK-NEXT: 1 4 1.00 * blendpd $11, (%rax), %xmm2
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# CHECK-NEXT: 1 4 1.00 * blendpd $11, (%rax), %xmm2
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# CHECK-NEXT: 1 1 1.00 blendps $11, %xmm0, %xmm2
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# CHECK-NEXT: 1 1 1.00 blendps $11, %xmm0, %xmm2
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# CHECK-NEXT: 1 4 1.00 * blendps $11, (%rax), %xmm2
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# CHECK-NEXT: 1 4 1.00 * blendps $11, (%rax), %xmm2
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# CHECK-NEXT: 3 4 4.00 blendvpd %xmm0, %xmm0, %xmm2
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# CHECK-NEXT: 2 4 4.00 blendvpd %xmm0, %xmm0, %xmm2
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# CHECK-NEXT: 3 7 4.00 * blendvpd %xmm0, (%rax), %xmm2
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# CHECK-NEXT: 3 7 4.00 * blendvpd %xmm0, (%rax), %xmm2
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# CHECK-NEXT: 3 4 4.00 blendvps %xmm0, %xmm0, %xmm2
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# CHECK-NEXT: 2 4 4.00 blendvps %xmm0, %xmm0, %xmm2
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# CHECK-NEXT: 3 7 4.00 * blendvps %xmm0, (%rax), %xmm2
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# CHECK-NEXT: 3 7 4.00 * blendvps %xmm0, (%rax), %xmm2
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# CHECK-NEXT: 1 3 1.00 dppd $22, %xmm0, %xmm2
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# CHECK-NEXT: 1 3 1.00 dppd $22, %xmm0, %xmm2
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# CHECK-NEXT: 1 6 1.00 * dppd $22, (%rax), %xmm2
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# CHECK-NEXT: 1 6 1.00 * dppd $22, (%rax), %xmm2
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@ -176,8 +176,8 @@ roundss $1, (%rax), %xmm2
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# CHECK-NEXT: 1 10 1.00 * mpsadbw $1, (%rax), %xmm2
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# CHECK-NEXT: 1 10 1.00 * mpsadbw $1, (%rax), %xmm2
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# CHECK-NEXT: 1 1 1.00 packusdw %xmm0, %xmm2
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# CHECK-NEXT: 1 1 1.00 packusdw %xmm0, %xmm2
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# CHECK-NEXT: 1 4 1.00 * packusdw (%rax), %xmm2
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# CHECK-NEXT: 1 4 1.00 * packusdw (%rax), %xmm2
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# CHECK-NEXT: 1 1 1.00 pblendvb %xmm0, %xmm0, %xmm2
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# CHECK-NEXT: 2 4 4.00 pblendvb %xmm0, %xmm0, %xmm2
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# CHECK-NEXT: 1 4 1.00 * pblendvb %xmm0, (%rax), %xmm2
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# CHECK-NEXT: 3 7 4.00 * pblendvb %xmm0, (%rax), %xmm2
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# CHECK-NEXT: 1 1 1.00 pblendw $11, %xmm0, %xmm2
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# CHECK-NEXT: 1 1 1.00 pblendw $11, %xmm0, %xmm2
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# CHECK-NEXT: 1 4 1.00 * pblendw $11, (%rax), %xmm2
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# CHECK-NEXT: 1 4 1.00 * pblendw $11, (%rax), %xmm2
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# CHECK-NEXT: 2 4 2.00 pcmpeqq %xmm0, %xmm2
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# CHECK-NEXT: 2 4 2.00 pcmpeqq %xmm0, %xmm2
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@ -264,7 +264,7 @@ roundss $1, (%rax), %xmm2
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# CHECK: Resource pressure per iteration:
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# CHECK: Resource pressure per iteration:
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# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6] [7]
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# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6] [7]
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# CHECK-NEXT: - - - 90.00 25.00 - - 54.00
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# CHECK-NEXT: - - - 96.00 25.00 - - 54.00
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# CHECK: Resource pressure by instruction:
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# CHECK: Resource pressure by instruction:
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# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6] [7] Instructions:
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# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6] [7] Instructions:
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@ -289,8 +289,8 @@ roundss $1, (%rax), %xmm2
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# CHECK-NEXT: - - - 1.00 - - - 1.00 mpsadbw $1, (%rax), %xmm2
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# CHECK-NEXT: - - - 1.00 - - - 1.00 mpsadbw $1, (%rax), %xmm2
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# CHECK-NEXT: - - - 1.00 - - - - packusdw %xmm0, %xmm2
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# CHECK-NEXT: - - - 1.00 - - - - packusdw %xmm0, %xmm2
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# CHECK-NEXT: - - - 1.00 - - - 1.00 packusdw (%rax), %xmm2
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# CHECK-NEXT: - - - 1.00 - - - 1.00 packusdw (%rax), %xmm2
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# CHECK-NEXT: - - - 1.00 - - - - pblendvb %xmm0, %xmm0, %xmm2
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# CHECK-NEXT: - - - 4.00 - - - - pblendvb %xmm0, %xmm0, %xmm2
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# CHECK-NEXT: - - - 1.00 - - - 1.00 pblendvb %xmm0, (%rax), %xmm2
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# CHECK-NEXT: - - - 4.00 - - - 1.00 pblendvb %xmm0, (%rax), %xmm2
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# CHECK-NEXT: - - - 1.00 - - - - pblendw $11, %xmm0, %xmm2
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# CHECK-NEXT: - - - 1.00 - - - - pblendw $11, %xmm0, %xmm2
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# CHECK-NEXT: - - - 1.00 - - - 1.00 pblendw $11, (%rax), %xmm2
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# CHECK-NEXT: - - - 1.00 - - - 1.00 pblendw $11, (%rax), %xmm2
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# CHECK-NEXT: - - - 2.00 2.00 - - - pcmpeqq %xmm0, %xmm2
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# CHECK-NEXT: - - - 2.00 2.00 - - - pcmpeqq %xmm0, %xmm2
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