forked from OSchip/llvm-project
[Attributor][FIX] HasBeenWrittenTo logic should only be used for reads
If we look at a write, we should not enact the "has been written to" logic introduced to avoid spurious write -> read dependences. Doing so lead to elimination of stores we needed, which is obviously bad.
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baec06a9d4
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llvm
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@ -1069,7 +1069,7 @@ struct AAPointerInfoImpl
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bool Dominates = DT && Exact && Acc.isMustAccess() &&
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(Acc.getLocalInst()->getFunction() == &Scope) &&
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DT->dominates(Acc.getRemoteInst(), &I);
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if (Dominates)
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if (FindInterferingWrites && Dominates)
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HasBeenWrittenTo = true;
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// For now we only filter accesses based on CFG reasoning which does not
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@ -2674,6 +2674,7 @@ define i32 @static_global_not_simplifiable_2(i32 %cnd) {
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; IS__TUNIT_NPM-NEXT: store i32 1, i32* @Flag4, align 4, !tbaa [[TBAA3]]
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; IS__TUNIT_NPM-NEXT: call void @sync() #[[ATTR14:[0-9]+]]
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; IS__TUNIT_NPM-NEXT: [[I:%.*]] = load i32, i32* @Flag4, align 4, !tbaa [[TBAA3]]
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; IS__TUNIT_NPM-NEXT: store i32 2, i32* @Flag4, align 4, !tbaa [[TBAA3]]
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; IS__TUNIT_NPM-NEXT: ret i32 [[I]]
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;
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; IS__CGSCC_OPM-LABEL: define {{[^@]+}}@static_global_not_simplifiable_2
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@ -2691,6 +2692,7 @@ define i32 @static_global_not_simplifiable_2(i32 %cnd) {
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; IS__CGSCC_NPM-NEXT: store i32 1, i32* @Flag4, align 4, !tbaa [[TBAA3]]
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; IS__CGSCC_NPM-NEXT: call void @sync() #[[ATTR16:[0-9]+]]
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; IS__CGSCC_NPM-NEXT: [[I:%.*]] = load i32, i32* @Flag4, align 4, !tbaa [[TBAA3]]
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; IS__CGSCC_NPM-NEXT: store i32 2, i32* @Flag4, align 4, !tbaa [[TBAA3]]
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; IS__CGSCC_NPM-NEXT: ret i32 [[I]]
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;
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entry:
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