forked from OSchip/llvm-project
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43797d15fa
commit
6b6dbb3bd8
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@ -4752,10 +4752,9 @@ SDValue X86TargetLowering::LowerShift(SDValue Op, SelectionDAG &DAG) {
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SDValue ShOpLo = Op.getOperand(0);
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SDValue ShOpHi = Op.getOperand(1);
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SDValue ShAmt = Op.getOperand(2);
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SDValue Tmp1 = isSRA ?
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DAG.getNode(ISD::SRA, dl, VT, ShOpHi,
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DAG.getConstant(VTBits - 1, MVT::i8)) :
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DAG.getConstant(0, VT);
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SDValue Tmp1 = isSRA ? DAG.getNode(ISD::SRA, dl, VT, ShOpHi,
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DAG.getConstant(VTBits - 1, MVT::i8))
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: DAG.getConstant(0, VT);
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SDValue Tmp2, Tmp3;
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if (Op.getOpcode() == ISD::SHL_PARTS) {
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@ -4767,9 +4766,9 @@ SDValue X86TargetLowering::LowerShift(SDValue Op, SelectionDAG &DAG) {
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}
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SDValue AndNode = DAG.getNode(ISD::AND, dl, MVT::i8, ShAmt,
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DAG.getConstant(VTBits, MVT::i8));
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DAG.getConstant(VTBits, MVT::i8));
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SDValue Cond = DAG.getNode(X86ISD::CMP, dl, VT,
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AndNode, DAG.getConstant(0, MVT::i8));
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AndNode, DAG.getConstant(0, MVT::i8));
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SDValue Hi, Lo;
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SDValue CC = DAG.getConstant(X86::COND_NE, MVT::i8);
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