forked from OSchip/llvm-project
parent
3088e0a179
commit
6b66ee1865
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@ -361,14 +361,6 @@ def tADDspr : TIt<(outs GPR:$dst), (ins GPR:$lhs, GPR:$rhs), IIC_iALUr,
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//
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let isReturn = 1, isTerminator = 1, isBarrier = 1 in {
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def tBX_RET : TI<(outs), (ins), IIC_Br, "bx\tlr",
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[(ARMretflag)]>,
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T1Special<{1,1,0,?}> {
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// A6.2.3 & A8.6.25
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let Inst{6-3} = 0b1110; // Rm = lr
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let Inst{2-0} = 0b000;
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}
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def tBX : TI<(outs), (ins GPR:$Rm, pred:$p), IIC_Br, "bx${p}\t$Rm", []>,
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T1Special<{1,1,0,?}> {
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// A6.2.3 & A8.6.25
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@ -377,6 +369,14 @@ let isReturn = 1, isTerminator = 1, isBarrier = 1 in {
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let Inst{2-0} = 0b000;
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}
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def tBX_RET : TI<(outs), (ins), IIC_Br, "bx\tlr",
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[(ARMretflag)]>,
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T1Special<{1,1,0,?}> {
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// A6.2.3 & A8.6.25
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let Inst{6-3} = 0b1110; // Rm = lr
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let Inst{2-0} = 0b000;
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}
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// Alternative return instruction used by vararg functions.
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def tBX_RET_vararg : TI<(outs), (ins tGPR:$Rm),
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IIC_Br, "bx\t$Rm",
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