The sign of an srem instruction is the sign of its dividend (the first

argument), regardless of the divisor. Teach instcombine about this and fix
test7 in PR9343!

llvm-svn: 126635
This commit is contained in:
Nick Lewycky 2011-02-28 06:20:05 +00:00
parent 8fbf64f420
commit 6b445419b0
2 changed files with 23 additions and 3 deletions
llvm
lib/Transforms/InstCombine
test/Transforms/InstCombine

View File

@ -1340,6 +1340,16 @@ Instruction *InstCombiner::visitICmpInstWithInstAndIntCst(ICmpInst &ICI,
}
}
break;
case Instruction::SRem: {
bool TrueIfSigned;
if (LHSI->hasOneUse() &&
isSignBitCheck(ICI.getPredicate(), RHS, TrueIfSigned)) {
// srem has the same sign as its dividend so the divisor is irrelevant.
return new ICmpInst(ICI.getPredicate(), LHSI->getOperand(0), RHS);
}
break;
}
}
// Simplify icmp_eq and icmp_ne instructions with integer constant RHS.

View File

@ -377,3 +377,13 @@ define i1 @test38(i32 %x, i32 %y, i32 %z) {
%c = icmp ugt i32 %lhs, %rhs
ret i1 %c
}
; PR9343 #7
; CHECK: @test39
; CHECK: ret i1 false
define i1 @test39(i31 %X, i32 %Y) {
%A = zext i31 %X to i32
%B = srem i32 %A, %Y
%C = icmp slt i32 %B, 0
ret i1 %C
}