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[PowerPC] [Clang] Fix alignment of 128-bit float types 

According to ELF v2 ABI, both IEEE 128-bit and IBM extended floating
point variables should be quad-word (16 bytes) aligned. Previously, only
vector types are considered aligned as quad-word on PowerPC.

This patch will fix incorrectness of IEEE 128-bit float argument in
va_arg cases.

Reviewed By: rjmccall

Differential Revision: https://reviews.llvm.org/D91596
This commit is contained in:
Qiu Chaofan 2020-11-19 14:20:24 +08:00
parent 4d8dede5e5
commit 6b1341eb5b
2 changed files with 54 additions and 0 deletions
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5
clang/lib/CodeGen/TargetInfo.cpp
View File

@ -5051,6 +5051,11 @@ CharUnits PPC64_SVR4_ABIInfo::getParamTypeAlignment(QualType Ty) const {
return CharUnits::fromQuantity(16);
} else if (Ty->isVectorType()) {
return CharUnits::fromQuantity(getContext().getTypeSize(Ty) == 128 ? 16 : 8);
} else if (Ty->isRealFloatingType() && getContext().getTypeSize(Ty) == 128) {
// IEEE 128-bit floating numbers are also stored in vector registers.
// And both IEEE quad-precision and IBM extended double (ppc_fp128) should
// be quad-word aligned.
return CharUnits::fromQuantity(16);
}
// For single-element float/vector structs, we consider the whole type

49
clang/test/CodeGen/ppc64le-varargs-f128.c Normal file
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@ -0,0 +1,49 @@
// RUN: %clang_cc1 -triple powerpc64le-unknown-linux-gnu -emit-llvm \
// RUN: -target-cpu pwr9 -target-feature +float128 -mabi=ieeelongdouble \
// RUN: -o - %s | FileCheck %s -check-prefix=IEEE
// RUN: %clang_cc1 -triple powerpc64le-unknown-linux-gnu -emit-llvm \
// RUN: -target-cpu pwr9 -target-feature +float128 \
// RUN: -o - %s | FileCheck %s -check-prefix=IBM
#include <stdarg.h>
// IEEE-LABEL: define fp128 @f128(i32 signext %n, ...)
// IEEE: call void @llvm.va_start(i8* %{{[0-9a-zA-Z_.]+}})
// IEEE: %[[P1:[0-9a-zA-Z_.]+]] = add i64 %{{[0-9a-zA-Z_.]+}}, 15
// IEEE: %[[P2:[0-9a-zA-Z_.]+]] = and i64 %[[P1]], -16
// IEEE: %[[P3:[0-9a-zA-Z_.]+]] = inttoptr i64 %[[P2]] to i8*
// IEEE: %[[P4:[0-9a-zA-Z_.]+]] = bitcast i8* %[[P3]] to fp128*
// IEEE: %{{[0-9a-zA-Z_.]+}} = load fp128, fp128* %[[P4]], align 16
// IEEE: call void @llvm.va_end(i8* %{{[0-9a-zA-Z_.]+}})
__float128 f128(int n, ...) {
va_list ap;
va_start(ap, n);
__float128 x = va_arg(ap, __float128);
va_end(ap);
return x;
}
// IEEE-LABEL: define fp128 @long_double(i32 signext %n, ...)
// IEEE: call void @llvm.va_start(i8* %{{[0-9a-zA-Z_.]+}})
// IEEE: %[[P1:[0-9a-zA-Z_.]+]] = add i64 %{{[0-9a-zA-Z_.]+}}, 15
// IEEE: %[[P2:[0-9a-zA-Z_.]+]] = and i64 %[[P1]], -16
// IEEE: %[[P3:[0-9a-zA-Z_.]+]] = inttoptr i64 %[[P2]] to i8*
// IEEE: %[[P4:[0-9a-zA-Z_.]+]] = bitcast i8* %[[P3]] to fp128*
// IEEE: %{{[0-9a-zA-Z_.]+}} = load fp128, fp128* %[[P4]], align 16
// IEEE: call void @llvm.va_end(i8* %{{[0-9a-zA-Z_.]+}})
// IBM-LABEL: define ppc_fp128 @long_double(i32 signext %n, ...)
// IBM: call void @llvm.va_start(i8* %{{[0-9a-zA-Z_.]+}})
// IBM: %[[P1:[0-9a-zA-Z_.]+]] = add i64 %{{[0-9a-zA-Z_.]+}}, 15
// IBM: %[[P2:[0-9a-zA-Z_.]+]] = and i64 %[[P1]], -16
// IBM: %[[P3:[0-9a-zA-Z_.]+]] = inttoptr i64 %[[P2]] to i8*
// IBM: %[[P4:[0-9a-zA-Z_.]+]] = bitcast i8* %[[P3]] to ppc_fp128*
// IBM: %{{[0-9a-zA-Z_.]+}} = load ppc_fp128, ppc_fp128* %[[P4]], align 16
// IBM: call void @llvm.va_end(i8* %{{[0-9a-zA-Z_.]+}})
long double long_double(int n, ...) {
va_list ap;
va_start(ap, n);
long double x = va_arg(ap, long double);
va_end(ap);
return x;
}