forked from OSchip/llvm-project
[X86] Regenerate 2011-12-06-AVXVectorExtractCombine.ll
This commit is contained in:
parent
7f5b3886e4
commit
6ad4bf330b
|
@ -1,12 +1,14 @@
|
||||||
|
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
|
||||||
; RUN: llc < %s -mtriple=x86_64-apple-darwin -mattr=+avx | FileCheck %s
|
; RUN: llc < %s -mtriple=x86_64-apple-darwin -mattr=+avx | FileCheck %s
|
||||||
; PR11494
|
; PR11494
|
||||||
|
|
||||||
define void @test(<4 x i32>* nocapture %p) nounwind {
|
define void @test(<4 x i32>* nocapture %p) nounwind {
|
||||||
; CHECK-LABEL: test:
|
; CHECK-LABEL: test:
|
||||||
; CHECK: vpxor %xmm0, %xmm0, %xmm0
|
; CHECK: ## %bb.0:
|
||||||
; CHECK-NEXT: vpmaxsd (%rdi), %xmm0, %xmm0
|
; CHECK-NEXT: vpxor %xmm0, %xmm0, %xmm0
|
||||||
; CHECK-NEXT: vmovdqu %xmm0, (%rdi)
|
; CHECK-NEXT: vpmaxsd (%rdi), %xmm0, %xmm0
|
||||||
; CHECK-NEXT: ret
|
; CHECK-NEXT: vmovdqu %xmm0, (%rdi)
|
||||||
|
; CHECK-NEXT: retq
|
||||||
%a = load <4 x i32>, <4 x i32>* %p, align 1
|
%a = load <4 x i32>, <4 x i32>* %p, align 1
|
||||||
%b = call <4 x i32> @llvm.x86.sse41.pmaxsd(<4 x i32> %a, <4 x i32> zeroinitializer) nounwind
|
%b = call <4 x i32> @llvm.x86.sse41.pmaxsd(<4 x i32> %a, <4 x i32> zeroinitializer) nounwind
|
||||||
%c = shufflevector <4 x i32> %b, <4 x i32> undef, <8 x i32> <i32 undef, i32 undef, i32 undef, i32 undef, i32 0, i32 1, i32 2, i32 3>
|
%c = shufflevector <4 x i32> %b, <4 x i32> undef, <8 x i32> <i32 undef, i32 undef, i32 undef, i32 undef, i32 0, i32 1, i32 2, i32 3>
|
||||||
|
|
Loading…
Reference in New Issue