forked from OSchip/llvm-project
parent
be13194655
commit
6aaed72949
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@ -112,6 +112,7 @@ class ARMFastISel : public FastISel {
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// Instruction selection routines.
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virtual bool ARMSelectLoad(const Instruction *I);
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virtual bool ARMSelectStore(const Instruction *I);
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virtual bool ARMSelectBranch(const Instruction *I);
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// Utility routines.
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private:
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@ -619,6 +620,26 @@ bool ARMFastISel::ARMSelectLoad(const Instruction *I) {
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return true;
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}
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bool ARMFastISel::ARMSelectBranch(const Instruction *I) {
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const BranchInst *BI = cast<BranchInst>(I);
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MachineBasicBlock *TBB = FuncInfo.MBBMap[BI->getSuccessor(0)];
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MachineBasicBlock *FBB = FuncInfo.MBBMap[BI->getSuccessor(1)];
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// Simple branch support.
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unsigned CondReg = getRegForValue(BI->getCondition());
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if (CondReg == 0) return false;
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unsigned CmpOpc = isThumb ? ARM::t2CMPrr : ARM::CMPrr;
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unsigned BrOpc = isThumb ? ARM::t2Bcc : ARM::Bcc;
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AddOptionalDefs(BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DL, TII.get(CmpOpc))
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.addReg(CondReg).addReg(CondReg));
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BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DL, TII.get(BrOpc))
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.addMBB(TBB).addImm(ARMCC::NE).addReg(ARM::CPSR);
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FastEmitBranch(FBB, DL);
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FuncInfo.MBB->addSuccessor(TBB);
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return true;
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}
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// TODO: SoftFP support.
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bool ARMFastISel::TargetSelectInstruction(const Instruction *I) {
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// No Thumb-1 for now.
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@ -629,6 +650,8 @@ bool ARMFastISel::TargetSelectInstruction(const Instruction *I) {
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return ARMSelectLoad(I);
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case Instruction::Store:
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return ARMSelectStore(I);
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case Instruction::Br:
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return ARMSelectBranch(I);
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default: break;
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}
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return false;
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