[NFC] CodeGen: Handle shift amount type in DAGTypeLegalizer::SplitInteger

This patch reverts change to X86TargetLowering::getScalarShiftAmountTy in
rL318727 and move the logic to DAGTypeLegalizer::SplitInteger.

The reason is that getScalarShiftAmountTy returns a shift amount type that
is suitable for common use cases in CodeGen. DAGTypeLegalizer::SplitInteger
is a rare situation which requires a shift amount type larger than what
getScalarShiftAmountTy. In this case, it is more reasonable to do special
handling of shift amount type in DAGTypeLegalizer::SplitInteger only. If
similar situations arises the logic may be moved to a separate function.

Differential Revision: https://reviews.llvm.org/D40320

llvm-svn: 318890
This commit is contained in:
Yaxun Liu 2017-11-23 03:08:51 +00:00
parent b6ad844e13
commit 6aaae46f93
2 changed files with 9 additions and 13 deletions

View File

@ -1172,11 +1172,14 @@ void DAGTypeLegalizer::SplitInteger(SDValue Op,
assert(LoVT.getSizeInBits() + HiVT.getSizeInBits() ==
Op.getValueSizeInBits() && "Invalid integer splitting!");
Lo = DAG.getNode(ISD::TRUNCATE, dl, LoVT, Op);
Hi =
DAG.getNode(ISD::SRL, dl, Op.getValueType(), Op,
DAG.getConstant(LoVT.getSizeInBits(), dl,
TLI.getScalarShiftAmountTy(
DAG.getDataLayout(), Op.getValueType())));
unsigned ReqShiftAmountInBits =
Log2_32_Ceil(Op.getValueType().getSizeInBits());
MVT ShiftAmountTy =
TLI.getScalarShiftAmountTy(DAG.getDataLayout(), Op.getValueType());
if (ReqShiftAmountInBits > ShiftAmountTy.getSizeInBits())
ShiftAmountTy = MVT::getIntegerVT(NextPowerOf2(ReqShiftAmountInBits));
Hi = DAG.getNode(ISD::SRL, dl, Op.getValueType(), Op,
DAG.getConstant(LoVT.getSizeInBits(), dl, ShiftAmountTy));
Hi = DAG.getNode(ISD::TRUNCATE, dl, HiVT, Hi);
}

View File

@ -18,7 +18,6 @@
#include "llvm/CodeGen/CallingConvLower.h"
#include "llvm/CodeGen/SelectionDAG.h"
#include "llvm/CodeGen/TargetLowering.h"
#include "llvm/Support/MathExtras.h"
#include "llvm/Target/TargetOptions.h"
namespace llvm {
@ -676,14 +675,8 @@ namespace llvm {
void markLibCallAttributes(MachineFunction *MF, unsigned CC,
ArgListTy &Args) const override;
// For i512, DAGTypeLegalizer::SplitInteger needs a shift amount 256,
// which cannot be held by i8, therefore use i16 instead. In all the
// other situations i8 is sufficient.
MVT getScalarShiftAmountTy(const DataLayout &, EVT VT) const override {
MVT T = VT.getSizeInBits() >= 512 ? MVT::i16 : MVT::i8;
assert((VT.getSizeInBits() + 1) / 2 < (1U << T.getSizeInBits()) &&
"Scalar shift amount type too small");
return T;
return MVT::i8;
}
const MCExpr *