forked from OSchip/llvm-project
[AggressiveInstCombine] Add `{insert/extract}element` to `TruncInstCombine` DAG
Alive2 for `{insert/extract}element`: https://alive2.llvm.org/ce/z/hwy_E- Actually, no one file of test suite is touched by this change, which means that is rare pattern not generated by frontend. But it's worth being in place. Differential Revision: https://reviews.llvm.org/D109236
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@ -67,9 +67,13 @@ static void getRelevantOperands(Instruction *I, SmallVectorImpl<Value *> &Ops) {
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case Instruction::AShr:
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case Instruction::UDiv:
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case Instruction::URem:
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case Instruction::InsertElement:
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Ops.push_back(I->getOperand(0));
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Ops.push_back(I->getOperand(1));
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break;
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case Instruction::ExtractElement:
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Ops.push_back(I->getOperand(0));
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break;
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case Instruction::Select:
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Ops.push_back(I->getOperand(1));
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Ops.push_back(I->getOperand(2));
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@ -138,6 +142,8 @@ bool TruncInstCombine::buildTruncExpressionDag() {
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case Instruction::AShr:
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case Instruction::UDiv:
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case Instruction::URem:
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case Instruction::InsertElement:
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case Instruction::ExtractElement:
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case Instruction::Select: {
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SmallVector<Value *, 2> Operands;
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getRelevantOperands(I, Operands);
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@ -146,7 +152,7 @@ bool TruncInstCombine::buildTruncExpressionDag() {
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}
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default:
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// TODO: Can handle more cases here:
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// 1. shufflevector, extractelement, insertelement
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// 1. shufflevector
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// 2. sdiv, srem
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// 3. phi node(and loop handling)
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// ...
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@ -425,6 +431,19 @@ void TruncInstCombine::ReduceExpressionDag(Type *SclTy) {
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ResI->setIsExact(PEO->isExact());
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break;
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}
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case Instruction::ExtractElement: {
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Value *Vec = getReducedOperand(I->getOperand(0), SclTy);
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Value *Idx = I->getOperand(1);
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Res = Builder.CreateExtractElement(Vec, Idx);
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break;
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}
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case Instruction::InsertElement: {
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Value *Vec = getReducedOperand(I->getOperand(0), SclTy);
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Value *NewElt = getReducedOperand(I->getOperand(1), SclTy);
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Value *Idx = I->getOperand(2);
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Res = Builder.CreateInsertElement(Vec, NewElt, Idx);
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break;
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}
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case Instruction::Select: {
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Value *Op0 = I->getOperand(0);
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Value *LHS = getReducedOperand(I->getOperand(1), SclTy);
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@ -43,12 +43,11 @@ define <4 x i16> @const_shuffle() {
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define <2 x i16> @extract_insert(<2 x i8> %a, <2 x i8> %b) {
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; CHECK-LABEL: @extract_insert(
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; CHECK-NEXT: [[ZEXTA:%.*]] = zext <2 x i8> [[A:%.*]] to <2 x i32>
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; CHECK-NEXT: [[ZEXTB:%.*]] = zext <2 x i8> [[B:%.*]] to <2 x i32>
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; CHECK-NEXT: [[EXTR:%.*]] = extractelement <2 x i32> [[ZEXTA]], i32 0
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; CHECK-NEXT: [[INSR:%.*]] = insertelement <2 x i32> [[ZEXTB]], i32 [[EXTR]], i32 1
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; CHECK-NEXT: [[TRUNC:%.*]] = trunc <2 x i32> [[INSR]] to <2 x i16>
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; CHECK-NEXT: ret <2 x i16> [[TRUNC]]
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; CHECK-NEXT: [[ZEXTA:%.*]] = zext <2 x i8> [[A:%.*]] to <2 x i16>
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; CHECK-NEXT: [[ZEXTB:%.*]] = zext <2 x i8> [[B:%.*]] to <2 x i16>
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; CHECK-NEXT: [[EXTR:%.*]] = extractelement <2 x i16> [[ZEXTA]], i32 0
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; CHECK-NEXT: [[INSR:%.*]] = insertelement <2 x i16> [[ZEXTB]], i16 [[EXTR]], i32 1
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; CHECK-NEXT: ret <2 x i16> [[INSR]]
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;
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%zexta = zext <2 x i8> %a to <2 x i32>
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%zextb = zext <2 x i8> %b to <2 x i32>
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@ -60,10 +59,9 @@ define <2 x i16> @extract_insert(<2 x i8> %a, <2 x i8> %b) {
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define <2 x i16> @insert_poison(i8 %a) {
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; CHECK-LABEL: @insert_poison(
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; CHECK-NEXT: [[ZEXTA:%.*]] = zext i8 [[A:%.*]] to i32
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; CHECK-NEXT: [[INSR:%.*]] = insertelement <2 x i32> poison, i32 [[ZEXTA]], i32 0
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; CHECK-NEXT: [[TRUNC:%.*]] = trunc <2 x i32> [[INSR]] to <2 x i16>
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; CHECK-NEXT: ret <2 x i16> [[TRUNC]]
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; CHECK-NEXT: [[ZEXTA:%.*]] = zext i8 [[A:%.*]] to i16
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; CHECK-NEXT: [[INSR:%.*]] = insertelement <2 x i16> poison, i16 [[ZEXTA]], i32 0
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; CHECK-NEXT: ret <2 x i16> [[INSR]]
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;
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%zexta = zext i8 %a to i32
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%insr = insertelement <2 x i32> poison, i32 %zexta, i32 0
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@ -74,13 +72,12 @@ define <2 x i16> @insert_poison(i8 %a) {
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; This demonstrates test not folded by 'opt -instcombine'
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define <2 x i16> @extract_mul_insert(<2 x i8> %x) {
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; CHECK-LABEL: @extract_mul_insert(
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; CHECK-NEXT: [[ZEXT:%.*]] = zext <2 x i8> [[X:%.*]] to <2 x i32>
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; CHECK-NEXT: [[LSHR:%.*]] = lshr <2 x i32> [[ZEXT]], <i32 4, i32 5>
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; CHECK-NEXT: [[EXTR:%.*]] = extractelement <2 x i32> [[LSHR]], i32 1
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; CHECK-NEXT: [[MUL:%.*]] = mul i32 [[EXTR]], 5
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; CHECK-NEXT: [[INSR:%.*]] = insertelement <2 x i32> [[LSHR]], i32 [[MUL]], i32 1
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; CHECK-NEXT: [[TRUNC:%.*]] = trunc <2 x i32> [[INSR]] to <2 x i16>
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; CHECK-NEXT: ret <2 x i16> [[TRUNC]]
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; CHECK-NEXT: [[ZEXT:%.*]] = zext <2 x i8> [[X:%.*]] to <2 x i16>
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; CHECK-NEXT: [[LSHR:%.*]] = lshr <2 x i16> [[ZEXT]], <i16 4, i16 5>
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; CHECK-NEXT: [[EXTR:%.*]] = extractelement <2 x i16> [[LSHR]], i32 1
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; CHECK-NEXT: [[MUL:%.*]] = mul i16 [[EXTR]], 5
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; CHECK-NEXT: [[INSR:%.*]] = insertelement <2 x i16> [[LSHR]], i16 [[MUL]], i32 1
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; CHECK-NEXT: ret <2 x i16> [[INSR]]
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;
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%zext = zext <2 x i8> %x to <2 x i32>
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%lshr = lshr <2 x i32> %zext, <i32 4, i32 5>
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