forked from OSchip/llvm-project
[AVX-512] Give priority to EVEX encoded scalar FMA instructions when we have FMA, AVX512 and no VLX.
We were giving priority if VLX was enabled. llvm-svn: 298046
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@ -191,13 +191,15 @@ multiclass fma3s_rm_int<bits<8> opc, string OpcodeStr,
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multiclass fma3s_forms<bits<8> opc132, bits<8> opc213, bits<8> opc231,
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string OpStr, string PackTy, string Suff,
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SDNode OpNode, RegisterClass RC,
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X86MemOperand x86memop> {
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defm NAME#132#Suff : fma3s_rm<opc132, !strconcat(OpStr, "132", PackTy),
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x86memop, RC>;
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defm NAME#213#Suff : fma3s_rm<opc213, !strconcat(OpStr, "213", PackTy),
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x86memop, RC, OpNode>;
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defm NAME#231#Suff : fma3s_rm<opc231, !strconcat(OpStr, "231", PackTy),
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x86memop, RC>;
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X86MemOperand x86memop> {
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let Predicates = [HasFMA, NoAVX512] in {
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defm NAME#132#Suff : fma3s_rm<opc132, !strconcat(OpStr, "132", PackTy),
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x86memop, RC>;
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defm NAME#213#Suff : fma3s_rm<opc213, !strconcat(OpStr, "213", PackTy),
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x86memop, RC, OpNode>;
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defm NAME#231#Suff : fma3s_rm<opc231, !strconcat(OpStr, "231", PackTy),
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x86memop, RC>;
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}
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}
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// The FMA 213 form is created for lowering of scalar FMA intrinscis
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@ -46,7 +46,7 @@ define float @test_f32(float %a, float %b, float %c) #0 {
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;
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; AVX51264-LABEL: test_f32:
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; AVX51264: ## BB#0: ## %entry
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; AVX51264-NEXT: vfmadd213ss %xmm2, %xmm1, %xmm0 ## encoding: [0xc4,0xe2,0x71,0xa9,0xc2]
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; AVX51264-NEXT: vfmadd213ss %xmm2, %xmm1, %xmm0 ## EVEX TO VEX Compression encoding: [0xc4,0xe2,0x71,0xa9,0xc2]
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; AVX51264-NEXT: retq ## encoding: [0xc3]
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entry:
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%call = call float @llvm.fma.f32(float %a, float %b, float %c)
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@ -91,7 +91,7 @@ define double @test_f64(double %a, double %b, double %c) #0 {
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;
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; AVX51264-LABEL: test_f64:
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; AVX51264: ## BB#0: ## %entry
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; AVX51264-NEXT: vfmadd213sd %xmm2, %xmm1, %xmm0 ## encoding: [0xc4,0xe2,0xf1,0xa9,0xc2]
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; AVX51264-NEXT: vfmadd213sd %xmm2, %xmm1, %xmm0 ## EVEX TO VEX Compression encoding: [0xc4,0xe2,0xf1,0xa9,0xc2]
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; AVX51264-NEXT: retq ## encoding: [0xc3]
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entry:
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%call = call double @llvm.fma.f64(double %a, double %b, double %c)
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