forked from OSchip/llvm-project
[Thumb] Add some integer abs testcases for different typesizes.
Committed on behalf of @ikulagin (Ivan Kulagin) Differential Revision: https://reviews.llvm.org/D52138 llvm-svn: 355197
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; RUN: llc < %s -mtriple=thumb-unknown-unknown -filetype=obj -o %t.o
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; RUN: llvm-objdump -disassemble -arch-name=thumb %t.o | FileCheck %s
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; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc < %s -mtriple=thumbv6m-none-eabi | FileCheck %s
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define i32 @test(i32 %a) {
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define i8 @test_i8(i8 %a) nounwind {
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; CHECK-LABEL: test_i8:
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; CHECK: @ %bb.0:
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; CHECK-NEXT: sxtb r1, r0
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; CHECK-NEXT: asrs r1, r1, #7
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; CHECK-NEXT: adds r0, r0, r1
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; CHECK-NEXT: eors r0, r1
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; CHECK-NEXT: bx lr
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%tmp1neg = sub i8 0, %a
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%b = icmp sgt i8 %a, -1
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%abs = select i1 %b, i8 %a, i8 %tmp1neg
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ret i8 %abs
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}
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define i16 @test_i16(i16 %a) nounwind {
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; CHECK-LABEL: test_i16:
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; CHECK: @ %bb.0:
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; CHECK-NEXT: sxth r1, r0
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; CHECK-NEXT: asrs r1, r1, #15
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; CHECK-NEXT: adds r0, r0, r1
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; CHECK-NEXT: eors r0, r1
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; CHECK-NEXT: bx lr
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%tmp1neg = sub i16 0, %a
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%b = icmp sgt i16 %a, -1
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%abs = select i1 %b, i16 %a, i16 %tmp1neg
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ret i16 %abs
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}
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define i32 @test_i32(i32 %a) nounwind {
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; CHECK-LABEL: test_i32:
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; CHECK: @ %bb.0:
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; CHECK-NEXT: asrs r1, r0, #31
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; CHECK-NEXT: adds r0, r0, r1
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; CHECK-NEXT: eors r0, r1
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; CHECK-NEXT: bx lr
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%tmp1neg = sub i32 0, %a
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%b = icmp sgt i32 %a, -1
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%abs = select i1 %b, i32 %a, i32 %tmp1neg
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ret i32 %abs
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; This test just checks that 4 instructions were emitted
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; CHECK: {{text}}
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; CHECK: 0:
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; CHECK-NEXT: 2:
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; CHECK-NEXT: 4:
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; CHECK-NEXT: 6:
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; CHECK-NOT: 8:
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}
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define i64 @test_i64(i64 %a) nounwind {
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; CHECK-LABEL: test_i64:
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; CHECK: @ %bb.0:
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; CHECK-NEXT: asrs r2, r1, #31
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; CHECK-NEXT: adds r0, r0, r2
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; CHECK-NEXT: adcs r1, r2
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; CHECK-NEXT: eors r0, r2
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; CHECK-NEXT: eors r1, r2
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; CHECK-NEXT: bx lr
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%tmp1neg = sub i64 0, %a
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%b = icmp sgt i64 %a, -1
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%abs = select i1 %b, i64 %a, i64 %tmp1neg
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ret i64 %abs
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}
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