maxjhandsome
/
llvm-project
forked from OSchip/llvm-project
1
0
Fork 0
Code Issues Pull Requests Packages Releases Wiki Activity

Increase format field from 5 to 6 bits. ARMII::FormMask was increased to 0x3f 

in svn r74988 but the format field was never widened.

llvm-svn: 98768
This commit is contained in:
Bob Wilson 2010-03-17 21:13:43 +00:00
parent 56446146fd
commit 69ba1bcd05
1 changed files with 3 additions and 3 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

6
llvm/lib/Target/ARM/ARMInstrFormats.td
View File

@ -15,8 +15,8 @@
// Format specifies the encoding used by the instruction. This is part of the // Format specifies the encoding used by the instruction. This is part of the
// ad-hoc solution used to emit machine instruction encodings by our machine // ad-hoc solution used to emit machine instruction encodings by our machine
// code emitter. // code emitter.
class Format<bits<5> val> { class Format<bits<6> val> {
bits<5> Value = val; bits<6> Value = val;
} }
def Pseudo : Format<0>; def Pseudo : Format<0>;
@ -183,7 +183,7 @@ class InstTemplate<AddrMode am, SizeFlagVal sz, IndexMode im,
bits<2> IndexModeBits = IM.Value; bits<2> IndexModeBits = IM.Value;
Format F = f; Format F = f;
bits<5> Form = F.Value; bits<6> Form = F.Value;
Domain D = d; Domain D = d;
bits<2> Dom = D.Value; bits<2> Dom = D.Value;