forked from OSchip/llvm-project
[PowerPC][NFC] Add a TOC save test case prior to posting a related patch
An upcoming patch will modify the behaviour with respect to saving the TOC in functions with indirect calls. Adding a test case so the patch will show the difference in codegen. llvm-svn: 364375
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; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc -mcpu=pwr8 -ppc-asm-full-reg-names \
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; RUN: -mtriple=powerpc64le-unknown-unknown < %s | FileCheck %s
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define dso_local void @test(void (i32)* nocapture %fp, i32 signext %Arg, i32 signext %Len) local_unnamed_addr #0 {
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; CHECK-LABEL: test:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: mflr r0
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; CHECK-NEXT: .cfi_def_cfa_offset 64
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; CHECK-NEXT: .cfi_offset lr, 16
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; CHECK-NEXT: .cfi_offset r28, -32
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; CHECK-NEXT: .cfi_offset r29, -24
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; CHECK-NEXT: .cfi_offset r30, -16
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; CHECK-NEXT: std r28, -32(r1) # 8-byte Folded Spill
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; CHECK-NEXT: std r29, -24(r1) # 8-byte Folded Spill
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; CHECK-NEXT: std r30, -16(r1) # 8-byte Folded Spill
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; CHECK-NEXT: std r0, 16(r1)
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; CHECK-NEXT: stdu r1, -64(r1)
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; CHECK-NEXT: mr r29, r5
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; CHECK-NEXT: cmpwi cr1, r4, 11
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; CHECK-NEXT: mr r30, r3
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; CHECK-NEXT: extsw r28, r4
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; CHECK-NEXT: cmpwi r29, 1
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; CHECK-NEXT: cror 4*cr5+lt, lt, 4*cr1+lt
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; CHECK-NEXT: bc 12, 4*cr5+lt, .LBB0_3
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; CHECK-NEXT: # %bb.1: # %for.body.us.preheader
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; CHECK-NEXT: std r2, 24(r1)
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; CHECK-NEXT: .p2align 5
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; CHECK-NEXT: .LBB0_2: # %for.body.us
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; CHECK-NEXT:
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; CHECK-NEXT: mtctr r30
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; CHECK-NEXT: mr r3, r28
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; CHECK-NEXT: mr r12, r30
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; CHECK-NEXT: bctrl
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; CHECK-NEXT: ld 2, 24(r1)
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; CHECK-NEXT: addi r29, r29, -1
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; CHECK-NEXT: cmplwi r29, 0
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; CHECK-NEXT: bne cr0, .LBB0_2
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; CHECK-NEXT: .LBB0_3: # %for.cond.cleanup
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; CHECK-NEXT: mtctr r30
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; CHECK-NEXT: mr r3, r28
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; CHECK-NEXT: mr r12, r30
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; CHECK-NEXT: std r2, 24(r1)
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; CHECK-NEXT: bctrl
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; CHECK-NEXT: ld 2, 24(r1)
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; CHECK-NEXT: addi r1, r1, 64
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; CHECK-NEXT: ld r0, 16(r1)
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; CHECK-NEXT: mtlr r0
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; CHECK-NEXT: ld r30, -16(r1) # 8-byte Folded Reload
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; CHECK-NEXT: ld r29, -24(r1) # 8-byte Folded Reload
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; CHECK-NEXT: ld r28, -32(r1) # 8-byte Folded Reload
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; CHECK-NEXT: blr
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entry:
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%cmp7 = icmp sgt i32 %Len, 0
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%cmp1 = icmp sgt i32 %Arg, 10
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%or.cond = and i1 %cmp7, %cmp1
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br i1 %or.cond, label %for.body.us, label %for.cond.cleanup
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for.body.us: ; preds = %entry, %for.body.us
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%i.08.us = phi i32 [ %inc.us, %for.body.us ], [ 0, %entry ]
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tail call void %fp(i32 signext %Arg) #1
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%inc.us = add nuw nsw i32 %i.08.us, 1
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%exitcond = icmp eq i32 %inc.us, %Len
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br i1 %exitcond, label %for.cond.cleanup, label %for.body.us
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for.cond.cleanup: ; preds = %for.body.us, %entry
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tail call void %fp(i32 signext %Arg) #1
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ret void
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}
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