forked from OSchip/llvm-project
[Hexagon] Move pre-RA DAG mutations to scheduler constructor
llvm-svn: 311894
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@ -12,6 +12,7 @@
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//
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//===----------------------------------------------------------------------===//
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#include "HexagonInstrInfo.h"
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#include "HexagonMachineScheduler.h"
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#include "HexagonSubtarget.h"
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#include "llvm/CodeGen/MachineLoopInfo.h"
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@ -51,16 +52,6 @@ using namespace llvm;
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#define DEBUG_TYPE "machine-scheduler"
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namespace {
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class HexagonCallMutation : public ScheduleDAGMutation {
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public:
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void apply(ScheduleDAGInstrs *DAG) override;
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private:
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bool shouldTFRICallBind(const HexagonInstrInfo &HII,
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const SUnit &Inst1, const SUnit &Inst2) const;
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};
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} // end anonymous namespace
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// Check if a call and subsequent A2_tfrpi instructions should maintain
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// scheduling affinity. We are looking for the TFRI to be consumed in
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// the next instruction. This should help reduce the instances of
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@ -336,9 +327,6 @@ void ConvergingVLIWScheduler::initialize(ScheduleDAGMI *dag) {
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assert((!llvm::ForceTopDown || !llvm::ForceBottomUp) &&
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"-misched-topdown incompatible with -misched-bottomup");
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DAG->addMutation(make_unique<HexagonSubtarget::HexagonDAGMutation>());
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DAG->addMutation(make_unique<HexagonCallMutation>());
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}
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void ConvergingVLIWScheduler::releaseTopNode(SUnit *SU) {
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@ -249,7 +249,14 @@ protected:
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#endif
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};
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class HexagonCallMutation : public ScheduleDAGMutation {
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public:
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void apply(ScheduleDAGInstrs *DAG) override;
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private:
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bool shouldTFRICallBind(const HexagonInstrInfo &HII,
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const SUnit &Inst1, const SUnit &Inst2) const;
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};
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} // namespace
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#endif
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@ -100,7 +100,12 @@ extern "C" int HexagonTargetMachineModule;
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int HexagonTargetMachineModule = 0;
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static ScheduleDAGInstrs *createVLIWMachineSched(MachineSchedContext *C) {
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return new VLIWMachineScheduler(C, make_unique<ConvergingVLIWScheduler>());
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ScheduleDAGMILive *DAG =
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new VLIWMachineScheduler(C, make_unique<ConvergingVLIWScheduler>());
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DAG->addMutation(make_unique<HexagonSubtarget::HexagonDAGMutation>());
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DAG->addMutation(make_unique<HexagonCallMutation>());
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DAG->addMutation(createCopyConstrainDAGMutation(DAG->TII, DAG->TRI));
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return DAG;
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}
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static MachineSchedRegistry
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