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[InstSimplify] allow icmp with constant folds for splat vectors, part 2 

Completes the m_APInt changes for simplifyICmpWithConstant().

Other commits in this series:
https://reviews.llvm.org/rL279492
https://reviews.llvm.org/rL279530
https://reviews.llvm.org/rL279534
https://reviews.llvm.org/rL279538

llvm-svn: 279543
This commit is contained in:
Sanjay Patel 2016-08-23 18:00:51 +00:00
parent 812288a5b4
commit 6946e2ade3
2 changed files with 97 additions and 143 deletions
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160
llvm/lib/Analysis/InstructionSimplify.cpp
View File

@ -2165,119 +2165,113 @@ static Value *simplifyICmpWithConstant(CmpInst::Predicate Pred, Value *LHS,
if (RHS_CR.isFullSet())
return ConstantInt::getTrue(GetCompareTy(RHS));
// FIXME: Use m_APInt below here to allow splat vector folds.
ConstantInt *CI = dyn_cast<ConstantInt>(RHS);
if (!CI)
return nullptr;
// Many binary operators with constant RHS have easy to compute constant
// range. Use them to check whether the comparison is a tautology.
unsigned Width = CI->getBitWidth();
unsigned Width = C->getBitWidth();
APInt Lower = APInt(Width, 0);
APInt Upper = APInt(Width, 0);
ConstantInt *CI2;
if (match(LHS, m_URem(m_Value(), m_ConstantInt(CI2)))) {
// 'urem x, CI2' produces [0, CI2).
Upper = CI2->getValue();
} else if (match(LHS, m_SRem(m_Value(), m_ConstantInt(CI2)))) {
// 'srem x, CI2' produces (-|CI2|, |CI2|).
Upper = CI2->getValue().abs();
const APInt *C2;
if (match(LHS, m_URem(m_Value(), m_APInt(C2)))) {
// 'urem x, C2' produces [0, C2).
Upper = *C2;
} else if (match(LHS, m_SRem(m_Value(), m_APInt(C2)))) {
// 'srem x, C2' produces (-|C2|, |C2|).
Upper = C2->abs();
Lower = (-Upper) + 1;
} else if (match(LHS, m_UDiv(m_ConstantInt(CI2), m_Value()))) {
// 'udiv CI2, x' produces [0, CI2].
Upper = CI2->getValue() + 1;
} else if (match(LHS, m_UDiv(m_Value(), m_ConstantInt(CI2)))) {
// 'udiv x, CI2' produces [0, UINT_MAX / CI2].
} else if (match(LHS, m_UDiv(m_APInt(C2), m_Value()))) {
// 'udiv C2, x' produces [0, C2].
Upper = *C2 + 1;
} else if (match(LHS, m_UDiv(m_Value(), m_APInt(C2)))) {
// 'udiv x, C2' produces [0, UINT_MAX / C2].
APInt NegOne = APInt::getAllOnesValue(Width);
if (!CI2->isZero())
Upper = NegOne.udiv(CI2->getValue()) + 1;
} else if (match(LHS, m_SDiv(m_ConstantInt(CI2), m_Value()))) {
if (CI2->isMinSignedValue()) {
if (*C2 != 0)
Upper = NegOne.udiv(*C2) + 1;
} else if (match(LHS, m_SDiv(m_APInt(C2), m_Value()))) {
if (C2->isMinSignedValue()) {
// 'sdiv INT_MIN, x' produces [INT_MIN, INT_MIN / -2].
Lower = CI2->getValue();
Lower = *C2;
Upper = Lower.lshr(1) + 1;
} else {
// 'sdiv CI2, x' produces [-|CI2|, |CI2|].
Upper = CI2->getValue().abs() + 1;
// 'sdiv C2, x' produces [-|C2|, |C2|].
Upper = C2->abs() + 1;
Lower = (-Upper) + 1;
}
} else if (match(LHS, m_SDiv(m_Value(), m_ConstantInt(CI2)))) {
} else if (match(LHS, m_SDiv(m_Value(), m_APInt(C2)))) {
APInt IntMin = APInt::getSignedMinValue(Width);
APInt IntMax = APInt::getSignedMaxValue(Width);
const APInt &Val = CI2->getValue();
if (Val.isAllOnesValue()) {
if (C2->isAllOnesValue()) {
// 'sdiv x, -1' produces [INT_MIN + 1, INT_MAX]
// where CI2 != -1 and CI2 != 0 and CI2 != 1
// where C2 != -1 and C2 != 0 and C2 != 1
Lower = IntMin + 1;
Upper = IntMax + 1;
} else if (Val.countLeadingZeros() < Width - 1) {
// 'sdiv x, CI2' produces [INT_MIN / CI2, INT_MAX / CI2]
// where CI2 != -1 and CI2 != 0 and CI2 != 1
Lower = IntMin.sdiv(Val);
Upper = IntMax.sdiv(Val);
} else if (C2->countLeadingZeros() < Width - 1) {
// 'sdiv x, C2' produces [INT_MIN / C2, INT_MAX / C2]
// where C2 != -1 and C2 != 0 and C2 != 1
Lower = IntMin.sdiv(*C2);
Upper = IntMax.sdiv(*C2);
if (Lower.sgt(Upper))
std::swap(Lower, Upper);
Upper = Upper + 1;
assert(Upper != Lower && "Upper part of range has wrapped!");
}
} else if (match(LHS, m_NUWShl(m_ConstantInt(CI2), m_Value()))) {
// 'shl nuw CI2, x' produces [CI2, CI2 << CLZ(CI2)]
Lower = CI2->getValue();
} else if (match(LHS, m_NUWShl(m_APInt(C2), m_Value()))) {
// 'shl nuw C2, x' produces [C2, C2 << CLZ(C2)]
Lower = *C2;
Upper = Lower.shl(Lower.countLeadingZeros()) + 1;
} else if (match(LHS, m_NSWShl(m_ConstantInt(CI2), m_Value()))) {
if (CI2->isNegative()) {
// 'shl nsw CI2, x' produces [CI2 << CLO(CI2)-1, CI2]
unsigned ShiftAmount = CI2->getValue().countLeadingOnes() - 1;
Lower = CI2->getValue().shl(ShiftAmount);
Upper = CI2->getValue() + 1;
} else if (match(LHS, m_NSWShl(m_APInt(C2), m_Value()))) {
if (C2->isNegative()) {
// 'shl nsw C2, x' produces [C2 << CLO(C2)-1, C2]
unsigned ShiftAmount = C2->countLeadingOnes() - 1;
Lower = C2->shl(ShiftAmount);
Upper = *C2 + 1;
} else {
// 'shl nsw CI2, x' produces [CI2, CI2 << CLZ(CI2)-1]
unsigned ShiftAmount = CI2->getValue().countLeadingZeros() - 1;
Lower = CI2->getValue();
Upper = CI2->getValue().shl(ShiftAmount) + 1;
// 'shl nsw C2, x' produces [C2, C2 << CLZ(C2)-1]
unsigned ShiftAmount = C2->countLeadingZeros() - 1;
Lower = *C2;
Upper = C2->shl(ShiftAmount) + 1;
}
} else if (match(LHS, m_LShr(m_Value(), m_ConstantInt(CI2)))) {
// 'lshr x, CI2' produces [0, UINT_MAX >> CI2].
} else if (match(LHS, m_LShr(m_Value(), m_APInt(C2)))) {
// 'lshr x, C2' produces [0, UINT_MAX >> C2].
APInt NegOne = APInt::getAllOnesValue(Width);
if (CI2->getValue().ult(Width))
Upper = NegOne.lshr(CI2->getValue()) + 1;
} else if (match(LHS, m_LShr(m_ConstantInt(CI2), m_Value()))) {
// 'lshr CI2, x' produces [CI2 >> (Width-1), CI2].
if (C2->ult(Width))
Upper = NegOne.lshr(*C2) + 1;
} else if (match(LHS, m_LShr(m_APInt(C2), m_Value()))) {
// 'lshr C2, x' produces [C2 >> (Width-1), C2].
unsigned ShiftAmount = Width - 1;
if (!CI2->isZero() && cast<BinaryOperator>(LHS)->isExact())
ShiftAmount = CI2->getValue().countTrailingZeros();
Lower = CI2->getValue().lshr(ShiftAmount);
Upper = CI2->getValue() + 1;
} else if (match(LHS, m_AShr(m_Value(), m_ConstantInt(CI2)))) {
// 'ashr x, CI2' produces [INT_MIN >> CI2, INT_MAX >> CI2].
if (*C2 != 0 && cast<BinaryOperator>(LHS)->isExact())
ShiftAmount = C2->countTrailingZeros();
Lower = C2->lshr(ShiftAmount);
Upper = *C2 + 1;
} else if (match(LHS, m_AShr(m_Value(), m_APInt(C2)))) {
// 'ashr x, C2' produces [INT_MIN >> C2, INT_MAX >> C2].
APInt IntMin = APInt::getSignedMinValue(Width);
APInt IntMax = APInt::getSignedMaxValue(Width);
if (CI2->getValue().ult(Width)) {
Lower = IntMin.ashr(CI2->getValue());
Upper = IntMax.ashr(CI2->getValue()) + 1;
if (C2->ult(Width)) {
Lower = IntMin.ashr(*C2);
Upper = IntMax.ashr(*C2) + 1;
}
} else if (match(LHS, m_AShr(m_ConstantInt(CI2), m_Value()))) {
} else if (match(LHS, m_AShr(m_APInt(C2), m_Value()))) {
unsigned ShiftAmount = Width - 1;
if (!CI2->isZero() && cast<BinaryOperator>(LHS)->isExact())
ShiftAmount = CI2->getValue().countTrailingZeros();
if (CI2->isNegative()) {
// 'ashr CI2, x' produces [CI2, CI2 >> (Width-1)]
Lower = CI2->getValue();
Upper = CI2->getValue().ashr(ShiftAmount) + 1;
if (*C2 != 0 && cast<BinaryOperator>(LHS)->isExact())
ShiftAmount = C2->countTrailingZeros();
if (C2->isNegative()) {
// 'ashr C2, x' produces [C2, C2 >> (Width-1)]
Lower = *C2;
Upper = C2->ashr(ShiftAmount) + 1;
} else {
// 'ashr CI2, x' produces [CI2 >> (Width-1), CI2]
Lower = CI2->getValue().ashr(ShiftAmount);
Upper = CI2->getValue() + 1;
// 'ashr C2, x' produces [C2 >> (Width-1), C2]
Lower = C2->ashr(ShiftAmount);
Upper = *C2 + 1;
}
} else if (match(LHS, m_Or(m_Value(), m_ConstantInt(CI2)))) {
// 'or x, CI2' produces [CI2, UINT_MAX].
Lower = CI2->getValue();
} else if (match(LHS, m_And(m_Value(), m_ConstantInt(CI2)))) {
// 'and x, CI2' produces [0, CI2].
Upper = CI2->getValue() + 1;
} else if (match(LHS, m_NUWAdd(m_Value(), m_ConstantInt(CI2)))) {
// 'add nuw x, CI2' produces [CI2, UINT_MAX].
Lower = CI2->getValue();
} else if (match(LHS, m_Or(m_Value(), m_APInt(C2)))) {
// 'or x, C2' produces [C2, UINT_MAX].
Lower = *C2;
} else if (match(LHS, m_And(m_Value(), m_APInt(C2)))) {
// 'and x, C2' produces [0, C2].
Upper = *C2 + 1;
} else if (match(LHS, m_NUWAdd(m_Value(), m_APInt(C2)))) {
// 'add nuw x, C2' produces [C2, UINT_MAX].
Lower = *C2;
}
ConstantRange LHS_CR =
@ -2289,9 +2283,9 @@ static Value *simplifyICmpWithConstant(CmpInst::Predicate Pred, Value *LHS,
if (!LHS_CR.isFullSet()) {
if (RHS_CR.contains(LHS_CR))
return ConstantInt::getTrue(RHS->getContext());
return ConstantInt::getTrue(GetCompareTy(RHS));
if (RHS_CR.inverse().contains(LHS_CR))
return ConstantInt::getFalse(RHS->getContext());
return ConstantInt::getFalse(GetCompareTy(RHS));
}
return nullptr;

80
llvm/test/Transforms/InstSimplify/icmp-constant.ll
View File

@ -47,9 +47,7 @@ define i1 @urem3(i32 %X) {
define <2 x i1> @urem3_vec(<2 x i32> %X) {
; CHECK-LABEL: @urem3_vec(
; CHECK-NEXT: [[A:%.*]] = urem <2 x i32> %X, <i32 10, i32 10>
; CHECK-NEXT: [[B:%.*]] = icmp ult <2 x i32> [[A]], <i32 15, i32 15>
; CHECK-NEXT: ret <2 x i1> [[B]]
; CHECK-NEXT: ret <2 x i1> <i1 true, i1 true>
;
%A = urem <2 x i32> %X, <i32 10, i32 10>
%B = icmp ult <2 x i32> %A, <i32 15, i32 15>
@ -68,9 +66,7 @@ define i1 @srem1(i32 %X) {
define <2 x i1> @srem1_vec(<2 x i32> %X) {
; CHECK-LABEL: @srem1_vec(
; CHECK-NEXT: [[A:%.*]] = srem <2 x i32> %X, <i32 -5, i32 -5>
; CHECK-NEXT: [[B:%.*]] = icmp sgt <2 x i32> [[A]], <i32 5, i32 5>
; CHECK-NEXT: ret <2 x i1> [[B]]
; CHECK-NEXT: ret <2 x i1> zeroinitializer
;
%A = srem <2 x i32> %X, <i32 -5, i32 -5>
%B = icmp sgt <2 x i32> %A, <i32 5, i32 5>
@ -89,9 +85,7 @@ define i1 @udiv5(i32 %X) {
define <2 x i1> @udiv5_vec(<2 x i32> %X) {
; CHECK-LABEL: @udiv5_vec(
; CHECK-NEXT: [[A:%.*]] = udiv <2 x i32> <i32 123, i32 123>, %X
; CHECK-NEXT: [[C:%.*]] = icmp ugt <2 x i32> [[A]], <i32 124, i32 124>
; CHECK-NEXT: ret <2 x i1> [[C]]
; CHECK-NEXT: ret <2 x i1> zeroinitializer
;
%A = udiv <2 x i32> <i32 123, i32 123>, %X
%C = icmp ugt <2 x i32> %A, <i32 124, i32 124>
@ -110,9 +104,7 @@ define i1 @udiv1(i32 %X) {
define <2 x i1> @udiv1_vec(<2 x i32> %X) {
; CHECK-LABEL: @udiv1_vec(
; CHECK-NEXT: [[A:%.*]] = udiv <2 x i32> %X, <i32 1000000, i32 1000000>
; CHECK-NEXT: [[B:%.*]] = icmp ult <2 x i32> [[A]], <i32 5000, i32 5000>
; CHECK-NEXT: ret <2 x i1> [[B]]
; CHECK-NEXT: ret <2 x i1> <i1 true, i1 true>
;
%A = udiv <2 x i32> %X, <i32 1000000, i32 1000000>
%B = icmp ult <2 x i32> %A, <i32 5000, i32 5000>
@ -131,9 +123,7 @@ define i1 @compare_dividend(i32 %a) {
define <2 x i1> @compare_dividend_vec(<2 x i32> %a) {
; CHECK-LABEL: @compare_dividend_vec(
; CHECK-NEXT: [[DIV:%.*]] = sdiv <2 x i32> <i32 2, i32 2>, %a
; CHECK-NEXT: [[CMP:%.*]] = icmp eq <2 x i32> [[DIV]], <i32 3, i32 3>
; CHECK-NEXT: ret <2 x i1> [[CMP]]
; CHECK-NEXT: ret <2 x i1> zeroinitializer
;
%div = sdiv <2 x i32> <i32 2, i32 2>, %a
%cmp = icmp eq <2 x i32> %div, <i32 3, i32 3>
@ -153,9 +143,7 @@ define i1 @sdiv1(i32 %X) {
define <2 x i1> @sdiv1_vec(<2 x i32> %X) {
; CHECK-LABEL: @sdiv1_vec(
; CHECK-NEXT: [[A:%.*]] = sdiv <2 x i32> %X, <i32 1000000, i32 1000000>
; CHECK-NEXT: [[B:%.*]] = icmp slt <2 x i32> [[A]], <i32 3000, i32 3000>
; CHECK-NEXT: ret <2 x i1> [[B]]
; CHECK-NEXT: ret <2 x i1> <i1 true, i1 true>
;
%A = sdiv <2 x i32> %X, <i32 1000000, i32 1000000>
%B = icmp slt <2 x i32> %A, <i32 3000, i32 3000>
@ -174,9 +162,7 @@ define i1 @shl5(i32 %X) {
define <2 x i1> @shl5_vec(<2 x i32> %X) {
; CHECK-LABEL: @shl5_vec(
; CHECK-NEXT: [[SUB:%.*]] = shl nuw <2 x i32> <i32 4, i32 4>, %X
; CHECK-NEXT: [[CMP:%.*]] = icmp ugt <2 x i32> [[SUB]], <i32 3, i32 3>
; CHECK-NEXT: ret <2 x i1> [[CMP]]
; CHECK-NEXT: ret <2 x i1> <i1 true, i1 true>
;
%sub = shl nuw <2 x i32> <i32 4, i32 4>, %X
%cmp = icmp ugt <2 x i32> %sub, <i32 3, i32 3>
@ -195,9 +181,7 @@ define i1 @shl2(i32 %X) {
define <2 x i1> @shl2_vec(<2 x i32> %X) {
; CHECK-LABEL: @shl2_vec(
; CHECK-NEXT: [[SUB:%.*]] = shl nsw <2 x i32> <i32 -1, i32 -1>, %X
; CHECK-NEXT: [[CMP:%.*]] = icmp eq <2 x i32> [[SUB]], <i32 31, i32 31>
; CHECK-NEXT: ret <2 x i1> [[CMP]]
; CHECK-NEXT: ret <2 x i1> zeroinitializer
;
%sub = shl nsw <2 x i32> <i32 -1, i32 -1>, %X
%cmp = icmp eq <2 x i32> %sub, <i32 31, i32 31>
@ -216,9 +200,7 @@ define i1 @shl4(i32 %X) {
define <2 x i1> @shl4_vec(<2 x i32> %X) {
; CHECK-LABEL: @shl4_vec(
; CHECK-NEXT: [[SUB:%.*]] = shl nsw <2 x i32> <i32 -1, i32 -1>, %X
; CHECK-NEXT: [[CMP:%.*]] = icmp sle <2 x i32> [[SUB]], <i32 -1, i32 -1>
; CHECK-NEXT: ret <2 x i1> [[CMP]]
; CHECK-NEXT: ret <2 x i1> <i1 true, i1 true>
;
%sub = shl nsw <2 x i32> <i32 -1, i32 -1>, %X
%cmp = icmp sle <2 x i32> %sub, <i32 -1, i32 -1>
@ -237,9 +219,7 @@ define i1 @icmp_shl_nsw_1(i64 %a) {
define <2 x i1> @icmp_shl_nsw_1_vec(<2 x i64> %a) {
; CHECK-LABEL: @icmp_shl_nsw_1_vec(
; CHECK-NEXT: [[SHL:%.*]] = shl nsw <2 x i64> <i64 1, i64 1>, %a
; CHECK-NEXT: [[CMP:%.*]] = icmp sge <2 x i64> [[SHL]], zeroinitializer
; CHECK-NEXT: ret <2 x i1> [[CMP]]
; CHECK-NEXT: ret <2 x i1> <i1 true, i1 true>
;
%shl = shl nsw <2 x i64> <i64 1, i64 1>, %a
%cmp = icmp sge <2 x i64> %shl, zeroinitializer
@ -258,9 +238,7 @@ define i1 @icmp_shl_nsw_neg1(i64 %a) {
define <2 x i1> @icmp_shl_nsw_neg1_vec(<2 x i64> %a) {
; CHECK-LABEL: @icmp_shl_nsw_neg1_vec(
; CHECK-NEXT: [[SHL:%.*]] = shl nsw <2 x i64> <i64 -1, i64 -1>, %a
; CHECK-NEXT: [[CMP:%.*]] = icmp sge <2 x i64> [[SHL]], <i64 3, i64 3>
; CHECK-NEXT: ret <2 x i1> [[CMP]]
; CHECK-NEXT: ret <2 x i1> zeroinitializer
;
%shl = shl nsw <2 x i64> <i64 -1, i64 -1>, %a
%cmp = icmp sge <2 x i64> %shl, <i64 3, i64 3>
@ -279,9 +257,7 @@ define i1 @lshr2(i32 %x) {
define <2 x i1> @lshr2_vec(<2 x i32> %x) {
; CHECK-LABEL: @lshr2_vec(
; CHECK-NEXT: [[S:%.*]] = lshr <2 x i32> %x, <i32 30, i32 30>
; CHECK-NEXT: [[C:%.*]] = icmp ugt <2 x i32> [[S]], <i32 8, i32 8>
; CHECK-NEXT: ret <2 x i1> [[C]]
; CHECK-NEXT: ret <2 x i1> zeroinitializer
;
%s = lshr <2 x i32> %x, <i32 30, i32 30>
%c = icmp ugt <2 x i32> %s, <i32 8, i32 8>
@ -300,9 +276,7 @@ define i1 @exact_lshr_ugt_false(i32 %a) {
define <2 x i1> @exact_lshr_ugt_false_vec(<2 x i32> %a) {
; CHECK-LABEL: @exact_lshr_ugt_false_vec(
; CHECK-NEXT: [[SHR:%.*]] = lshr exact <2 x i32> <i32 30, i32 30>, %a
; CHECK-NEXT: [[CMP:%.*]] = icmp ult <2 x i32> [[SHR]], <i32 15, i32 15>
; CHECK-NEXT: ret <2 x i1> [[CMP]]
; CHECK-NEXT: ret <2 x i1> zeroinitializer
;
%shr = lshr exact <2 x i32> <i32 30, i32 30>, %a
%cmp = icmp ult <2 x i32> %shr, <i32 15, i32 15>
@ -321,9 +295,7 @@ define i1 @lshr_sgt_false(i32 %a) {
define <2 x i1> @lshr_sgt_false_vec(<2 x i32> %a) {
; CHECK-LABEL: @lshr_sgt_false_vec(
; CHECK-NEXT: [[SHR:%.*]] = lshr <2 x i32> <i32 1, i32 1>, %a
; CHECK-NEXT: [[CMP:%.*]] = icmp sgt <2 x i32> [[SHR]], <i32 1, i32 1>
; CHECK-NEXT: ret <2 x i1> [[CMP]]
; CHECK-NEXT: ret <2 x i1> zeroinitializer
;
%shr = lshr <2 x i32> <i32 1, i32 1>, %a
%cmp = icmp sgt <2 x i32> %shr, <i32 1, i32 1>
@ -342,9 +314,7 @@ define i1 @ashr2(i32 %x) {
define <2 x i1> @ashr2_vec(<2 x i32> %x) {
; CHECK-LABEL: @ashr2_vec(
; CHECK-NEXT: [[S:%.*]] = ashr <2 x i32> %x, <i32 30, i32 30>
; CHECK-NEXT: [[C:%.*]] = icmp slt <2 x i32> [[S]], <i32 -5, i32 -5>
; CHECK-NEXT: ret <2 x i1> [[C]]
; CHECK-NEXT: ret <2 x i1> zeroinitializer
;
%s = ashr <2 x i32> %x, <i32 30, i32 30>
%c = icmp slt <2 x i32> %s, <i32 -5, i32 -5>
@ -363,9 +333,7 @@ define i1 @ashr_sgt_false(i32 %a) {
define <2 x i1> @ashr_sgt_false_vec(<2 x i32> %a) {
; CHECK-LABEL: @ashr_sgt_false_vec(
; CHECK-NEXT: [[SHR:%.*]] = ashr <2 x i32> <i32 -30, i32 -30>, %a
; CHECK-NEXT: [[CMP:%.*]] = icmp sgt <2 x i32> [[SHR]], <i32 -1, i32 -1>
; CHECK-NEXT: ret <2 x i1> [[CMP]]
; CHECK-NEXT: ret <2 x i1> zeroinitializer
;
%shr = ashr <2 x i32> <i32 -30, i32 -30>, %a
%cmp = icmp sgt <2 x i32> %shr, <i32 -1, i32 -1>
@ -384,9 +352,7 @@ define i1 @exact_ashr_sgt_false(i32 %a) {
define <2 x i1> @exact_ashr_sgt_false_vec(<2 x i32> %a) {
; CHECK-LABEL: @exact_ashr_sgt_false_vec(
; CHECK-NEXT: [[SHR:%.*]] = ashr exact <2 x i32> <i32 -30, i32 -30>, %a
; CHECK-NEXT: [[CMP:%.*]] = icmp sgt <2 x i32> [[SHR]], <i32 -15, i32 -15>
; CHECK-NEXT: ret <2 x i1> [[CMP]]
; CHECK-NEXT: ret <2 x i1> zeroinitializer
;
%shr = ashr exact <2 x i32> <i32 -30, i32 -30>, %a
%cmp = icmp sgt <2 x i32> %shr, <i32 -15, i32 -15>
@ -405,9 +371,7 @@ define i1 @or1(i32 %X) {
define <2 x i1> @or1_vec(<2 x i32> %X) {
; CHECK-LABEL: @or1_vec(
; CHECK-NEXT: [[A:%.*]] = or <2 x i32> %X, <i32 62, i32 62>
; CHECK-NEXT: [[B:%.*]] = icmp ult <2 x i32> [[A]], <i32 50, i32 50>
; CHECK-NEXT: ret <2 x i1> [[B]]
; CHECK-NEXT: ret <2 x i1> zeroinitializer
;
%A = or <2 x i32> %X, <i32 62, i32 62>
%B = icmp ult <2 x i32> %A, <i32 50, i32 50>
@ -426,9 +390,7 @@ define i1 @and1(i32 %X) {
define <2 x i1> @and1_vec(<2 x i32> %X) {
; CHECK-LABEL: @and1_vec(
; CHECK-NEXT: [[A:%.*]] = and <2 x i32> %X, <i32 62, i32 62>
; CHECK-NEXT: [[B:%.*]] = icmp ugt <2 x i32> [[A]], <i32 70, i32 70>
; CHECK-NEXT: ret <2 x i1> [[B]]
; CHECK-NEXT: ret <2 x i1> zeroinitializer
;
%A = and <2 x i32> %X, <i32 62, i32 62>
%B = icmp ugt <2 x i32> %A, <i32 70, i32 70>
@ -447,9 +409,7 @@ define i1 @tautological9(i32 %x) {
define <2 x i1> @tautological9_vec(<2 x i32> %x) {
; CHECK-LABEL: @tautological9_vec(
; CHECK-NEXT: [[ADD:%.*]] = add nuw <2 x i32> %x, <i32 13, i32 13>
; CHECK-NEXT: [[CMP:%.*]] = icmp ne <2 x i32> [[ADD]], <i32 12, i32 12>
; CHECK-NEXT: ret <2 x i1> [[CMP]]
; CHECK-NEXT: ret <2 x i1> <i1 true, i1 true>
;
%add = add nuw <2 x i32> %x, <i32 13, i32 13>
%cmp = icmp ne <2 x i32> %add, <i32 12, i32 12>