forked from OSchip/llvm-project
parent
21ebae3394
commit
68dcec6fea
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@ -311,9 +311,9 @@ void ScheduleDAG::AddOperand(MachineInstr *MI, SDOperand Op,
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cerr << "MI = "; MI->print(cerr);
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cerr << "VReg = " << VReg << "\n";
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cerr << "VReg RegClass size = " << VRC->getSize()
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<< ", align = " << VRC->getAlignment() << "\n";
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<< ", align = " << VRC->getAlignment() << "\n";
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cerr << "Expected RegClass size = " << RC->getSize()
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<< ", align = " << RC->getAlignment() << "\n";
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<< ", align = " << RC->getAlignment() << "\n";
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#endif
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cerr << "Fatal error, aborting.\n";
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abort();
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