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[GlobalISel] Get the AArch64 tests to work on Linux 

Mostly this just means changing the triple from aarch64-apple-ios to the generic
aarch64--. Only one test needs more significant changes, but GlobalISel already
does the right thing so it's ok to just change the checks.

Differential Revision: https://reviews.llvm.org/D25532

llvm-svn: 284223
This commit is contained in:
Diana Picus 2016-10-14 10:19:40 +00:00
parent c45343ea28
commit 68c7b04e8d
21 changed files with 33 additions and 25 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

8
llvm/test/CodeGen/AArch64/GlobalISel/arm64-fallback.ll
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@ -8,15 +8,17 @@
; the fallback path.
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128"
target triple = "aarch64-apple-ios"
target triple = "aarch64--"
; We use __fixunstfti as the common denominator for __fixunstfti on Linux and
; ___fixunstfti on iOS
; ERROR: Unable to lower arguments
; FALLBACK: ldr q0,
; FALLBACK-NEXT: bl ___fixunstfti
; FALLBACK-NEXT: bl __fixunstfti
;
; FALLBACK_WITH_REPORT: warning: Instruction selection used fallback path for ABIi128
; FALLBACK_WITH_REPORT: ldr q0,
; FALLBACK_WITH_REPORT-NEXT: bl ___fixunstfti
; FALLBACK_WITH_REPORT-NEXT: bl __fixunstfti
define i128 @ABIi128(i128 %arg1) {
%farg1 = bitcast i128 %arg1 to fp128
%res = fptoui fp128 %farg1 to i128

13
llvm/test/CodeGen/AArch64/GlobalISel/arm64-instructionselect.mir
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@ -1,11 +1,12 @@
# RUN: llc -O0 -run-pass=instruction-select -verify-machineinstrs -global-isel %s -o - | FileCheck %s
# RUN: llc -O0 -mtriple=aarch64-apple-ios -run-pass=instruction-select -verify-machineinstrs -global-isel %s -o - | FileCheck %s -check-prefix=CHECK -check-prefix=IOS
# RUN: llc -O0 -mtriple=aarch64-linux-gnu -run-pass=instruction-select -verify-machineinstrs -global-isel %s -o - | FileCheck %s -check-prefix=CHECK -check-prefix=LINUX-DEFAULT
# RUN: llc -O0 -mtriple=aarch64-linux-gnu -relocation-model=pic -run-pass=instruction-select -verify-machineinstrs -global-isel %s -o - | FileCheck %s -check-prefix=CHECK -check-prefix=LINUX-PIC
# Test the instruction selector.
# As we support more instructions, we need to split this up.
--- |
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128"
target triple = "aarch64-apple-ios"
define void @add_s32_gpr() { ret void }
define void @add_s64_gpr() { ret void }
@ -1748,7 +1749,9 @@ registers:
- { id: 0, class: gpr }
# CHECK: body:
# CHECK: %0 = MOVaddr target-flags(aarch64-page) @var_local, target-flags(aarch64-pageoff, aarch64-nc) @var_local
# IOS: %0 = MOVaddr target-flags(aarch64-page) @var_local, target-flags(aarch64-pageoff, aarch64-nc) @var_local
# LINUX-DEFAULT: %0 = MOVaddr target-flags(aarch64-page) @var_local, target-flags(aarch64-pageoff, aarch64-nc) @var_local
# LINUX-PIC: %0 = LOADgot @var_local
body: |
bb.0:
%0(p0) = G_GLOBAL_VALUE @var_local
@ -1763,7 +1766,9 @@ registers:
- { id: 0, class: gpr }
# CHECK: body:
# CHECK: %0 = LOADgot @var_got
# IOS: %0 = LOADgot @var_got
# LINUX-DEFAULT: %0 = MOVaddr target-flags(aarch64-page) @var_got, target-flags(aarch64-pageoff, aarch64-nc) @var_got
# LINUX-PIC: %0 = LOADgot @var_got
body: |
bb.0:
%0(p0) = G_GLOBAL_VALUE @var_got

2
llvm/test/CodeGen/AArch64/GlobalISel/arm64-irtranslator.ll
View File

@ -3,7 +3,7 @@
; This file checks that the translation from llvm IR to generic MachineInstr
; is correct.
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128"
target triple = "aarch64-apple-ios"
target triple = "aarch64--"
; Tests for add.
; CHECK-LABEL: name: addi64

2
llvm/test/CodeGen/AArch64/GlobalISel/arm64-regbankselect.mir
View File

@ -4,7 +4,7 @@
--- |
; ModuleID = 'generic-virtual-registers-type-error.mir'
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128"
target triple = "aarch64-apple-ios"
target triple = "aarch64--"
define void @defaultMapping() {
entry:
ret void

2
llvm/test/CodeGen/AArch64/GlobalISel/legalize-add.mir
View File

@ -2,7 +2,7 @@
--- |
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128"
target triple = "aarch64-apple-ios"
target triple = "aarch64--"
define void @test_scalar_add_big() {
entry:
ret void

2
llvm/test/CodeGen/AArch64/GlobalISel/legalize-and.mir
View File

@ -2,7 +2,7 @@
--- |
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128"
target triple = "aarch64-apple-ios"
target triple = "aarch64--"
define void @test_scalar_and_small() {
entry:
ret void

2
llvm/test/CodeGen/AArch64/GlobalISel/legalize-cmp.mir
View File

@ -2,7 +2,7 @@
--- |
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128"
target triple = "aarch64-apple-ios"
target triple = "aarch64--"
define void @test_icmp() {
entry:
ret void

2
llvm/test/CodeGen/AArch64/GlobalISel/legalize-combines.mir
View File

@ -2,7 +2,7 @@
--- |
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128"
target triple = "aarch64-apple-ios"
target triple = "aarch64--"
define void @test_combines() {
entry:
ret void

2
llvm/test/CodeGen/AArch64/GlobalISel/legalize-constant.mir
View File

@ -2,7 +2,7 @@
--- |
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128"
target triple = "aarch64-apple-ios"
target triple = "aarch64--"
define void @test_constant() {
entry:
ret void

2
llvm/test/CodeGen/AArch64/GlobalISel/legalize-div.mir
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@ -2,7 +2,7 @@
--- |
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128"
target triple = "aarch64-apple-ios"
target triple = "aarch64--"
define void @test_div() {
entry:
ret void

2
llvm/test/CodeGen/AArch64/GlobalISel/legalize-ext.mir
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@ -2,7 +2,7 @@
--- |
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128"
target triple = "aarch64-apple-ios"
target triple = "aarch64--"
define void @test_ext() {
entry:
ret void

2
llvm/test/CodeGen/AArch64/GlobalISel/legalize-fcmp.mir
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@ -2,7 +2,7 @@
--- |
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128"
target triple = "aarch64-apple-ios"
target triple = "aarch64--"
define void @test_icmp() {
entry:
ret void

2
llvm/test/CodeGen/AArch64/GlobalISel/legalize-gep.mir
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@ -2,7 +2,7 @@
--- |
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128"
target triple = "aarch64-apple-ios"
target triple = "aarch64--"
define void @test_gep_small() {
entry:
ret void

2
llvm/test/CodeGen/AArch64/GlobalISel/legalize-load-store.mir
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@ -2,7 +2,7 @@
--- |
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128"
target triple = "aarch64-apple-ios"
target triple = "aarch64--"
define void @test_load(i8* %addr) {
entry:
ret void

2
llvm/test/CodeGen/AArch64/GlobalISel/legalize-mul.mir
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@ -2,7 +2,7 @@
--- |
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128"
target triple = "aarch64-apple-ios"
target triple = "aarch64--"
define void @test_scalar_mul_small() {
entry:
ret void

2
llvm/test/CodeGen/AArch64/GlobalISel/legalize-or.mir
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@ -2,7 +2,7 @@
--- |
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128"
target triple = "aarch64-apple-ios"
target triple = "aarch64--"
define void @test_scalar_or_small() {
entry:
ret void

2
llvm/test/CodeGen/AArch64/GlobalISel/legalize-rem.mir
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@ -2,7 +2,7 @@
--- |
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128"
target triple = "aarch64-apple-ios"
target triple = "aarch64--"
define void @test_rem() {
entry:
ret void

2
llvm/test/CodeGen/AArch64/GlobalISel/legalize-simple.mir
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@ -2,7 +2,7 @@
--- |
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128"
target triple = "aarch64-apple-ios"
target triple = "aarch64--"
define void @test_simple() {
entry:
ret void

2
llvm/test/CodeGen/AArch64/GlobalISel/legalize-sub.mir
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@ -2,7 +2,7 @@
--- |
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128"
target triple = "aarch64-apple-ios"
target triple = "aarch64--"
define void @test_scalar_sub_small() {
entry:
ret void

2
llvm/test/CodeGen/AArch64/GlobalISel/legalize-xor.mir
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@ -2,7 +2,7 @@
--- |
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128"
target triple = "aarch64-apple-ios"
target triple = "aarch64--"
define void @test_scalar_xor_small() {
entry:
ret void

1
llvm/unittests/CodeGen/GlobalISel/CMakeLists.txt
View File

@ -1,5 +1,6 @@
set(LLVM_LINK_COMPONENTS
GlobalISel
CodeGen
)
if(LLVM_BUILD_GLOBAL_ISEL)